公开(公告)号：US10128206B2

公开(公告)日：2018-11-13

申请号：US12904506

申请日：2010-10-14

申请人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Meng-Wei Chou ,  Hung-Jui Kuo ,  Chung-Shi Liu

发明人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Meng-Wei Chou ,  Hung-Jui Kuo ,  Chung-Shi Liu

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L23/00

摘要： The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls.

公开(公告)号：US09312214B2

公开(公告)日：2016-04-12

申请号：US13240629

申请日：2011-09-22

申请人： Meng-Tse Chen ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L21/60 ,  H01L21/50 ,  H01L21/56 ,  H01L21/48 ,  H01L21/683 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L21/486 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2924/12042 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method includes applying a polymer-comprising material over a carrier, and forming a via over the carrier. The via is located inside the polymer-comprising material, and substantially penetrates through the polymer-comprising material. A first redistribution line is formed on a first side of the polymer-comprising material. A second redistribution line is formed on a second side of the polymer-comprising material opposite to the first side. The first redistribution line is electrically coupled to the second redistribution line through the via.

摘要翻译： 一种方法包括在载体上涂覆含聚合物的材料，并在载体上形成通孔。 通孔位于含聚合物的材料的内部，并且基本上穿透包含聚合物的材料。 在包含聚合物的材料的第一面上形成第一再分配线。 第二再分配线形成在与第一侧相对的含聚合物材料的第二侧上。 第一再分配线通过通孔电耦合到第二再分配线。

公开(公告)号：US08809117B2

公开(公告)日：2014-08-19

申请号：US13270890

申请日：2011-10-11

申请人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Chung-Shi Liu

发明人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Chung-Shi Liu

IPC分类号： H01L21/00

CPC分类号： H01L21/6835 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05554 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/14135 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75754 ,  H01L2224/7698 ,  H01L2224/81001 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83102 ,  H01L2224/9205 ,  H01L2224/92125 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/3841 ,  Y10T29/41 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2224/05552 ,  H01L2924/013

摘要： Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region.

摘要翻译： 公开了用于半导体器件的封装处理工具和封装方法。 在一个实施例中，用于半导体器件的封装处理工具包括包括框架的机械结构。 框架包括适于将多个集成电路管芯保持在其中的多个孔。 框架包括至少一个中空区域。

公开(公告)号：US20130181338A1

公开(公告)日：2013-07-18

申请号：US13349405

申请日：2012-01-12

申请人： Wen-Hsiung Lu ,  Yi-Wen Wu ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Wen-Hsiung Lu ,  Yi-Wen Wu ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L21/20

CPC分类号： H01L23/3192 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3157 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02331 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05007 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05547 ,  H01L2224/05548 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/10126 ,  H01L2224/11464 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/73104 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A structure comprises a post passivation interconnect layer formed over a semiconductor substrate, a metal bump formed over the post passivation interconnect layer and a molding compound layer formed over the semiconductor substrate. A lower portion of the metal bump is embedded in the molding compound layer and a middle portion of the metal bump is surrounded by a concave meniscus molding compound protection layer.

摘要翻译： 一种结构包括形成在半导体衬底上的后钝化互连层，形成在后钝化互连层上的金属凸块和形成在半导体衬底上的模塑复合层。 金属凸块的下部嵌入在模塑料层中，并且金属凸块的中间部分被凹弯月面模塑料保护层包围。

公开(公告)号：US08405199B2

公开(公告)日：2013-03-26

申请号：US12832231

申请日：2010-07-08

申请人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Ming-Che Ho ,  Chung-Shi Liu

发明人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Ming-Che Ho ,  Chung-Shi Liu

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L21/563 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/11424 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13076 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13647 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2224/13655 ,  H01L2224/81 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05552

摘要： An embodiment of the disclosure includes a conductive pillar on a semiconductor die. A substrate is provided. A bond pad is over the substrate. A conductive pillar is over the bond pad. The conductive pillar has a top surface, edge sidewalls and a height. A cap layer is over the top surface of the conductive pillar. The cap layer extends along the edge sidewalls of the conductive pillar for a length. A solder material is over a top surface of the cap layer.

摘要翻译： 本公开的实施例包括半导体管芯上的导电柱。 提供基板。 焊盘在衬底上。 导电支柱位于接合垫上方。 导电柱具有顶表面，边缘侧壁和高度。 覆盖层在导电柱的顶表面之上。 盖层沿着导电柱的边缘侧壁延伸一段长度。 焊料材料在盖层的顶表面之上。

公开(公告)号：US20130062761A1

公开(公告)日：2013-03-14

申请号：US13228768

申请日：2011-09-09

申请人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

发明人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L25/0657 ,  H01L21/52 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06515 ,  H01L2224/09181 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/73259 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15322 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2924/00

摘要： Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.

公开(公告)号：US20120322255A1

公开(公告)日：2012-12-20

申请号：US13161303

申请日：2011-06-15

申请人： Ming-Da Cheng ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Tzong-Hann Yang ,  Wen-Hsiung Lu ,  Zheng-Yi Lim ,  Yi-Wen Wu ,  Chung-Shi Liu

发明人： Ming-Da Cheng ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Tzong-Hann Yang ,  Wen-Hsiung Lu ,  Zheng-Yi Lim ,  Yi-Wen Wu ,  Chung-Shi Liu

IPC分类号： H01L21/768

CPC分类号： H01L24/11 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1133 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13655 ,  H01L2224/13671 ,  H01L2224/13672 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81193 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2224/11

摘要： A system and method for forming metal bumps is provided. An embodiment comprises attaching conductive material to a carrier medium and then contacting the conductive material to conductive regions of a substrate. Portions of the conductive material are then bonded to the conductive regions using a bonding process to form conductive caps on the conductive regions, and residual conductive material and the carrier medium are removed. A reflow process is used to reflow the conductive caps into conductive bumps.

摘要翻译： 提供一种用于形成金属凸块的系统和方法。 一个实施例包括将导电材料附着到载体介质上，然后将导电材料接触到基底的导电区域。 然后使用接合工艺将导电材料的部分结合到导电区域，以在导电区域上形成导电盖，并且去除残留的导电材料和载体介质。 回流工艺用于将导电盖重新流到导电凸块中。

公开(公告)号：US08242011B2

公开(公告)日：2012-08-14

申请号：US13004376

申请日：2011-01-11

申请人： Zheng-Yi Lim ,  Yi-Wen Wu ,  Wen-Hsiung Lu ,  Chih-Wei Lin ,  Tzong-Huann Yang ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Zheng-Yi Lim ,  Yi-Wen Wu ,  Wen-Hsiung Lu ,  Chih-Wei Lin ,  Tzong-Huann Yang ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/11824 ,  H01L2224/11827 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13583 ,  H01L2224/13693 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/01047 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01073 ,  H01L2924/01049 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01078 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01082 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

摘要： The disclosure relates to fabrication of to a metal pillar. An exemplary method of fabricating a semiconductor device comprises the steps of providing a substrate having a contact pad; forming a passivation layer extending over the substrate having an opening over the contact pad; forming a metal pillar over the contact pad and a portion of the passivation layer; forming a solder layer over the metal pillar; and causing sidewalls of the metal pillar to react with an organic compound to form a self-assembled monolayer or self-assembled multi-layers of the organic compound on the sidewalls of the metal pillar.

摘要翻译： 本公开涉及制造金属柱。 制造半导体器件的示例性方法包括以下步骤：提供具有接触焊盘的衬底; 形成在所述衬底上延伸的钝化层，所述钝化层在所述接触焊盘上具有开口; 在所述接触焊盘和所述钝化层的一部分上形成金属柱; 在金属柱上形成焊料层; 并且使金属柱的侧壁与有机化合物反应，以在金属柱的侧壁上形成自组装单层或有机化合物的自组装多层。

公开(公告)号：US09576830B2

公开(公告)日：2017-02-21

申请号：US13475790

申请日：2012-05-18

申请人： Hui-Min Huang ,  Chih-Wei Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Hui-Min Huang ,  Chih-Wei Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L21/687 ,  H01L21/67 ,  H01L21/683

CPC分类号： H01L21/67288 ,  H01L21/6838

摘要： A method for adjusting the warpage of a wafer, includes providing a wafer having a center portion and edge portions and providing a holding table having a holding area thereon for holding the wafer. The wafer is placed onto the holding table with the center portion higher than the edge portions and thereafter pressed onto the holding area such that the wafer is attracted to and held onto the holding table by self-suction force. The wafer is heated at a predetermined temperature and for a predetermined time in accordance with an amount of warpage of the wafer in order to achieve a substantially flat wafer or a predetermined wafer level.

摘要翻译： 一种用于调整晶片翘曲的方法，包括提供具有中心部分和边缘部分的晶片，并提供其上具有用于保持晶片的保持区域的保持台。 将晶片放置在保持台上，其中心部分高​​于边缘部分，然后按压到保持区域上，使得晶片通过自吸力被吸引并保持在保持台上。 根据晶片的翘曲量将晶片在预定温度下加热预定时间，以便实现基本上平坦的晶片或预定的晶片级。

公开(公告)号：US20130089952A1

公开(公告)日：2013-04-11

申请号：US13270890

申请日：2011-10-11

申请人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Chung-Shi Liu

发明人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Chung-Shi Liu

IPC分类号： H01L21/60 ,  H01L23/12 ,  H01L21/603

CPC分类号： H01L21/6835 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05554 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/14135 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75754 ,  H01L2224/7698 ,  H01L2224/81001 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83102 ,  H01L2224/9205 ,  H01L2224/92125 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/3841 ,  Y10T29/41 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2224/05552 ,  H01L2924/013

摘要： Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region.

摘要翻译： 公开了用于半导体器件的封装处理工具和封装方法。 在一个实施例中，用于半导体器件的封装处理工具包括包括框架的机械结构。 框架包括适于将多个集成电路管芯保持在其中的多个孔。 框架包括至少一个中空区域。