公开(公告)号：US08404517B2

公开(公告)日：2013-03-26

申请号：US13485729

申请日：2012-05-31

Applicant: Kenji Sakata ,  Tsuyoshi Kida

Inventor： Kenji Sakata ,  Tsuyoshi Kida

IPC: H01L21/00

CPC classification number: H01L21/563 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: A method of manufacturing a semiconductor device, includes mounting a semiconductor chip on a wiring substrate such that one surface of the semiconductor chip is faced to one surface of the wiring substrate, and filling a first resin in a gap between the surface of the wiring substrate and the surface of the semiconductor chip such that part of the first resin protrudes from the gap. In the filling of the first resin, the first resin is injected into the gap by use of a first resin injection nozzle while the first resin injection nozzle is being moved along any one of sides of the semiconductor chip or along two sides of the semiconductor chip which are adjacent to each other.

Abstract translation: 一种制造半导体器件的方法，包括将半导体芯片安装在布线基板上，使得半导体芯片的一个表面面对布线基板的一个表面，并且在布线基板的表面之间的间隙中填充第一树脂 以及半导体芯片的表面使得第一树脂的一部分从间隙突出。 在第一树脂的填充中，通过使用第一树脂注入喷嘴将第一树脂注入到间隙中，同时第一树脂注入喷嘴沿着半导体芯片的任一侧移动或沿着半导体芯片的两侧移动 它们彼此相邻。

公开(公告)号：US20120238060A1

公开(公告)日：2012-09-20

申请号：US13485729

申请日：2012-05-31

Applicant: Kenji Sakata ,  Tsuyoshi Kida

Inventor： Kenji Sakata ,  Tsuyoshi Kida

IPC: H01L21/56

CPC classification number: H01L21/563 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: A method of manufacturing a semiconductor device, includes mounting a semiconductor chip on a wiring substrate such that one surface of the semiconductor chip is faced to one surface of the wiring substrate, and filling a first resin in a gap between the surface of the wiring substrate and the surface of the semiconductor chip such that part of the first resin protrudes from the gap. In the filling of the first resin, the first resin is injected into the gap by use of a first resin injection nozzle while the first resin injection nozzle is being moved along any one of sides of the semiconductor chip or along two sides of the semiconductor chip which are adjacent to each other.

Abstract translation: 一种制造半导体器件的方法，包括将半导体芯片安装在布线基板上，使得半导体芯片的一个表面面对布线基板的一个表面，并且在布线基板的表面之间的间隙中填充第一树脂 以及半导体芯片的表面使得第一树脂的一部分从间隙突出。 在第一树脂的填充中，通过使用第一树脂注入喷嘴将第一树脂注入到间隙中，同时第一树脂注入喷嘴沿着半导体芯片的任一侧移动或沿着半导体芯片的两侧移动 它们彼此相邻。

公开(公告)号：US08207619B2

公开(公告)日：2012-06-26

申请号：US12659766

申请日：2010-03-19

Applicant: Kenji Sakata ,  Tsuyoshi Kida

Inventor： Kenji Sakata ,  Tsuyoshi Kida

IPC: H01L23/29

CPC classification number: H01L21/563 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: The extent of a bow of a semiconductor device is suppressed in a case where the fillet width of an underfill resin is asymmetrical. The center position 12 of a chip 1 is caused to deviate from the center position 13 of a wiring substrate 2 in a direction (the direction of the arrow B) reverse to the deviation direction (the direction of the arrow A) of the center position 11 of an underfill resin 4 from the center position 12 of the chip 1. The center position 14 of a resin for encapsulation 6 is caused to deviate from the center position 13 of the wiring substrate 2 in the same direction (the direction of the arrow A) as the deviation direction (the direction of the arrow A) of the center position 11 of the underfill resin 4 from the center position 12 of the chip 1.

Abstract translation: 在底部填充树脂的圆角宽度不对称的情况下，抑制半导体器件的弓形的程度。 使得芯片1的中心位置12沿着与中心位置的偏离方向（箭头A的方向）相反的方向（箭头B的方向）偏离布线基板2的中心位置13 11是从芯片1的中心位置12的底部填充树脂4。使得用于封装的树脂6的中心位置14沿着相同的方向（箭头方向）偏离布线基板2的中心位置13 A）作为底片填充树脂4的中心位置11与芯片1的中心位置12的偏离方向（箭头A的方向）。

公开(公告)号：US20100244228A1

公开(公告)日：2010-09-30

申请号：US12659766

申请日：2010-03-19

Applicant: Kenji Sakata ,  Tsuyoshi Kida

Inventor： Kenji Sakata ,  Tsuyoshi Kida

IPC: H01L23/488 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L21/563 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: The extent of a bow of a semiconductor device is suppressed in a case where the fillet width of an underfill resin is asymmetrical. The center position 12 of a chip 1 is caused to deviate from the center position 13 of a wiring substrate 2 in a direction (the direction of the arrow B) reverse to the deviation direction (the direction of the arrow A) of the center position 11 of an underfill resin 4 from the center position 12 of the chip 1. The center position 14 of a resin for encapsulation 6 is caused to deviate from the center position 13 of the wiring substrate 2 in the same direction (the direction of the arrow A) as the deviation direction (the direction of the arrow A) of the center position 11 of the underfill resin 4 from the center position 12 of the chip 1.

Abstract translation: 在底部填充树脂的圆角宽度不对称的情况下，抑制半导体器件的弓形的程度。 使得芯片1的中心位置12沿着与中心位置的偏离方向（箭头A的方向）相反的方向（箭头B的方向）偏离布线基板2的中心位置13 11是从芯片1的中心位置12的底部填充树脂4。使得用于封装的树脂6的中心位置14沿着相同的方向（箭头方向）偏离布线基板2的中心位置13 A）作为底片填充树脂4的中心位置11与芯片1的中心位置12的偏离方向（箭头A的方向）。

公开(公告)号：US20150236003A1

公开(公告)日：2015-08-20

申请号：US14404099

申请日：2012-09-14

Applicant: Jumpei Konno ,  Takafumi Nishita ,  Kenji Sakata ,  Nobuhiro Kinoshita ,  Michiaki Sugiyama ,  Tsuyoshi Kida ,  Yoshihiro Ono

Inventor： Jumpei Konno ,  Takafumi Nishita ,  Kenji Sakata ,  Nobuhiro Kinoshita ,  Michiaki Sugiyama ,  Tsuyoshi Kida ,  Yoshihiro Ono

IPC: H01L25/00 ,  H01L23/498 ,  H01L25/065 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L21/486 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/538 ,  H01L24/03 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/03 ,  H01L25/065 ,  H01L25/0657 ,  H01L25/07 ,  H01L25/18 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/27312 ,  H01L2224/27334 ,  H01L2224/2741 ,  H01L2224/29006 ,  H01L2224/29007 ,  H01L2224/29012 ,  H01L2224/29015 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32014 ,  H01L2224/32058 ,  H01L2224/32059 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/753 ,  H01L2224/75315 ,  H01L2224/81001 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83001 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8321 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/83906 ,  H01L2224/83907 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/92242 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/11 ,  H01L21/304 ,  H01L2224/03 ,  H01L21/78 ,  H01L2221/68381 ,  H01L21/4825 ,  H01L2224/27 ,  H01L2924/01047

Abstract: A method of manufacturing a semiconductor device obtained by laminating a first semiconductor chip and a second semiconductor chip with different planar sizes when seen in a plan view on a wiring board via an adhesive material, in which the second semiconductor chip with a relatively larger planar size is mounted on the first semiconductor chip with a relatively smaller planar size. Also, after the first and second semiconductor chips are mounted, the first and second semiconductor chips are sealed with resin. Here, before sealing with the resin, a gap between the second semiconductor chip and the wiring board is previously sealed with the adhesive material used when the first and second semiconductor chips are mounted.

Abstract translation: 一种制造半导体器件的方法，所述半导体器件通过层叠具有不同平面尺寸的第一半导体芯片和第二半导体芯片的方法，所述半导体器件和第二半导体芯片在通过粘合材料在布线板上的平面图中看到，其中具有相对较大的平面尺寸 以相对较小的平面尺寸安装在第一半导体芯片上。 此外，在安装第一和第二半导体芯片之后，用树脂密封第一和第二半导体芯片。 这里，在用树脂密封之前，当安装第一和第二半导体芯片时，使用所使用的粘合剂材料预先密封第二半导体芯片和布线板之间的间隙。

公开(公告)号：US08710651B2

公开(公告)日：2014-04-29

申请号：US12904680

申请日：2010-10-14

Applicant: Kenji Sakata ,  Tsuyoshi Kida

Inventor： Kenji Sakata ,  Tsuyoshi Kida

IPC: H01L29/66

CPC classification number: H01L21/563 ,  H01L23/3135 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512

Abstract: A semiconductor device includes a substrate, a semiconductor chip that is bonded to one of the faces of the substrate via bumps, and has a device formation face facing the one of the faces, and a resin that fills the space between the device formation face of the semiconductor chip and the one of the faces of the substrate. The resin includes: a first resin that is formed in a formation region of bumps placed on the outermost circumference of the bumps, and is formed inside the formation region, and a second resin that is formed outside the first resin. The thermal expansion coefficient of the substrate is higher than the thermal expansion coefficient of the first resin. The thermal expansion coefficient of the second resin is higher than the thermal expansion coefficient of the first resin.

Abstract translation: 半导体器件包括：衬底，通过凸块接合到衬底的一个面的半导体芯片，并且具有面向该一个面的器件形成面;以及树脂，其填充器件形成面之间的空间 半导体芯片和基板的一个面。 树脂包括：第一树脂，其形成在凸起的最外周上的凸起的形成区域中，并且形成在形成区域内部;以及第二树脂，形成在第一树脂的外部。 基板的热膨胀系数高于第一树脂的热膨胀系数。 第二树脂的热膨胀系数高于第一树脂的热膨胀系数。

公开(公告)号：US07514800B2

公开(公告)日：2009-04-07

申请号：US10194142

申请日：2002-07-12

Applicant: Tsuyoshi Kida

Inventor： Tsuyoshi Kida

IPC: H01L23/48

CPC classification number: H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85148 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/00 ,  H01L2224/85399

Abstract: A semiconductor device (10) that may have a wire bonding structure having reduced interference between bond wires and a path of a capillary has been disclosed. Semiconductor device (10) may include bond pads (12) arranged in a line along an edge of a semiconductor chip (14) and conductive fingers (16) arranged on a substrate (18). Bond pads (12) may be electrically connected to conductive fingers (16) with bond wires (20). Bond wires (20) may be divided into a first group having a relatively short length and a second group having a relatively long length. The bond wires (20) in the first group may have bonding points on a bonding pad (12) that is closer to an edge of semiconductor chip (14) than bonding points of bond wires (20) in the second group. In this way, spacing between bond wires (20) already formed and a capillary forming an adjacent bond wire may be increased.

Abstract translation: 已经公开了可以具有接合线和毛细管路之间的干涉减小的引线接合结构的半导体器件（10）。 半导体器件（10）可以包括沿着半导体芯片（14）的边缘布置成一条直线的接合焊盘（12）和布置在基板（18）上的导电指状物（16）。 接合焊盘（12）可以用接合线（20）电连接到导电指状物（16）。 接合线（20）可以被分成具有相对较短长度的第一组和具有较长长度的第二组。 第一组中的接合线（20）可以具有比第二组中的接合线（20）的接合点更靠近半导体芯片（14）的边缘的接合焊盘（12）上的接合点。 以这种方式，可以增加已经形成的接合线（20）和形成相邻接合线的毛细管之间的间隔。

公开(公告)号：US07829439B2

公开(公告)日：2010-11-09

申请号：US11968718

申请日：2008-01-03

Applicant: Tsuyoshi Kida

Inventor： Tsuyoshi Kida

IPC: H01L21/46 ,  H01L21/301

CPC classification number: B23K26/032 ,  B23K26/042 ,  B23K26/0853 ,  B23K26/364 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/172 ,  B23K2103/50

Abstract: In a laser beam processing apparatus that processes a semiconductor wafer having a multi-layered wiring structure formed thereon, scribe lines defined thereon, and at least one alignment mark formed on any one of the scribe lines, a laser beam generator system generates a laser beam, and a movement system relatively moves the semiconductor wafer with respect to the laser beam such that the semiconductor wafer is irradiated with a laser beam along the scribe lines to partially remove the multi-layered wiring structure from the semiconductor wafer along the scribe lines. An irradiation control system controls the irradiation of the semiconductor wafer with the laser beam along the scribe lines such that the alignment mark is left on the scribe line.

Abstract translation: 在对其上形成有多层布线结构的半导体晶片进行处理的激光束处理装置中，在其上限定的划线以及形成在任一个划线上的至少一个对准标记，激光束发生器系统产生激光束 并且移动系统相对于激光束相对地移动半导体晶片，使得半导体晶片沿着划线照射激光束，以沿着划线部分地从半导体晶片去除多层布线结构。 照射控制系统利用激光束沿着划线来控制半导体晶片的照射，使得对准标记留在划线上。

公开(公告)号：US20090137084A1

公开(公告)日：2009-05-28

申请号：US12292392

申请日：2008-11-18

Applicant: Tsuyoshi Kida

Inventor： Tsuyoshi Kida

IPC: H01L21/50 ,  B32B41/00

CPC classification number: H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01021 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: Disclosed herewith is a semiconductor module manufacturing apparatus capable of reducing occurrence of warping of the wiring substrate, etc., as well as occurrence of failures of bonding between the wiring substrate and semiconductor chips, etc. without lowering the productivity. The semiconductor module manufacturing apparatus employs a batch reflowing process that heats one, two, or more wiring substrates and at least two or more semiconductor chips or semiconductor devices simultaneously. After the heating process, the semiconductor chips or semiconductor devices are heated and bonded on the wiring substrate. The apparatus includes at least a stage for chucking the wiring substrate fixedly; a heat source for heating the semiconductor chips or semiconductor devices out of contact therewith; and a controller for controlling the heating value of the heat source.

Abstract translation: 这里公开了一种半导体模块制造装置，其能够降低布线基板等的翘曲发生，以及布线基板和半导体芯片等之间的接合故障的发生，而不降低生产率。 半导体模块制造装置采用批量回流工艺，其同时加热一个，两个或更多个布线基板和至少两个或更多个半导体芯片或半导体器件。 在加热处理之后，半导体芯片或半导体器件被加热并接合在布线基板上。 该装置至少包括用于固定地夹持布线基板的台阶; 用于加热与其不接触的半导体芯片或半导体器件的热源; 以及用于控制热源的发热值的控制器。

公开(公告)号：US20070246818A1

公开(公告)日：2007-10-25

申请号：US11790081

申请日：2007-04-23

Applicant: Daisuke Ejima ,  Tsuyoshi Kida ,  Hiroshi Yamashita

Inventor： Daisuke Ejima ,  Tsuyoshi Kida ,  Hiroshi Yamashita

IPC: H01L23/48

CPC classification number: H01L23/3128 ,  H01L21/563 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8182 ,  H01L2224/81825 ,  H01L2224/85444 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3841 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor module includes a wiring board having a bottom surface and a top surface. A first solder electrode terminal has a given melting point, and is provided on the bottom surface of the wiring board. An electrode pad is provided on or above the top surface of the wiring board, and a second solder electrode terminal is soldered to the electrode pad at a temperature corresponding to the given melting point of the first solder electrode terminal by using a reflow process. The second solder electrode terminal contains an additional metal powder component diffused therein when being soldered to the electrode pad.

Abstract translation: 半导体模块包括具有底表面和顶表面的布线板。 第一焊料电极端子具有给定的熔点，并且设置在布线板的底表面上。 在布线板的上表面上或上方设置电极焊盘，通过使用回流工序，在与第一焊料电极端子的给定熔点相对应的温度下将第二焊料电极端子焊接到电极焊盘。 当焊接到电极焊盘时，第二焊料电极端子包含扩散在其中的另外的金属粉末组分。