摘要:
A semiconductor package structure comprises a substrate, a die bonded to the substrate, and one or more stud bump structures connecting the die to the substrate, wherein each of the stud bump structures having a stud bump and a solder ball encapsulating the stud bump to enhance thermal dissipation and reduce high stress concentrations in the semiconductor package structure.
摘要:
A semiconductor package includes a workpiece with a conductive trace and a chip with a conductive pillar. The chip is attached to the workpiece and a solder joint region is formed between the conductive pillar and the conductive trace. The silver (Ag) content in the solder layer is between 0.5 and 1.8 weight percent.
摘要:
A method includes vacuum annealing on a substrate having at least one solder bump to reduce voids at an interface of the at least one solder bump. A die is mounted over the substrate.
摘要:
The disclosure relates to fabrication of to a metal pillar. An exemplary method of fabricating a semiconductor device comprises the steps of providing a substrate having a contact pad; forming a passivation layer extending over the substrate having an opening over the contact pad; forming a metal pillar over the contact pad and a portion of the passivation layer; forming a solder layer over the metal pillar; and causing sidewalls of the metal pillar to react with an organic compound to form a self-assembled monolayer or self-assembled multi-layers of the organic compound on the sidewalls of the metal pillar.
摘要:
A package on package structure providing mechanical strength and warpage control includes a first package component, a second package component, and a first set of conductive elements coupling the first package component to the second package component. A first polymer-comprising material is molded on the first package component and surrounds the first set of conductive elements. The first polymer-comprising material has an opening therein exposing a top surface of the second package component. A third package component and a second set of conductive elements couples the second package component to the third package component.
摘要:
The described embodiments of mechanisms of forming a package on package (PoP) structure involve bonding with connectors with non-solder metal balls to a packaging substrate. The non-solder metal balls may include a solder coating layer. The connectors with non-solder metal balls can maintain substantially the shape of the connectors and control the height of the bonding structures between upper and lower packages. The connectors with non-solder metal balls are also less likely to result in bridging between connectors or disconnection (or cold joint) of bonded connectors. As a result, the pitch of the connectors with non-solder metal balls can be kept small.
摘要:
Embodiments of mechanisms for flattening a packaged structure are provided. The mechanisms involve a flattening apparatus and the utilization of protection layer(s) between the packaged structure and the surface(s) of the flattening apparatus. The protection layer(s) is made of a soft and non-sticking material to allow protecting exposed fragile elements of the packaged structure and easy separation after processing. The embodiments of flattening process involve flattening the warped packaged structure by pressure under elevated processing temperature. Processing under elevated temperature allows the package structure to be flattened within a reasonable processing time.
摘要:
A semiconductor package includes a workpiece with a conductive trace and a chip with a conductive pillar. The chip is attached to the workpiece and a solder joint region is formed between the conductive pillar and the conductive trace. The distance between the conductive pillar and the conductive trace is less than or equal to about 16 μm.
摘要:
The mechanisms of using an interposer frame to package a semiconductor die enables fan-out structures and reduces form factor for the packaged semiconductor die. The mechanisms involve using a molding compound to attach the semiconductor die to the interposer frame and forming a redistribution layer on one or both sides of the semiconductor die. The redistribution layer(s) in the package enables fan-out connections and formation of external connection structures. Conductive columns in the interposer frame assist in thermal management.
摘要:
This disclosure relates to a bump structure on a substrate including a copper layer, wherein the copper layer fills an opening created in a dielectric layer and a polymer layer. The bump structure further includes an under-bump-metallurgy (UBM) layer lines the opening and the copper layer is deposited over the UBM layer. The bump structure further includes a surface of the copper layer facing away from the substrate is curved. This disclosure also relates to two bump structures with different heights on a substrate where a thickness of the first bump structure is different than a thickness of the second bump structure. This disclosure also relates to a semiconductor device including a bump structure.