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1.HERMETIC WAFER-TO-WAFER BONDING WITH ELECTRICAL INTERCONNECTION 审中-公开
Title translation: 具有电气互连功能的电流波形与波形接合公开(公告)号:WO2011139862A3
公开(公告)日:2012-04-26
申请号:PCT/US2011034399
申请日:2011-04-28
Applicant: MEDTRONIC INC , RUBEN DAVID A , MATTES MICHAEL F , SMITH JONATHAN R
Inventor: RUBEN DAVID A , MATTES MICHAEL F , SMITH JONATHAN R
CPC classification number: H01L24/81 , A61B5/00 , A61B5/0402 , A61N1/375 , H01L21/76898 , H01L23/564 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/80 , H01L24/83 , H01L25/50 , H01L2224/0401 , H01L2224/05111 , H01L2224/05567 , H01L2224/05644 , H01L2224/05666 , H01L2224/114 , H01L2224/116 , H01L2224/13007 , H01L2224/13016 , H01L2224/13021 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2224/16111 , H01L2224/29111 , H01L2224/80896 , H01L2224/81193 , H01L2224/8121 , H01L2224/81815 , H01L2224/83194 , H01L2224/83801 , H01L2224/83894 , H01L2224/92 , H01L2224/9202 , H01L2224/9205 , H01L2224/9212 , H01L2924/0001 , H01L2924/00014 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/0132 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/19041 , H01L2924/3011 , H01L2224/80 , H01L2224/81 , H01L2924/01028 , H01L2224/13099 , H01L2924/00 , H01L2224/05552 , H01L2224/80001 , H01L2924/00012
Abstract: An implantable medical device (IMD) is disclosed. The !MD includes a first substrate having a front side and a backside. A first via is formed in the front side, the via extending from a bottom point in the front side to a first height located at a surface of the front side. A first conductive pad is formed in the first via, the first conductive pad having an exposed top surface lower than first height. A second substrate is coupled to the first substrate, the second substrate having a second via formed in the front side, the via extending from a bottom point in the front side to a second height located at a surface of the front side. A second conductive pad is formed in the second via, the second conductive pad having an exposed top surface lower than second height. The coupled substrates are heated until a portion of one or both conductive pads refiow, dewet, agglomerate, and merge to form an interconnect, hermetic seal, or both depending on the requirements of the device.
Abstract translation: 公开了可植入医疗装置(IMD)。 该MD包括具有前侧和后侧的第一基板。 第一通孔形成在前侧,通孔从前侧的底点延伸到位于前侧表面的第一高度。 第一导电焊盘形成在第一通孔中,第一导电焊盘具有低于第一高度的暴露的顶表面。 第二基板耦合到第一基板,第二基板具有形成在前侧的第二通孔,通孔从前侧的底点延伸到位于前侧表面的第二高度。 第二导电焊盘形成在第二通孔中,第二导电焊盘具有低于第二高度的暴露的顶表面。 耦合的衬底被加热直到根据器件的要求,一个或两个导电焊盘的一部分或者两个导电焊盘的一部分被反射,脱湿,聚集和合并以形成互连,气密密封或两者。
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公开(公告)号:WO2011158753A1
公开(公告)日:2011-12-22
申请号:PCT/JP2011/063374
申请日:2011-06-10
Applicant: 日立化成工業株式会社 , 岡田 千秋 , 山田 和彦 , 井上 愉加吏
IPC: C08L101/00 , C08K3/08 , H01L21/52
CPC classification number: H01L23/295 , C08K3/08 , C09D5/24 , C09D7/61 , H01L24/29 , H01L2224/2929 , H01L2224/29324 , H01L2224/29339 , H01L2224/83805 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01047 , H01L2924/01055 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/12042 , H01L2924/12044 , H01L2924/15747 , H01L2924/00 , H01L2924/01014 , H01L2924/00014 , H01L2924/00012 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299
Abstract: 本発明は、有機化合物、平均粒径が2~10μm以下の粒状アルミニウム粉及び平均粒径が1~5μm以下のフレーク状銀粉、を均一分散させてなる樹脂ペースト組成物、並びに、この樹脂ペースト組成物を用いて半導体素子を支持部材に接着した後、封止してなる半導体装置である。 本発明によれば、半導体チップなどの素子をリードフレームに接着するなどのために使用される樹脂ペースト組成物であって、希少価値が高く高価である銀を大量に使うことなく、電気伝導性、接着性に優れ、かつ作業性にも優れる、樹脂ペースト組成物を提供するとともに、生産性が高く、高信頼性の半導体装置を提供することができる。
Abstract translation: 公开了通过使有机化合物和平均粒径为2-10μm以下,平均粒径为1-5μm以下的鳞片状银粉均匀分散而形成的树脂糊剂组合物, 还公开了一种半导体器件,其在使用所述树脂糊剂组合物将半导体元件附接到支撑构件之后被密封。 所公开的树脂糊剂组合物用于将半导体芯片的元件粘合到引线框架上,并且具有优异的导电性,粘附性和可加工性,但是不使用具有高稀缺值并且成本高的大量银 。 所公开的半导体器件具有高生产率和高可靠性。
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3.USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING 审中-公开
Title translation: 在适用于叠加的集成电路中使用中断通过硅 - ⅥA公开(公告)号:WO2011026218A1
公开(公告)日:2011-03-10
申请号:PCT/CA2010/001321
申请日:2010-08-27
Applicant: GILLINGHAM, Peter B. , MOSAID TECHNOLOGIES INCORPORATED
Inventor: GILLINGHAM, Peter B.
CPC classification number: H01L25/0657 , G11C5/02 , G11C5/06 , H01L21/02697 , H01L21/82 , H01L23/481 , H01L23/5286 , H01L23/544 , H01L24/03 , H01L24/16 , H01L2223/54433 , H01L2223/5444 , H01L2224/0401 , H01L2224/06181 , H01L2225/06513 , H01L2225/0652 , H01L2225/06527 , H01L2225/06541 , H01L2225/06548 , H01L2225/06562 , H01L2924/01055 , H01L2924/01078 , H01L2924/14 , H03K17/00 , H01L2924/00
Abstract: In an integrated circuit (IC) adapted for use in a stack of interconnected ICs, interrupted through-silicon-vias (TSVs) are provided in addition to uninterrupted TSVs. The interrupted TSVs provide signal paths other than common parallel paths between the ICs of the stack. This permits IC identification schemes and other functionalities to be implemented using TSVs, without requiring angular rotation of alternate ICs of the stack.
Abstract translation: 在适用于一堆互连IC中的集成电路(IC)中,除了不间断TSV之外,还提供了中断的穿硅通孔(TSV)。 被中断的TSV提供堆叠的IC之间的通用并行路径以外的信号路径。 这允许使用TSV实现IC识别方案和其他功能,而不需要堆叠的替代IC的角度旋转。 p>
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4.ELECTROSTATIC DISCHARGE (ESD) SHIELDING FOR STACKED ICS 审中-公开
Title translation: 用于堆叠ICS的静电放电(ESD)屏蔽公开(公告)号:WO2010045413A1
公开(公告)日:2010-04-22
申请号:PCT/US2009/060764
申请日:2009-10-15
Applicant: QUALCOMM INCORPORATED , TOMS, Thomas R. , JALILIZEINALI, Reza , GU, Shiqun
Inventor: TOMS, Thomas R. , JALILIZEINALI, Reza , GU, Shiqun
IPC: H01L25/065 , H01L23/60
CPC classification number: H01L23/60 , H01L25/0657 , H01L2224/274 , H01L2924/01055 , H01L2924/12044
Abstract: An unassembled stacked IC device (60) includes an unassembled tier. (41) The unassembled stacked IC device also includes a first unpatterned layer (610) on the unassembled tier. The first unpatterned layer protects the unassembled tier from ESD events.
Abstract translation: 未组装的堆叠式IC器件(60)包括未组装的层。 (41)未组装的堆叠IC器件还包括在未组装层上的第一未图案化层(610)。 第一个无图案层保护未组装的层免受ESD事件的影响。
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公开(公告)号:WO2010016390A1
公开(公告)日:2010-02-11
申请号:PCT/JP2009/063172
申请日:2009-07-23
Applicant: 日立化成工業株式会社 , 南 久貴 , 税所 亮太 , 小野 裕
IPC: H01L21/304 , B24B37/00 , C09K3/14 , H01L21/3205 , H01L23/52
CPC classification number: C09K3/1463 , B24B37/044 , C09G1/02 , H01L21/3212 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L29/0657 , H01L2224/03616 , H01L2224/0401 , H01L2224/05026 , H01L2224/05073 , H01L2224/05082 , H01L2224/051 , H01L2224/05155 , H01L2224/05571 , H01L2224/05664 , H01L2224/11462 , H01L2224/13022 , H01L2224/131 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/94 , H01L2924/00014 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01037 , H01L2924/01038 , H01L2924/0104 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01056 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2924/3025 , H01L2224/11 , H01L2224/03 , H01L2224/05552
Abstract: 本発明のCMP研磨液は、1,2,4-トリアゾール、リン酸類、酸化剤及び砥粒を含有する。本発明の研磨方法は、基板と研磨布の間にCMP研磨液を供給しながら、前記基板を前記研磨布で研磨する、基板の研磨方法であって、前記基板は、パラジウム層を有する基板であり、前記CMP研磨液は、1,2,4-トリアゾール、リン酸類、酸化剤及び砥粒を含有するCMP研磨液である研磨方法である。
Abstract translation: 公开了一种用于CMP的抛光溶液,其包含1,2,4-三唑,磷酸组分,氧化剂和磨料颗粒。 还公开了一种用于抛光基材的方法,其包括在抛光布之间用抛光布抛光衬底,同时在衬底和抛光布之间提供用于CMP的抛光溶液,其中衬底具有钯层,并且用于CMP的抛光溶液包括1, 2,4-三唑,磷酸组分,氧化剂和磨料颗粒。
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公开(公告)号:WO2007102691A9
公开(公告)日:2008-12-11
申请号:PCT/KR2007001101
申请日:2007-03-06
Applicant: LG CHEMICAL LTD , KIM BYUNG-NAM , SONG HEON-SIK , KO JOO-EUN , PARK SOON-YONG , SHIM JUNG-JIN
Inventor: KIM BYUNG-NAM , SONG HEON-SIK , KO JOO-EUN , PARK SOON-YONG , SHIM JUNG-JIN
IPC: B32B15/08
CPC classification number: B32B15/08 , B32B7/02 , B32B15/20 , B32B27/08 , B32B27/281 , B32B2307/51 , B32B2457/08 , C23C26/00 , C23C28/00 , H01L23/4985 , H01L24/13 , H01L24/16 , H01L24/80 , H01L24/81 , H01L2224/16 , H01L2224/812 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01055 , H01L2924/01067 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H05K1/0346 , H05K1/036 , H05K3/022 , H05K2201/0154 , H05K2201/068 , Y10T428/24942 , Y10T428/2495 , Y10T428/266 , Y10T428/269 , Y10T428/31681
Abstract: The present invention provides a metallic laminate and a method for preparing the same. The metallic laminate includes a metal layer, and at least one polyimide resin layer. The polyimide resin layer has a modulus of elasticity of 70 Mpa at 400°C.
Abstract translation: 本发明提供一种金属层压体及其制备方法。 金属层压体包括金属层和至少一个聚酰亚胺树脂层。 聚酰亚胺树脂层在400℃下的弹性模量为70Mpa。
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7.METHODS AND MATERIALS USEFUL FOR CHIP STACKING, CHIP AND WAFER BONDING 审中-公开
Title translation: 用于芯片堆叠,芯片和波形结合的方法和材料公开(公告)号:WO2007109326A3
公开(公告)日:2008-07-17
申请号:PCT/US2007007029
申请日:2007-03-21
Applicant: PROMERUS LLC , APANIUS CHRIS , SHICK ROBERT A , NG HENDRA , BELL ANDREW , ZHANG WEI , NEAL PHIL
Inventor: APANIUS CHRIS , SHICK ROBERT A , NG HENDRA , BELL ANDREW , ZHANG WEI , NEAL PHIL
IPC: H01L21/98 , H01L25/065
CPC classification number: H01L24/29 , C08F32/00 , C08G64/0208 , C09D145/00 , H01L24/13 , H01L24/73 , H01L24/81 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/05568 , H01L2224/05573 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/274 , H01L2224/29 , H01L2224/29101 , H01L2224/2919 , H01L2224/29298 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73103 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/81191 , H01L2224/81903 , H01L2224/83191 , H01L2224/83193 , H01L2224/83203 , H01L2224/838 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06575 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01033 , H01L2924/01041 , H01L2924/01047 , H01L2924/01051 , H01L2924/01055 , H01L2924/01058 , H01L2924/01073 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/1461 , H01L2924/19042 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929 , H01L2224/05599
Abstract: Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.
Abstract translation: 公开了使用这种材料的材料和方法,其可用于形成芯片堆叠,芯片和晶片接合以及晶片薄化。 这样的方法和材料提供强的键,同时也很少或没有残留物容易地除去。
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公开(公告)号:WO2008076790A2
公开(公告)日:2008-06-26
申请号:PCT/US2007/087359
申请日:2007-12-13
Applicant: RAMBUS INC. , BEST, Scott , LI, Ming
Inventor: BEST, Scott , LI, Ming
IPC: G11C5/02
CPC classification number: G11C11/4093 , G11C5/02 , G11C5/025 , G11C5/04 , G11C11/4096 , H01L23/481 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L25/18 , H01L2224/0401 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/0652 , H01L2225/06541 , H01L2225/06558 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01055 , H01L2924/14 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/3011 , H01L2924/00012 , H01L2924/00
Abstract: An integrated circuit (IC) package includes an interface die and a separate storage die. The interface die has a synchronous interface to receive memory access commands from an external memory controller, and has a plurality of clockless memory control interfaces to output row and column control signals that correspond to the memory access commands. The storage die has a plurality of independently accessible storage arrays and corresponding access-control interfaces to receive the row and column control signals from the clockless memory control interfaces, each of the access-control interfaces including data output circuitry to output read data corresponding to a given one of the memory access commands in a time-multiplexed transmission.
Abstract translation: 集成电路(IC)封装包括接口管芯和单独的存储管芯。 接口管芯具有用于从外部存储器控制器接收存储器访问命令的同步接口,并且具有多个无时钟存储器控制接口以输出对应于存储器访问命令的行和列控制信号。 存储管芯具有多个可独立存取的存储阵列和相应的访问控制接口,用于接收来自无时钟存储器控制接口的行和列控制信号,每个访问控制接口包括数据输出电路,以输出对应于 给定时间复用传输中的一个存储器访问命令。
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9.SEMICONDUCTOR CHIP, TRANSPONDER AND METHOD OF MANUFACTURING A TRANSPONDER 审中-公开
Title translation: 半导体芯片,TRANSPONDER和制造TRANSPONDER的方法公开(公告)号:WO2007141686A1
公开(公告)日:2007-12-13
申请号:PCT/IB2007/051884
申请日:2007-05-16
Applicant: NXP B.V. , SCHERABON, Christian , SALFELNER, Anton , STEINBAUER, Wolfgang , SCHOBER, Joachim
Inventor: SCHERABON, Christian , SALFELNER, Anton , STEINBAUER, Wolfgang , SCHOBER, Joachim
IPC: G06K19/077
CPC classification number: G06K19/07749 , G06K19/07756 , H01L23/49855 , H01L23/642 , H01L23/645 , H01L24/06 , H01L24/14 , H01L24/17 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2223/6677 , H01L2224/0401 , H01L2224/13013 , H01L2224/13144 , H01L2224/1403 , H01L2224/17106 , H01L2224/2929 , H01L2224/293 , H01L2224/73204 , H01L2224/81191 , H01L2224/83851 , H01L2224/9211 , H01L2924/00011 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01033 , H01L2924/01055 , H01L2924/01061 , H01L2924/01079 , H01L2924/12042 , H01L2924/19041 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/00014 , H01L2224/81 , H01L2224/83 , H01L2224/29075 , H01L2924/00
Abstract: A semiconductor chip (1, 91) for a transponder (3, 93) comprises a chip substrate (4) with a surface (5), chip terminals (6, 7) arranged on the surface (5), and a passivation layer (22) covering the surface (5) and completely covering the chip terminals (6, 7), so that an antenna (2, 30) with antenna terminals (24, 25) can be attached to the chip (1, 91) above the chip terminals (6, 7), so that the chip terminals (6, 7), the passivation layer (22) and the antenna terminal (24, 25) form first capacitors.
Abstract translation: 用于应答器(3,93)的半导体芯片(1,91)包括具有表面(5)的芯片衬底(4),布置在表面(5)上的芯片端子(6,7)和钝化层 22)覆盖所述表面(5)并完全覆盖所述芯片端子(6,7),使得具有天线端子(24,25)的天线(2,30)可以附接到所述芯片(1,91)上方的所述芯片 芯片端子(6,7),使得芯片端子(6,7),钝化层(22)和天线端子(24,25)形成第一电容器。
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10.METHODS AND MATERIALS USEFUL FOR CHIP STACKING, CHIP AND WAFER BONDING 审中-公开
Title translation: 用于芯片堆叠,芯片和波形结合的方法和材料公开(公告)号:WO2007109326A2
公开(公告)日:2007-09-27
申请号:PCT/US2007/007029
申请日:2007-03-21
Applicant: PROMERUS LLC , APANIUS, Chris , SHICK, Robert, A. , NG, Hendra
Inventor: APANIUS, Chris , SHICK, Robert, A. , NG, Hendra
IPC: H01L21/98 , H01L25/065
CPC classification number: H01L24/29 , C08F32/00 , C08G64/0208 , C09D145/00 , H01L24/13 , H01L24/73 , H01L24/81 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/05568 , H01L2224/05573 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/274 , H01L2224/29 , H01L2224/29101 , H01L2224/2919 , H01L2224/29298 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73103 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/81191 , H01L2224/81903 , H01L2224/83191 , H01L2224/83193 , H01L2224/83203 , H01L2224/838 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06575 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01033 , H01L2924/01041 , H01L2924/01047 , H01L2924/01051 , H01L2924/01055 , H01L2924/01058 , H01L2924/01073 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/1433 , H01L2924/1461 , H01L2924/19042 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929 , H01L2224/05599
Abstract: Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.
Abstract translation: 公开了使用这种材料的材料和方法,其可用于形成芯片堆叠,芯片和晶片接合以及晶片薄化。 这样的方法和材料提供强的键,同时也很少或没有残留物容易地除去。
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