Methods and apparatuses for signal line termination
    91.
    发明授权
    Methods and apparatuses for signal line termination 有权
    信号线终端的方法和装置

    公开(公告)号:US06879181B2

    公开(公告)日:2005-04-12

    申请号:US10646385

    申请日:2003-08-21

    申请人: William Cornelius

    发明人: William Cornelius

    摘要: Methods and apparatuses for signal line termination with minimum current flowing through a termination node. In one embodiment, a voltage regulator is connected between a termination node and a system potential reference plane, which is typically system ground or Vss, to regulate a terminating potential, which can be used as a reference potential for the input buffers to receive the signals. The voltage regulator continuously adjusts the reference potential that will be used by the signal line input buffers to minimize the current flow into and out of the termination node of the signal lines.

    摘要翻译: 信号线终止的方法和装置,流过终端节点的最小电流。 在一个实施例中,电压调节器连接在终端节点和系统电位参考平面(通常为系统接地或Vss),以调节终止电位,其可用作输入缓冲器接收信号的参考电位 。 电压调节器连续调整信号线输入缓冲器将使用的参考电位,以最小化进入和离开信号线终端节点的电流。

    Method and apparatus for channel decoding of tail-biting convolutional codes
    92.
    发明授权
    Method and apparatus for channel decoding of tail-biting convolutional codes 有权
    尾巴卷积码的信道解码方法和装置

    公开(公告)号:US06877132B1

    公开(公告)日:2005-04-05

    申请号:US09330182

    申请日:1999-06-11

    IPC分类号: H03M13/23 H03M13/41

    摘要: A method for hard-decision channel decoding of tail-biting convolutional codes includes the step of receiving from a channel an input bit stream encoded by a tail-biting convolutional channel encoder. The encoder includes a number of memory elements and a rate. The input bit stream includes a series of symbols; each symbol includes a number of bits; the number of bits is related to the rate of the encoder. The method further includes the step of assuming a probability for each possible initial state of the encoder. The method further includes the step of decoding each symbol of the input bit stream using majority logic, with reference to a trellis structure corresponding to the encoder. The trellis structure represents: a number of states related to the number of memory elements of the encoder; a plurality of transitional branches; and a number of stages related to the number of symbols in the input bit stream.

    摘要翻译: 用于尾部卷积码的硬判决信道解码的方法包括从信道接收由尾巴卷积信道编码器编码的输入比特流的步骤。 编码器包括多个存储元件和速率。 输入比特流包括一系列符号; 每个符号包括多个位; 位数与编码器的速率有关。 该方法还包括为编码器的每个可能的初始状态假定概率的步骤。 该方法还包括参考与编码器对应的网格结构,使用多数逻辑解码输入比特流的每个符号的步骤。 网格结构表示:与编码器的存储器元件的数量相关的多个状态; 多个过渡分支; 以及与输入比特流中的符号数相关的多个级。

    Soft output decoder for convolutional codes
    93.
    发明授权
    Soft output decoder for convolutional codes 有权
    用于卷积码的软输出解码器

    公开(公告)号:US06868132B1

    公开(公告)日:2005-03-15

    申请号:US09502132

    申请日:2000-02-10

    摘要: Decoding signals represented by a trellis of block length N divided into windows of length L includes a step of decoding a backward recursion from a point P that is after the end of a window back to the end of the window. P is chosen at a sufficient distance from the end of the window such that backward recursion determines a known state metric at the end of the window. A next step includes decoding the window using backward recursion from the known state at the end of the window back to the beginning of the window to define a set of known backward recursion state metrics which are stored. A next step includes decoding using forward recursion starting from a known state at the beginning of the window and moving forward. A next step includes calculating a soft output at each stage of the forward recursion using the stored backward recursion state metrics, and branch metrics at each stage, and outputting the soft output for that stage.

    摘要翻译: 将由划分成长度L的窗口的块长度N的网格表示的解码信号包括从窗口结束后的点P返回到窗口结束之后的向后递归解码的步骤。 P选择距离窗口末端足够的距离,以便后向递归确定窗口末端的已知状态度量。 下一步骤包括使用从窗口结束处的已知状态到窗口的开始的反向递归来解码窗口,以定义一组已知的向后递归状态量度。 下一步包括使用从窗口开始处的已知状态开始并向前移动的正向递归的解码。 下一步包括使用存储的反向递归状态度量和每个阶段的分支度量来计算正向递归的每个阶段的软输出,并输出该阶段的软输出。

    Soft output decoder for convolutional codes
    97.
    发明授权
    Soft output decoder for convolutional codes 有权
    用于卷积码的软输出解码器

    公开(公告)号:US06856657B1

    公开(公告)日:2005-02-15

    申请号:US09501883

    申请日:2000-02-10

    摘要: Decoding signals represented by a trellis of block length N divided into windows of length L includes a step of decoding a forward recursion from a point P1 that is before the beginning of a window up to the beginning of the window and decoding a backward recursion from a point P2 that is after the end of a window back to the end of the window to define known states at the beginning and end of the window. A next step includes decoding the window using backward recursion from the known state at the end of the window back to the beginning of the window to define a set of backward recursion state metrics. A next step includes decoding using forward recursion starting from a known state at the beginning of the window and moving forward to the end of the window to define a set of forward recursion state metrics. A next step includes calculating a soft output at each stage of the window using the forward and backward recursion state metrics, and branch metrics at each stage, and outputting the soft output for that stage.

    摘要翻译: 将由划分成长度L的窗口的块长度N的网格表示的解码信号包括从窗口开始直到窗口开始之前的点P1解码正向递归的步骤,并从窗口解码向后递归 点P2在窗口结束之后返回到窗口的末尾,以在窗口的开头和结尾定义已知状态。 下一步骤包括使用从窗口结束处的已知状态到窗口开头的反向递归来解码窗口,以定义一组向后递归状态度量。 下一步包括使用从窗口开始处的已知状态开始的前向递归进行解码,并向前移动到窗口的末尾以定义一组向前递归状态度量。 下一步包括使用正向和反向递归状态量度以及每个阶段的分支度量计算窗口每一阶段的软输出,并输出该阶段的软输出。

    CDMA system transmission matrix coefficient calculation

    公开(公告)号:US20050013346A1

    公开(公告)日:2005-01-20

    申请号:US10920137

    申请日:2004-08-17

    CPC分类号: H04B1/7093 H04B2201/70707

    摘要: An apparatus and method for data processing particularly useful in combining convolutions of the spreading code, scrambling code and channel response in order to construct a system transmission coefficient matrix, while maintaining the same circuit size and execution time relative to performing each convolution separately. One register for processing real channel response values and a second register for processing imaginary channel response values, are used for moving channel responses through the convolution. In place of multipliers, an optimized minimum number of adders connected in a pyramid configuration are used to perform the necessary multiplication of the codes, for simplicity of construction. By including the channel code transformation from binary representation to complex representation as part of the overall method, unnecessary adders are eliminated from the apparatus.

    Apparatus and method for generating codes in communications system
    99.
    发明申请
    Apparatus and method for generating codes in communications system 有权
    通信系统中生成代码的装置和方法

    公开(公告)号:US20050010852A1

    公开(公告)日:2005-01-13

    申请号:US10914416

    申请日:2004-08-09

    摘要: An apparatus and method for generating an initial puncturing matrix from which a first sub-code is produced in a communication system is provided. The apparatus includes a turbo encoder for generating information symbols and first and second parity symbols for the input of an information bit stream and a sub-code generator for generating sub-codes from the information symbols and the first and second parity symbols using puncturing matrices. The method comprises the steps of selecting as many information symbols as a number of columns in the initial puncturing matrix from the information symbols output from the turbo encoder, if a difference between the number Ns of selected symbols in the initial puncturing matrix and the number of the columns in the initial puncturing matrix is equal to or greater than a number of component encoders in the turbo encoder and selecting as many first and second parity symbols as the difference.

    摘要翻译: 提供一种用于生成在通信系统中从其产生第一子代码的初始删余矩阵的装置和方法。 该装置包括用于产生信息符号的turbo编码器和用于输入信息比特流的第一和第二奇偶校验符号,以及用于使用穿孔矩阵从信息符号和第一和第二奇偶校验符号生成子码的子码发生器。 该方法包括以下步骤:如果初始穿孔矩阵中所选符号的数目Ns与初始穿孔矩阵的数目之间的差异,则从从turbo编码器输出的信息符号中选择与初始删余矩阵中的列数一样多的信息符号 初始删余矩阵中的列等于或大于turbo编码器中的分量编码器的数量,并且选择与差值相同的第一和第二奇偶校验符号。

    Bit error position estimation in data decoder
    100.
    发明申请
    Bit error position estimation in data decoder 有权
    数据解码器中的位错误位置估计

    公开(公告)号:US20050010840A1

    公开(公告)日:2005-01-13

    申请号:US10913076

    申请日:2004-08-06

    摘要: A bit error position is estimated. The estimation method includes generating data indicative of a substantial number of bit error locations in data frames. The generation of the data includes re-encoding decoded bit stream, mapping the bit stream to a first set of symbols, and determining a soft decision distance between a second set of symbols received through a data transmission channel and the first set of symbols. The generated data is then used to estimate the bit error locations. The estimation process includes capturing metric data for each bit in the data frame and obtaining derivative of the metric data. The derivative may be filtered for further processing. Error position estimation criteria may then be applied to estimate the bit error positions.

    摘要翻译: 估计一个位错误位置。 估计方法包括产生指示数据帧中大量位错误位置的数据。 数据的生成包括重新编码解码比特流,将比特流映射到第一组符号,以及确定通过数据传输信道接收的第二组符号与第一组符号之间的软判决距离。 然后使用生成的数据来估计位错误位置。 估计过程包括捕获数据帧中的每个比特的度量数据并获得量度数据的导数。 可以将衍生物过滤以进一步处理。 然后可以应用误差位置估计标准来估计位错误位置。