摘要:
A microelectronic package includes a light sensitive microelectronic element having a front face including one or more contacts and a rear surface, and conductive leads having first ends connected to the one or more contacts and second ends connected to one or more conductive pads adjacent the light sensitive microelectronic element. The package also includes an at least partially transparent encapsulant covering the light sensitive microelectronic element, the conductive leads and the one or more conductive pads, whereby the one or more conductive pads are exposed on a surface of the encapsulant.
摘要:
A stacked microelectronic assembly includes a dielectric element and a first and second microelectronic element stacked one on top of the other with the first microelectronic element underlying at least a portion of the second microelectronic element. The first microelectronic element and the second microelectronic element have front surfaces on which exposed on a central region of the front surface are contacts. A spacer layer may be provided under a portion of the second microelectronic element opposite a portion of the second microelectronic element overlying the first microelectronic element. Additionally, a third microelectronic element may be substituted in for the spacer layer so that the first microelectronic element and the third microelectronic element are underlying opposing sides of the second microelectronic element.
摘要:
Inductors are provided in chip assemblies such as in packaged semiconductor chips. The inductors may be incorporated in a chip carrier which forms part of the package, and may include, for example, spiral or serpentine inductors formed from traces on the chip carrier. The chip carrier may include a flap bearing the inductive element, and this flap may be bent to tilt the inductive element out of the plane of the chip carrier to reduce electromagnetic interaction between the inductive element and surrounding electrical components. Other inductors include solenoids formed in part by leads on the chip carrier as, for example, by displacing leads out of the plane of the chip carrier to form loops in vertically-extensive planes transverse to the plane of the chip carrier. Additional features provide trimming of the inductor to a desired inductance value during by breaking or connecting leads during assembly.
摘要:
A method of making a microelectronic assembly includes providing a first microelectronic element having a first surface and a plurality of contacts exposed at the first surface; providing a second microelectronic element having a top surface and a plurality of contacts exposed at the top surface, forming a plurality of conductive elastomeric posts that connect at least some of the contacts of the first microelectronic element to at least some of the contacts of the second microelectronic element, and injecting a compliant material between the first surface of the first microelectronic element and the top surface of the second microelectronic element to form a compliant layer.
摘要:
A method of electrically connecting a microelectronic component having a first surface bearing a plurality of contacts. The method including the steps of forming a subassembly by juxtaposing a connection component having a support structure and a plurality of elongated posts extending substantially parallel to one another from a first surface of the support structure with the microelectronic component so that the support structure overlies the surface of the component with the posts extending away from the component and electrically connecting the posts to the contacts of the microelectronic component.
摘要:
A stacked chip assembly includes individual units having chips mounted on dielectric layers and traces on the dielectric layers interconnecting the contacts of the chips with terminals disposed in peripheral regions of the dielectric layers. At least some of the traces are multi-branched traces which connect chip select contacts to chip select terminals. The units are stacked one above the other with corresponding terminals of the different units being connected to one another by solder balls or other conductive elements so as to form vertical buses. Prior to stacking, the multi-branched traces of the individual units are selectively connected, as by forming solder bridges, so as to leave chip select contacts of chips in different units connected to different chip select terminals and thereby connect these chips to different vertical buses. The individual units desirably are thin and directly abut one another so as to provide a low-height assembly with good heat transfer from chips within the stack.
摘要:
A microelectronic component having a plurality of leads are formed at their tip end with bondable material using a process including a mask of positive photoresist material. The leads can be rendered peelable from the substrate by, for example, plasma undercutting the leads. The tip ends of the leads can be bonded to contacts on an opposing microelectronic component, and separated therefrom in horizontal direction by virtue of the peelable leads to form S-shaped leads. The space between the microelectronic components can be filled with a compliant layer to form a microelectronic package.
摘要:
A microelectronic interposer is made by providing a sacrificial layer over the surface of a planar body. Apertures are formed passing through the body and the sacrificial layer. A layer of an electrically conductive structural material is deposited in each of the apertures and over the sacrificial layer, proximate to each aperture to thereby form contacts. The sacrificial layer is removed leaving the contacts with outwardly flaring peripheral portions spaced vertically above the surface of the planar body.
摘要:
A method of making a microelectronic package includes providing a first substrate having a top surface, providing a second substrate having a top surface including a plurality of conductive pads, a bottom surface remote therefrom and an opening extending between the top and bottom surfaces, and securing the second substrate over the first substrate so that the bottom surface of the second substrate confronts the top surface of the first substrate, wherein the first and second substrates have coefficients of thermal expansion that are substantially similar to one another. The method also includes placing a microelectronic element having a front face with contacts and a back face remote therefrom in the opening of the second substrate and securing the microelectronic element over the first substrate so that the back face of the microelectronic element confronts the top surface of the first substrate, and electrically interconnecting the contacts of the microelectronic element with the conductive pads of the second substrate.
摘要:
A connection component for a semiconductor chip includes a substrate having a gap over which extends a plurality of parallel spaced apart leads. The ends of the leads are adhered to the substrate either by being bonded to contacts or being embedded in the substrate. The connection component can be formed, in one embodiment, by stitch bonding wire leads across the gap. In another embodiment, a prefabricated lead assembly supporting spaced apart parallel leads is juxtaposed and transferred to the substrate. The connection component is juxtaposed overlying a semiconductor chip whereby leads extending over the gap may have one end detached and bonded to an underlying chip contact.