公开(公告)号：US20160111389A1

公开(公告)日：2016-04-21

申请号：US14893833

申请日：2015-03-31

Applicant: NIPPON MICROMETAL CORPORATION ,  NIPPON STEEL & SUMIKIN MATERIALS CO. LTD.

Inventor： Takashi YAMADA ,  Daizo ODA ,  Ryo OISHI ,  Teruo HAIBARA ,  Tomohiro UNO

IPC: H01L23/00 ,  C22C5/06 ,  C22F1/14 ,  C22C5/08

CPC classification number: H01L24/45 ,  B21C1/00 ,  B21C1/003 ,  B23K35/0227 ,  B23K35/3006 ,  C22C5/06 ,  C22C5/08 ,  C22F1/00 ,  C22F1/14 ,  H01L24/43 ,  H01L2224/4321 ,  H01L2224/43848 ,  H01L2224/45012 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2924/00011 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/013 ,  H01L2924/10253 ,  H01L2924/201 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/01049 ,  H01L2924/01045 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01016 ,  H01L2924/01017 ,  H01L2924/00015 ,  H01L2924/01201

Abstract: Bonding wire for semiconductor device use where both leaning failures and spring failures are suppressed by (1) in a cross-section containing the wire center and parallel to the wire longitudinal direction (wire center cross-section), there are no crystal grains with a ratio a/b of a long axis “a” and a short axis “b” of 10 or more and with an area of 15 μm2 or more (“fiber texture”), (2) when measuring a crystal direction in the wire longitudinal direction in the wire center cross-section, the ratio of crystal direction with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 50% to 90%, and (3) when measuring a crystal direction in the wire longitudinal direction at the wire surface, the ratio of crystal direction with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 50% to 90%. During the drawing step, a drawing operation with a rate of reduction of area of 15.5% or more is performed at least once. The final heat treatment temperature and the pre-final heat treatment temperature are made predetermined ranges.

Abstract translation: 用于半导体器件的接合线，其中通过（1）在包含线中心并且平行于线纵向（线中心横截面）的横截面中抑制倾斜故障和弹簧故障，不存在具有 长轴“a”的比率a / b和短轴“b”为10以上，面积为15μm2以上（“纤维织构”），（2）当测定线材纵向的晶体方向 在线中心横截面的方向上，相对于线纵向的角度差为15°以下的晶体方向<100>的面积比为50％〜90％，（3）当 在线表面测定线长方向的晶体方向，晶体方向<100>与线长度方向的角度差为15°以下的面积比为50％〜90％。 在拉伸步骤中，至少进行一次具有15.5％以上的面积减小率的拉拔操作。 将最终的热处理温度和预热处理温度设定为预定范围。

公开(公告)号：US20140370663A1

公开(公告)日：2014-12-18

申请号：US14296678

申请日：2014-06-05

Applicant: Infineon Technologies AG

Inventor： Reinhold Bayerer ,  Winfried Luerbke

IPC: H01L23/00 ,  H01L21/52

CPC classification number: H01L24/85 ,  H01L21/4853 ,  H01L21/4896 ,  H01L23/053 ,  H01L23/48 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45139 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/19107 ,  Y02P80/30 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/01005 ,  H01L2924/0104 ,  H01L2924/01202 ,  H01L2924/01201

Abstract: A semiconductor module is produced by providing a circuit carrier having a metallization, an electrically conductive wire and a bonding device. With the aid of the bonding device, a bonding connection is produced between the metallization and a first section of the wire. A separating location and a second section of the wire, the second section being spaced apart from the separating location, are defined on the wire. The wire is reshaped in the second section. Before or after reshaping, the wire is severed at the separating location, such that a terminal conductor of the semiconductor module is formed from a part of the wire. The terminal conductor is bonded to the metallization and having a free end at the separating location.

Abstract translation: 通过提供具有金属化的电路载体，导电线和接合装置来制造半导体模块。 借助于接合装置，在金属化和电线的第一部分之间产生接合连接。 电线的分离位置和第二部分被限定在电线上，第二部分与分离位置间隔开。 电线在第二部分重新整形。 在整形之前或之后，在分离位置处切断线，使得半导体模块的端子导体由导线的一部分形成。 端子导体被结合到金属化并且在分离位置处具有自由端。

公开(公告)号：US20130043593A1

公开(公告)日：2013-02-21

申请号：US13210453

申请日：2011-08-16

Applicant: Daniel Domes

Inventor： Daniel Domes

IPC: H01L23/535

CPC classification number: H01L25/072 ,  H01L23/3735 ,  H01L23/49833 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/291 ,  H01L2224/29339 ,  H01L2224/2939 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48132 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/00011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/3011 ,  H02M7/003 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01005 ,  H01L2924/01201 ,  H01L2924/00014

Abstract: A semiconductor arrangement includes a circuit carrier, a bonding wire and at least N half bridge circuits. N is an integer that amounts to at least 1. The circuit carrier includes a first metallization layer, a second metallization layer, an intermediate metallization layer arranged between the first metallization layer and the second metallization layer, a first insulation layer arranged between the intermediate metallization layer and the second metallization layer, and a second insulation layer arranged between the first metallization layer and the intermediate metallization layer. Each of the half bridge circuits includes a first circuit node, a second circuit node and a third circuit node, a controllable first semiconductor switch and a controllable second semiconductor switch. The controllable first semiconductor switch has a first main contact electrically connected to the first circuit node, a second main contact electrically connected to the third circuit node, and a gate contact for controlling an electric current between the first main contact and the second main contact. Accordingly, the controllable second semiconductor switch has a first main contact electrically connected to the second circuit node, a second main contact electrically connected to the third circuit node, and a gate contact for controlling an electric current between the first main contact and the second main contact. The first semiconductor switch and the second semiconductor switch of each of the half bridge circuits are arranged on that side of the first metallization layer facing away from the second insulation layer. The bonding wire is directly bonded to the intermediate metallization layer at a first bonding location.

Abstract translation: 半导体装置包括电路载体，接合线和至少N个半桥电路。 N是等于至少为1的整数。电路载体包括第一金属化层，第二金属化层，布置在第一金属化层和第二金属化层之间的中间金属化层，布置在中间金属化层之间的第一绝缘层 层和第二金属化层，以及布置在第一金属化层和中间金属化层之间的第二绝缘层。 半桥电路中的每一个包括第一电路节点，第二电路节点和第三电路节点，可控制的第一半导体开关和可控的第二半导体开关。 可控制的第一半导体开关具有电连接到第一电路节点的第一主触点，与第三电路节点电连接的第二主触头，以及用于控制第一主触点和第二主触点之间的电流的栅极触点。 因此，可控制的第二半导体开关具有电连接到第二电路节点的第一主触头，与第三电路节点电连接的第二主触点，以及用于控制第一主触点和第二主触点之间的电流的栅极触点 联系。 每个半桥电路的第一半导体开关和第二半导体开关被布置在第一金属化层的背离第二绝缘层的一侧。 接合线在第一接合位置处直接接合到中间金属化层。

公开(公告)号：US08237268B2

公开(公告)日：2012-08-07

申请号：US11725973

申请日：2007-03-20

Applicant: Ralf Otremba ,  Xaver Schloegel ,  Khai Huat Jeffrey Low ,  Chee Soon Law

Inventor： Ralf Otremba ,  Xaver Schloegel ,  Khai Huat Jeffrey Low ,  Chee Soon Law

IPC: H01L23/48

CPC classification number: H01L23/49503 ,  B81C1/00301 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/00 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/84 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/37144 ,  H01L2224/40245 ,  H01L2224/4103 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45624 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73213 ,  H01L2224/78301 ,  H01L2224/7865 ,  H01L2224/84801 ,  H01L2224/85045 ,  H01L2224/85099 ,  H01L2224/851 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85801 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1304 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2924/01016 ,  H01L2924/01026 ,  H01L2924/01201

Abstract: A module includes a semiconductor chip having at least a first terminal contact surface and a second terminal contact surface. A first bond element made of a material on the basis of Cu is attached to the first terminal contact surface, and a second bond element is attached to the second terminal contact surface. The second bond element is made of a material different from the material of the first bond element or is made of a type of bond element different from the type of the first bond element.

Abstract translation: 模块包括具有至少第一端子接触表面和第二端子接触表面的半导体芯片。 由基于Cu的材料制成的第一接合元件附接到第一端子接触表面，并且第二接合元件附接到第二端子接触表面。 第二结合元件由与第一结合元件的材料不同的材料制成，或者由不同于第一粘结元件的类型的粘结元件制成。

公开(公告)号：US20110058979A1

公开(公告)日：2011-03-10

申请号：US12740588

申请日：2008-09-11

Applicant: Hiroshi Murai ,  Jun Chiba ,  Fujio Amada

Inventor： Hiroshi Murai ,  Jun Chiba ,  Fujio Amada

IPC: C22C5/02

CPC classification number: C22C5/02 ,  B23K35/3013 ,  H01L24/02 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/43 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/78301 ,  H01L2224/78303 ,  H01L2224/78306 ,  H01L2224/85045 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/859 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01021 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/0106 ,  H01L2924/0107 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/01204 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/01071 ,  H01L2924/00014 ,  H01L2924/01201 ,  H01L2924/01202 ,  H01L2924/01203 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/013 ,  H01L2924/20752 ,  H01L2924/00013 ,  H01L2924/01006

Abstract: [Issues to be Solved] Second bonding failures caused by attached oxide of additive elements on high purity Au bonding wire are to be resolved.[Solution Means] Au alloy bonding wires comprising: 5-100 wt ppm Mg, 5-20 wt ppm In, 5-20 wt ppm Al, 5-20 wt ppm Yb, and residual Au of 99.995 wt % purity or higher, and adding 5-20 wt ppm Ca, and for these alloys adding at least one element among 5-20 wt ppm La, 5-20 wt ppm Lu, 5-100 wt ppm Sn, 5-100 wt ppm Sr to the alloy, and/or, moreover, adding 0.01-1.2 wt % Pd to these alloys. Bonding wire, which contains these trace additive elements do not cause a disturbance by accumulated contamination, because of contamination, which formed at ball formation by micro discharge and at the first bonding on the tip of the capillary, transferring to the wire at second bonding.

Abstract translation: [待解决的问题]解决了在高纯度Au接合线上附加元素的附着氧化物引起的第二次接合故障。 [解决方案]包括：5-100重量ppm的Mg，5-20重量ppm的In，5-20重量ppm的Al，5-20重量ppm的Yb和99.995重量％的纯度或更高的残余金，以及 添加5-20重量ppm的Ca，对于这些合金，在5-20重量ppm的La，5-20重量ppm的Lu，5-100重量ppm的Sn，5-100重量ppm的Sr中加入至少一种元素，并且 /或此外，向这些合金中添加0.01-1.2重量％的Pd。 含有这些微量添加元素的粘合线不会由于污染而引起累积污染的干扰，这是由于通过微量放电在第一次接合而形成的污染，并且在第二次接合时转移到导线。

公开(公告)号：US20080075626A1

公开(公告)日：2008-03-27

申请号：US11664102

申请日：2005-09-29

Applicant: Michitaka Mikami ,  Takatoshi Arikawa

Inventor： Michitaka Mikami ,  Takatoshi Arikawa

IPC: C22C5/02

CPC classification number: C22C5/02 ,  B23K35/3013 ,  H01L24/11 ,  H01L24/12 ,  H01L24/43 ,  H01L24/45 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/43 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00011 ,  H01L2924/01003 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/0106 ,  H01L2924/01063 ,  H01L2924/01064 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01105 ,  H01L2924/01204 ,  H01L2924/01205 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19043 ,  H01L2924/01062 ,  H01L2924/01004 ,  H01L2924/01039 ,  H01L2924/01201 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2924/00 ,  H01L2924/01049 ,  H01L2924/01006

Abstract: The present invention was held in order to resolve problems on above-mentioned conventional wire bumping material. This invention has the following purposes; (1) approximating Au—Ag alloy bumping balls to bond Al pads to ideal sphere shape (2) increasing assurance of Au—Ag alloy bump bonding to Al pads (3) shortening tail length of Au—Ag alloy bump (4) improving anti-Au consumption into solder (5) decreasing contamination of capillary tip by bump wire and hole around tip Means for resolution Au—Ag alloy for wire bumping comprising wherein Au, which purity is more than 99.99 mass %, comprising Au matrix and a particle of additive elements, consisting of 1 to 40 mass % Ag, which purity is more than 99.99 mass %.

Abstract translation: 本发明是为了解决上述现有的钢丝碰撞材料的问题而进行的。 本发明具有以下目的： （1）近似Au-Ag合金凸块，将Al焊盘接合到理想的球形（2）增加Au-Ag合金凸块接合到Al焊盘的保证（3）缩短Au-Ag合金凸块的尾部长度（4） - 消耗到焊料中（5）通过凸点焊丝减少毛细管尖端的污染和尖端附近的孔污染用于线材凸起的用于分辨率的Au-Ag合金的装置，其中纯度大于99.99质量％的Au包含Au基体和 添加元素由1〜40质量％Ag组成，纯度大于99.99质量％。

公开(公告)号：US09653390B2

公开(公告)日：2017-05-16

申请号：US14422573

申请日：2012-09-04

Applicant: Yosuke Nakata ,  Masayoshi Tarutani

Inventor： Yosuke Nakata ,  Masayoshi Tarutani

IPC: H01L23/48 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L23/498 ,  H01L24/01 ,  H01L24/03 ,  H01L24/08 ,  H01L24/11 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/034 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/16113 ,  H01L2224/16245 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73251 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/07025 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/20643 ,  H01L2924/20644 ,  H01L2924/20645 ,  H01L2924/20646 ,  H01L2924/20647 ,  H01L2924/20648 ,  H01L2924/20649 ,  H01L2924/2065 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/01201 ,  H01L2924/01014

Abstract: A semiconductor device of the present invention includes a semiconductor element, a surface electrode formed on a surface of the semiconductor element, a metal film formed on the surface electrode so as to have a joining portion and a stress relieving portion formed so as to border on and surround the joining portion, solder joined to the joining portion while avoiding the stress relieving portion, and an external electrode joined to the joining portion through the solder.

公开(公告)号：US20170057020A1

公开(公告)日：2017-03-02

申请号：US15248196

申请日：2016-08-26

Applicant: TANAKA DENSHI KOGYO K.K.

Inventor： Hiroyuki AMANO ,  Somei YARITA ,  Yusuke SAKITA ,  Yuki ANTOKU ,  Wei CHEN

IPC: B23K35/02 ,  C22C9/00 ,  C22C5/04 ,  C22C5/02 ,  B23K35/30 ,  B21C1/02 ,  C22F1/14 ,  C25D3/50 ,  C23C14/16 ,  C23C14/35 ,  C23C26/00 ,  B32B15/01 ,  C22C9/06 ,  C22F1/08

CPC classification number: B23K35/0227 ,  B21C1/02 ,  B23K35/302 ,  B32B15/018 ,  C22C5/02 ,  C22C5/04 ,  C22C9/00 ,  C22C9/06 ,  C22F1/08 ,  C22F1/14 ,  C23C14/165 ,  C23C14/35 ,  C23C26/00 ,  C25D3/50 ,  H01L2224/05624 ,  H01L2224/45 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2924/00011 ,  H01L2924/10253 ,  H01L2924/01201 ,  H01L2924/00012 ,  H01L2924/01016 ,  H01L2924/01005 ,  H01L2924/01015 ,  H01L2924/01006 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/01004 ,  H01L2924/013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01078 ,  H01L2924/01203 ,  H01L2924/01206

Abstract: A palladium coated copper wire for ball bonding includes a core formed of pure copper or copper alloy having a purity of 98% by mass or more, and a palladium draw coated layer coated on the core. The copper wire has a diameter of 10 to 25 μm, and the palladium drawn layer contains sulfur, phosphorus, boron or carbon.

Abstract translation: 用于球接的钯包铜线包括由纯度为98质量％以上的纯铜或铜合金形成的芯和涂覆在芯上的钯吸附涂层。 铜线的直径为10〜25μm，钯拉伸层含有硫，磷，硼或碳。

公开(公告)号：US09543266B2

公开(公告)日：2017-01-10

申请号：US14893789

申请日：2015-03-31

Applicant: Nippon Micrometal Corporation ,  Nippon Steel & Sumikin Materials Co., Ltd.

Inventor： Takashi Yamada ,  Daizo Oda ,  Ryo Oishi ,  Teruo Haibara ,  Tomohiro Uno

IPC: H01B5/00 ,  H01L23/00 ,  B21C1/00 ,  C22C5/06 ,  C22C5/08 ,  C22F1/00 ,  C22F1/14

CPC classification number: H01L24/45 ,  B21C1/00 ,  B21C1/003 ,  C22C5/06 ,  C22C5/08 ,  C22F1/00 ,  C22F1/14 ,  H01L24/43 ,  H01L2224/4321 ,  H01L2224/43848 ,  H01L2224/43986 ,  H01L2224/45012 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2924/00011 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/201 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/00 ,  H01L2924/01201 ,  H01L2924/01016 ,  H01L2924/01017 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/12044 ,  H01L2924/00015 ,  H01L2224/45664 ,  H01L2924/01049 ,  H01L2924/01045 ,  H01L2924/01004 ,  H01L2924/01005

Abstract: Bonding wire for semiconductor device use where both leaning failures and spring failures are suppressed by (1) in a cross-section containing the wire center and parallel to the wire longitudinal direction (wire center cross-section), there are no crystal grains with a ratio a/b of a long axis “a” and a short axis “b” of 10 or more and with an area of 15 μm2 or more (“fiber texture”), (2) when measuring a crystal direction in the wire longitudinal direction in the wire center cross-section, the ratio of crystal direction with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 10% to less than 50%, and (3) when measuring a crystal direction in the wire longitudinal direction at the wire surface, the ratio of crystal direction with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 70% or more. During the drawing step, a drawing operation with a rate of reduction of area of 15.5% or more is performed at least once. The final heat treatment temperature and the pre-final heat treatment temperature are made predetermined ranges.

Abstract translation: 用于半导体器件的接合线，其中通过（1）在包含线中心并且平行于线纵向（线中心横截面）的横截面中抑制倾斜故障和弹簧故障，不存在具有 长轴“a”的比率a / b和短轴“b”为10以上，面积为15μm2以上（“纤维织构”），（2）当测定线材纵向的晶体方向 线中心横截面的方向，晶体方向<100>相对于导线纵向方向的角度差为15°以下的面积比为10％以上且小于50％，（3 ）当在线表面测量线长度方向的晶体方向时，晶体方向<100>与线长度方向的角度差为15°以下的面积比为70％以上 。 在拉伸步骤中，至少进行一次具有15.5％以上的面积减小率的拉拔操作。 将最终的热处理温度和预热处理温度设定为预定范围。

公开(公告)号：US09379046B2

公开(公告)日：2016-06-28

申请号：US14752295

申请日：2015-06-26

Applicant: Infineon Technologies AG

Inventor： Ralf Otremba ,  Xaver Schloegel ,  Khai Huat Jeffrey Low ,  Chee Soon Law

IPC: H01L21/00 ,  H01L23/495 ,  H01L23/00 ,  B81C1/00

CPC classification number: H01L23/49503 ,  B81C1/00301 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/00 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/84 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/37144 ,  H01L2224/40245 ,  H01L2224/4103 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45624 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73213 ,  H01L2224/78301 ,  H01L2224/7865 ,  H01L2224/84801 ,  H01L2224/85045 ,  H01L2224/85099 ,  H01L2224/851 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85801 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1304 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2924/01016 ,  H01L2924/01026 ,  H01L2924/01201

Abstract: A module includes a semiconductor chip having at least a first terminal contact surface and a second terminal contact surface. A first bond element made of a material on the basis of Cu is attached to the first terminal contact surface, and a second bond element is attached to the second terminal contact surface. The second bond element is made of a material different from the material of the first bond element or is made of a type of bond element different from the type of the first bond element.