公开(公告)号：US20230207404A1

公开(公告)日：2023-06-29

申请号：US17561570

申请日：2021-12-23

Applicant: Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Veronica STRONG ,  Aleksandar ALEKSOV ,  Brandon RAWLINGS ,  Neelam PRABHU GAUNKAR

Inventor： Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Veronica STRONG ,  Aleksandar ALEKSOV ,  Brandon RAWLINGS ,  Neelam PRABHU GAUNKAR

IPC: H01L23/15 ,  H01L23/498 ,  H01L23/48 ,  H01L21/48

CPC classification number: H01L23/15 ,  H01L23/49827 ,  H01L23/481 ,  H01L21/486 ,  H05K1/0306

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a substrate, where the substrate comprises glass. In an embodiment, a via opening is formed through the substrate, where the via opening has an hourglass shaped profile. In an embodiment, a magnetic layer fills the via opening, and a via is through the magnetic layer. In an embodiment, sidewalls of the via are substantially vertical.

公开(公告)号：US20200006258A1

公开(公告)日：2020-01-02

申请号：US16024702

申请日：2018-06-29

Applicant: Aleksandar ALEKSOV ,  Thomas SOUNART ,  Kristof DARMAWIKARTA ,  Henning BRAUNISCH ,  Prithwish CHATTERJEE ,  Andrew J. BROWN

Inventor： Aleksandar ALEKSOV ,  Thomas SOUNART ,  Kristof DARMAWIKARTA ,  Henning BRAUNISCH ,  Prithwish CHATTERJEE ,  Andrew J. BROWN

IPC: H01L23/64 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48

Abstract: Embodiments include an electronic package that includes a dielectric layer and a capacitor on the dielectric layer. In an embodiment, the capacitor comprises a first electrode disposed over the dielectric layer and a capacitor dielectric layer over the first electrode. In an embodiment, the capacitor dielectric layer is an amorphous dielectric layer. In an embodiment, the electronic package may also comprise a second electrode over the capacitor dielectric layer.

公开(公告)号：US20180084643A1

公开(公告)日：2018-03-22

申请号：US15267872

申请日：2016-09-16

Applicant: Amit Sudhir Baxi ,  Vincent S. Mageshkumar ,  Adel A. Elsherbini ,  Sasha Oster ,  Feras Eid ,  Aleksandar Aleksov ,  Johanna M. Swan

Inventor： Amit Sudhir Baxi ,  Vincent S. Mageshkumar ,  Adel A. Elsherbini ,  Sasha Oster ,  Feras Eid ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: H05K1/14 ,  H05K1/18 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/147 ,  A61B5/00 ,  A61B5/6833 ,  A61B2562/164 ,  A61B2562/166 ,  H05K1/0283 ,  H05K1/112 ,  H05K1/181 ,  H05K3/365 ,  H05K2201/10151 ,  H05K2201/10265 ,  H05K2201/10303 ,  H05K2201/10318

Abstract: A circuit interconnect may be used in biometric data sensing and feedback applications. A circuit interconnect may be used in device device-to-device connections (e.g., Internet of Things (IoT) devices), including applications that require connection between stretchable and rigid substrates. A circuit interconnect may include a multi-pin, snap-fit attachment mechanism, where the attachment mechanism provides an electrical interconnection between a rigid substrate and a flexible or stretchable substrate. The combination of a circuit interconnect and flexible or stretchable substrate provides improved electrical connection reliability, allows for greater stretchability and flexibility of the circuit traces, and allows for more options in connecting a stretchable circuit trace to a rigid PCB.

公开(公告)号：US20170094749A1

公开(公告)日：2017-03-30

申请号：US14866625

申请日：2015-09-25

Applicant: Adel Elsherbini ,  Sasha Oster ,  Nadine L. Dabby ,  Aleksandar Aleksov ,  Braxton Lathrop ,  Feras Eid

Inventor： Adel Elsherbini ,  Sasha Oster ,  Nadine L. Dabby ,  Aleksandar Aleksov ,  Braxton Lathrop ,  Feras Eid

IPC: H05B33/28 ,  A42B1/00 ,  A41D1/00 ,  F21V33/00 ,  H05B33/06 ,  A41B1/08 ,  H05B33/04

CPC classification number: H05B33/28 ,  A41B1/08 ,  A41D1/002 ,  A42B1/004 ,  A42B1/242 ,  F21V33/0008 ,  H05B33/04 ,  H05B33/06

Abstract: Some forms relate to a stretchable computing display device. The stretchable computing display device includes a stretchable base; a patterned conductive section mounted on the stretchable base, wherein the patterned conductive section includes a first portion and a second portion that is electrically isolated from the first portion; an electroluminescent material mounted on the stretchable base such that the electroluminescent material is between the first portion and the second portion of the patterned conductive section; an encapsulant that covers at least a portion of the patterned conductive section; and a textile such that the stretchable base is mounted on the textile, wherein the textile is part of a garment.

公开(公告)号：US20170093007A1

公开(公告)日：2017-03-30

申请号：US14866693

申请日：2015-09-25

Applicant: Adel A. ELSHERBINI ,  Mathew Manusharow ,  Krishna Bharath ,  Zhichao Zhang ,  Yidnekachew S. Mekonnen ,  Aleksandar Aleksov ,  Henning Braunisch ,  Feras Eid ,  Javier Soto

Inventor： Adel A. ELSHERBINI ,  Mathew Manusharow ,  Krishna Bharath ,  Zhichao Zhang ,  Yidnekachew S. Mekonnen ,  Aleksandar Aleksov ,  Henning Braunisch ,  Feras Eid ,  Javier Soto

IPC: H01P3/08

CPC classification number: H05K1/0245 ,  H01P3/02 ,  H01P3/026 ,  H01P3/08 ,  H01P3/085 ,  H01P3/088

Abstract: Embodiments of the invention include a packaged device with transmission lines that have an extended thickness, and methods of making such device. According to an embodiment, the packaged device may include a first dielectric layer and a first transmission line formed over the first dielectric layer. Embodiments may then include a second dielectric layer formed over the transmission line and the first dielectric layer. According to an embodiment, a first line via may be formed through the second dielectric layer and electrically coupled to the first transmission line. In some embodiments, the first line via extends substantially along the length of the first transmission line.

公开(公告)号：US09257276B2

公开(公告)日：2016-02-09

申请号：US13977663

申请日：2011-12-31

Applicant: Aleksandar Aleksov ,  Tony Dambrauskas ,  Danish Faruqui ,  Mark S. Hlad ,  Edward R. Prack

Inventor： Aleksandar Aleksov ,  Tony Dambrauskas ,  Danish Faruqui ,  Mark S. Hlad ,  Edward R. Prack

IPC: H01L23/488 ,  H01L21/02 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L21/683 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L24/11 ,  H01L21/02118 ,  H01L21/02263 ,  H01L21/0234 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/3205 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/76883 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/3142 ,  H01L23/49894 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/1162 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81026 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/81375 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/81913 ,  H01L2224/831 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Electronic assemblies and their manufacture are described. One embodiment relates to a method including depositing an organic thin film layer on metal bumps on a semiconductor wafer, the organic thin film layer also being formed on a surface adjacent to the metal bumps on the wafer. The wafer is diced into a plurality of semiconductor die structures, the die structures including the organic thin film layer. The semiconductor die structures are attached to substrates, wherein the attaching includes forming a solder bond between the metal bumps on a die structure and bonding pads on a substrate, and wherein the solder bond extends through the organic thin film layer. The organic thin film layer is then exposed to a plasma. Other embodiments are described and claimed.

Abstract translation: 描述了电子组件及其制造。 一个实施例涉及一种方法，包括在半导体晶片上的金属凸块上沉积有机薄膜层，该有机薄膜层也形成在与晶片上的金属凸块相邻的表面上。 将晶片切割成多个半导体管芯结构，该管芯结构包括有机薄膜层。 半导体管芯结构附着到基板上，其中，附接包括在管芯结构上的金属凸块和衬底上的焊盘之间形成焊料接合，并且其中焊料接合延伸穿过有机薄膜层。 然后将有机薄膜层暴露于等离子体。 描述和要求保护其他实施例。

公开(公告)号：US09233835B2

公开(公告)日：2016-01-12

申请号：US13992791

申请日：2011-12-06

Applicant: Aleksandar Aleksov ,  Sanka Ganesan

Inventor： Aleksandar Aleksov ,  Sanka Ganesan

IPC: H05K7/10 ,  B81B7/00 ,  B23K35/02 ,  H01L23/498 ,  H05K3/34 ,  H01L23/00

CPC classification number: B81B7/0006 ,  B23K35/0288 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/1132 ,  H01L2224/11474 ,  H01L2224/11849 ,  H01L2224/11903 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/14177 ,  H01L2224/14179 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2924/01322 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/09418 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00

Abstract: The present description relates to the field of fabricating microelectronic assemblies, wherein a microelectronic device may be attached to a microelectronic substrate with a plurality of shaped and oriented solder joints. The shaped and oriented solder joints may be substantially oval, wherein the major axis of the substantially oval solder joints may be substantially oriented toward a neutral point or center of the microelectronic device. Embodiments of the shaped and oriented solder joint may reduce the potential of solder joint failure due to stresses, such as from thermal expansion stresses between the microelectronic device and the microelectronic substrate.

Abstract translation: 本说明书涉及制造微电子组件的领域，其中微电子器件可以附接到具有多个成形和取向的焊点的微电子衬底。 成形和定向的焊接接头可以是基本上椭圆形的，其中基本上椭圆形焊点的长轴可以基本上朝向微电子器件的中性点或中心定向。 成形和取向的焊接接头的实施例可以减少由于应力（例如来自微电子器件和微电子衬底之间的热膨胀应力）引起的焊点故障的可能性。

公开(公告)号：US20150279774A1

公开(公告)日：2015-10-01

申请号：US14229405

申请日：2014-03-28

Applicant: Aleksandar ALEKSOV ,  Johanna M. SWAN

Inventor： Aleksandar ALEKSOV ,  Johanna M. SWAN

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L24/11 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/03 ,  H01L24/06 ,  H01L24/17 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/81801 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2924/00014

Abstract: An apparatus including a planar semiconductor substrate including a plurality of devices and a first pattern of electrical contacts formed on the first surface of the semiconductor substrate; and a plurality of layers of conductive material alternating between dielectric material on the first surface of the semiconductor substrate, the plurality of layers of conductive material including a wiring layer including a second pattern of electrical contacts, wherein the second surface of the semiconductor substrate includes openings to the first pattern of electrical contacts. A method including forming a space transformer including a semiconductor substrate including, on a device side, a device region, a first pattern of electrical contacts, and at least one routing layer and a pad layer including a second pattern of electrical contacts; and forming openings through the space transformer to the first pattern of electrical contacts on the semiconductor substrate.

Abstract translation: 一种包括形成在所述半导体衬底的所述第一表面上的多个器件的平面半导体衬底和电接触的第一图案的设备; 以及在所述半导体衬底的所述第一表面上的电介质材料之间交替的多层导电材料，所述多层导电材料包括包括第二电接触图案的布线层，其中所述半导体衬底的所述第二表面包括开口 到第一个电触点模式。 一种包括形成包括半导体衬底的空间变换器的方法，该半导体衬底在器件侧包括器件区域，第一电接触图案，以及至少一个布线层和包括第二电触点图案的衬垫层; 以及通过所述空间变压器形成到所述半导体衬底上的所述第一图形的电触点的开口。

公开(公告)号：US20140177158A1

公开(公告)日：2014-06-26

申请号：US13725356

申请日：2012-12-21

Applicant: Aleksandar Aleksov ,  Shawna M. Liff

Inventor： Aleksandar Aleksov ,  Shawna M. Liff

IPC: H01L23/00 ,  G06F1/20 ,  G06F1/18

CPC classification number: H01L24/80 ,  C08G8/30 ,  C08G2261/3424 ,  C09J5/00 ,  C09J161/14 ,  C09J163/00 ,  C09J165/00 ,  C09J2203/326 ,  C09J2400/163 ,  G06F1/20 ,  G06F2200/201 ,  H01L23/02 ,  H01L23/3672 ,  H01L23/3737 ,  H01L23/433 ,  H01L24/01 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0384 ,  H01L2224/04026 ,  H01L2224/05638 ,  H01L2224/05688 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2731 ,  H01L2224/2732 ,  H01L2224/27416 ,  H01L2224/27418 ,  H01L2224/27422 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83484 ,  H01L2224/83487 ,  H01L2224/83862 ,  H01L2224/83986 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/171 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/05442 ,  H01L2924/05342 ,  H01L2924/095 ,  H01L2924/0665 ,  H01L2924/0715 ,  H01L2924/00012 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/07001 ,  H01L2924/014 ,  H01L2924/04953

Abstract: A thermal matched composite material, suitable for use as a die is described. In one example, the material includes a metal plate and a substrate having a coefficient of thermal expansion (CTE) lower than the metal plate to carry microelectronic circuits. An adhesive layer between the substrate and the metal plate physically attaches the metal plate to the substrate so that the combined metal plate and substrate have a higher CTE than the substrate alone.

Abstract translation: 描述适合用作模具的热匹配复合材料。 在一个示例中，材料包括金属板和具有低于金属板的热膨胀系数（CTE）的基板，以承载微电子电路。 基板和金属板之间的粘合剂层将金属板物理地附接到基板，使得组合的金属板和基板具有比单独的基板更高的CTE。

公开(公告)号：US20140165269A1

公开(公告)日：2014-06-19

申请号：US13717909

申请日：2012-12-18

Applicant: ALEKSANDAR ALEKSOV ,  RAVINDRANATH V. MAHAJAN ,  SAIRAM AGRAHARAM ,  IAN A. YOUNG ,  JOHN C. JOHNSON ,  DEBENDRA MALLIK ,  JOHN S. GUZEK

Inventor： ALEKSANDAR ALEKSOV ,  RAVINDRANATH V. MAHAJAN ,  SAIRAM AGRAHARAM ,  IAN A. YOUNG ,  JOHN C. JOHNSON ,  DEBENDRA MALLIK ,  JOHN S. GUZEK

IPC: H05K1/02 ,  H05K3/30 ,  A41D31/00

CPC classification number: A41D31/00 ,  H05K1/0274 ,  H05K1/038 ,  H05K1/188 ,  H05K3/323 ,  H05K3/3436 ,  Y10T29/4913

Abstract: A flexible computing fabric and a method of forming thereof. The flexible computing fabric includes an electronic substrate including one or more channels and including at least two ends. At least one computational element is mounted on the electronic substrate between the two ends and at least one functional element is mounted on the electronic substrate between the two ends. The channels form an interconnect between the elements. In addition, the electronic substrate is flexible and exhibits a flexural modulus in the range of 0.1 GPa to 30 GPa.

Abstract translation: 一种灵活的计算结构及其形成方法。 柔性计算结构包括包括一个或多个通道并且包括至少两个端部的电子基板。 至少一个计算元件安装在两端之间的电子基板上，并且至少一个功能元件安装在两端之间的电子基板上。 通道形成元件之间的互连。 此外，电子基板是柔性的并且具有在0.1GPa至30GPa范围内的挠曲模量。