公开(公告)号：US07923296B2

公开(公告)日：2011-04-12

申请号：US12385946

申请日：2009-04-24

申请人： Hyun-soo Chung ,  Dong-hyeon Jang ,  Dong-ho Lee ,  In-young Lee

发明人： Hyun-soo Chung ,  Dong-hyeon Jang ,  Dong-ho Lee ,  In-young Lee

IPC分类号： H01L21/00

CPC分类号： H01L23/3128 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： A ball grid array type board on chip package may include an integrated circuit chip having an active surface that supports a plurality of contact pads. An interposer may be adhered to the active surface of the integrated circuit chip. At least one hole may be provided through the interposer to expose the contact pads. A board, which may have a first surface supporting a plurality of metal lines, may have a second surface adhered to the interposer. The board may have an opening through which the contact pads may be exposed. A plurality of bonding wires may connect the contact pads to the metal lines through the opening.

摘要翻译： 球栅阵列型片上芯片封装可以包括具有支撑多个接触焊盘的有源表面的集成电路芯片。 插入器可以粘附到集成电路芯片的有源表面。 可以通过插入件提供至少一个孔以暴露接触垫。 可以具有支撑多个金属线的第一表面的板可以具有粘附到插入件的第二表面。 板可以具有开口，接触垫可以穿过该开口露出。 多个接合线可以通过开口将接触垫连接到金属线。

公开(公告)号：US07897511B2

公开(公告)日：2011-03-01

申请号：US12053478

申请日：2008-03-21

申请人： In-Young Lee ,  Ho-Jin Lee ,  Hyun-Soo Chung ,  Ju-Il Choi ,  Son-Kwan Hwang

发明人： In-Young Lee ,  Ho-Jin Lee ,  Hyun-Soo Chung ,  Ju-Il Choi ,  Son-Kwan Hwang

IPC分类号： H01L21/44

CPC分类号： H01L21/76898 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2224/05552

摘要： A method of manufacturing a semiconductor device includes forming an integrated circuit region on a semiconductor wafer. A first metal layer pattern is formed over the integrated circuit region. A via hole is formed to extend through the first metal layer pattern and the integrated circuit region. A final metal layer pattern is formed over the first metal layer pattern and within the via hole. A plug is formed within the via hole. Thereafter, a passivation layer is formed to overlie the final metal layer pattern.

摘要翻译： 一种制造半导体器件的方法包括在半导体晶片上形成集成电路区域。 在集成电路区域上形成第一金属层图案。 通孔形成为延伸穿过第一金属层图案和集成电路区域。 最终的金属层图案形成在第一金属层图案之上并且在通孔内。 在通孔内形成插头。 此后，形成钝化层以覆盖最终金属层图案。

公开(公告)号：US20100327422A1

公开(公告)日：2010-12-30

申请号：US12639241

申请日：2009-12-16

申请人： Ho-jin LEE ,  Dong-hyun Jang ,  In-young Lee ,  Min-seung Yoon ,  Son-kwan Hwang

发明人： Ho-jin LEE ,  Dong-hyun Jang ,  In-young Lee ,  Min-seung Yoon ,  Son-kwan Hwang

IPC分类号： H01L23/538 ,  H01L23/48 ,  H01L21/768

CPC分类号： H01L24/13 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13009 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29298 ,  H01L2224/83194 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/05552

摘要： A semiconductor chip, a method of fabricating the same, and a stack module and a memory card including the semiconductor chip include a first surface and a second surface facing the first surface is provided. At least one via hole including a first portion extending in a direction from the first surface of the substrate to the second surface of the substrate and a second portion that is connected to the first portion and has a tapered shape. At least one via electrode filling the at least one via hole is provided.

摘要翻译： 提供一种半导体芯片及其制造方法，以及包括半导体芯片的堆叠模块和存储卡，其包括第一表面和面对第一表面的第二表面。 至少一个通孔，包括在从基板的第一表面到基板的第二表面的方向上延伸的第一部分和连接到第一部分并具有锥形形状的第二部分。 提供至少一个填充至少一个通孔的通孔电极。

公开(公告)号：US07768206B2

公开(公告)日：2010-08-03

申请号：US11556309

申请日：2006-11-03

申请人： In Young Lee

发明人： In Young Lee

IPC分类号： H01J17/49

CPC分类号： H01J11/40 ,  H01J11/12

摘要： Disclosed is a plasma display panel with improved discharge characteristics. The plasma display panel comprises an upper panel and a lower panel integrally joined to the upper panel through barrier ribs wherein the upper panel includes a dielectric layer, a first protective film formed on one surface of the dielectric layer and composed of columnar magnesium oxide crystal particles, and a second protective film formed on the first protective film and composed of hexahedral magnesium oxide crystal particles.

摘要翻译： 公开了具有改善的放电特性的等离子体显示面板。 等离子体显示面板包括上面板和下面板，其通过隔壁与上板一体接合，其中上面板包括电介质层，形成在电介质层的一个表面上并由柱状氧化镁晶体颗粒构成的第一保护膜 以及形成在第一保护膜上并由六面体氧化镁晶体颗粒构成的第二保护膜。

公开(公告)号：US07592283B2

公开(公告)日：2009-09-22

申请号：US11262159

申请日：2005-10-28

申请人： Jung Bin Lee ,  Tae Won Lee ,  Kwang Chul Song ,  In Young Lee

发明人： Jung Bin Lee ,  Tae Won Lee ,  Kwang Chul Song ,  In Young Lee

IPC分类号： B01J38/60 ,  B01J38/04

CPC分类号： B01J23/92 ,  B01J38/60 ,  Y10S502/514 ,  Y10S502/516 ,  Y10S502/517

摘要： Provided is a method of regenerating a honeycomb type SCR catalyst which is used in selective catalytic reduction (SCR), comprising treating a waste honeycomb type SCR catalyst used in an industrial boiler with a mixed solution containing 0.1 M to 1.0 M H2SO4, 0.005 M to 0.1 M NH4VO3 and 0.005 M to 0.1 M 5(NH4)2O.12WO3.5H2O in an air lift loop reactor.

摘要翻译： 本发明提供一种再生催化还原催化剂用SCR催化剂的方法，其特征在于，将工业锅炉中使用的废蜂窝型SCR催化剂用0.1M〜1.0M的H 2 SO 4，0.005M的混合溶液处理， 0.1M NH4VO3和0.005M至0.1M5（NH4）2O.12WO3.5H2O在空气提升环管反应器中。

公开(公告)号：US20080122116A1

公开(公告)日：2008-05-29

申请号：US11942529

申请日：2007-11-19

申请人： Myeong-Soon PARK ,  In-Young LEE ,  Ho-Jin LEE ,  Yong-Tae OH

发明人： Myeong-Soon PARK ,  In-Young LEE ,  Ho-Jin LEE ,  Yong-Tae OH

IPC分类号： H01L21/58 ,  H01L23/522

CPC分类号： H01L25/0657 ,  H01L23/296 ,  H01L23/481 ,  H01L24/12 ,  H01L24/16 ,  H01L24/90 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/90 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01078 ,  H01L2924/01079

摘要： Provided are a method of forming a metal layer wiring structure on the backside of a wafer, a metal layer wiring structure formed using the method, a method of stacking a chip package, and a chip package stack structure formed using the method. The method of stacking a chip package includes: forming recess patterns on a backside of wafers; forming a passivation layer on the backside of the wafers except for an area corresponding to a through electrode; forming a metal layer on the passivation layer; planarizing the metal layers to expose only the recess patterns; forming a lower insulating layer on the planarized metal layers except for an area corresponding to a contact portion with another wafer; forming an adhesive layer on the lower insulating layer of each of the wafers; and adhering the wafers to one another, wherein the recess patterns are formed using a laser.

摘要翻译： 提供了在晶片的背面形成金属层布线结构的方法，使用该方法形成的金属层布线结构，堆叠芯片封装的方法以及使用该方法形成的芯片封装堆叠结构。 堆叠芯片封装的方法包括：在晶片的背面形成凹陷图案; 在除了对应于通孔的区域之外的晶片的背面上形成钝化层; 在钝化层上形成金属层; 平坦化金属层以仅露出凹部图案; 在除了与另一晶片的接触部分相对应的区域之外的平坦化金属层上形成下绝缘层; 在每个晶片的下绝缘层上形成粘合剂层; 并且将晶片彼此粘合，其中使用激光形成凹部图案。

公开(公告)号：US20080036081A1

公开(公告)日：2008-02-14

申请号：US11875713

申请日：2007-10-19

申请人： Se-Young JEONG ,  Sung-Min SIM ,  Soon-Bum KIM ,  In-Young LEE ,  Young-Hee SONG

发明人： Se-Young JEONG ,  Sung-Min SIM ,  Soon-Bum KIM ,  In-Young LEE ,  Young-Hee SONG

IPC分类号： H01L23/48

CPC分类号： H01L24/05 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05018 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

摘要： An interconnection structure includes an integrated circuit (IC) chip having internal circuitry and a terminal to electrically connect the internal circuitry to an external circuit, a passivation layer disposed on a top surface of the IC chip, the passivation layer configured to protect the internal circuitry and to expose the terminal, an input/output (I/O) pad, where the I/O pad includes a first portion in contact with the terminal and a second portion that extends over the passivation layer, and an electroless plating layer disposed on the I/O pad.

摘要翻译： 互连结构包括具有内部电路的集成电路（IC）芯片和用于将内部电路电连接到外部电路的端子，设置在IC芯片的顶表面上的钝化层，该钝化层被配置为保护内部电路 以及使所述终端暴露于所述I / O焊盘包括与所述端子接触的第一部分和在所述钝化层上延伸的第二部分的输入/输出（I / O）焊盘，以及设置在所述钝化层上的无电镀层 I / O板。

公开(公告)号：US20060113681A1

公开(公告)日：2006-06-01

申请号：US11330107

申请日：2006-01-12

申请人： Se-young Jeong ,  Nam-seog Kim ,  Oh-se Yong ,  Soon-bum Kim ,  Sun-young Park ,  Ju-hyun Lyu ,  In-young Lee

发明人： Se-young Jeong ,  Nam-seog Kim ,  Oh-se Yong ,  Soon-bum Kim ,  Sun-young Park ,  Ju-hyun Lyu ,  In-young Lee

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  B23K3/0607 ,  B23K3/0623 ,  H01L21/2885 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13012 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/1601 ,  H01L2224/81141 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/111 ,  H05K3/243 ,  H05K3/3436 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09745 ,  H05K2201/10674 ,  H05K2203/048 ,  H05K2203/167 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

摘要： A reinforced solder bump connector structure is formed between a contact pad arranged on a semiconductor chip and a ball pad arranged on a mounting substrate. The semiconductor chip includes at least one reinforcing protrusion extending upwardly from a surface of an intermediate layer. The mounting substrate includes at least one reinforcing protrusion extending upwardly from a ball pad, the protrusions from both the chip and the substrate being embedded within the solder bump connector. In some configurations, the reinforcing protrusions from the contact pad and the ball pad are sized and arranged to have overlapping upper portions. These overlapping portions may assume a wide variety of configurations that allow the protrusions to overlap without contacting each other including pin arrays and combinations of surrounding and surrounded elements. In each configuration, the reinforcing protrusions will tend to suppress crack formation and/or crack propagation thereby improving reliability.

摘要翻译： 在布置在半导体芯片上的接触焊盘和布置在安装基板上的球垫之间形成加强焊料凸块连接器结构。 半导体芯片包括从中间层的表面向上延伸的至少一个增强突起。 安装基板包括从球垫向上延伸的至少一个加强突起，来自芯片和基板的突起被嵌入在焊料凸块连接器内。 在一些构造中，来自接触垫和球垫的加强突起的尺寸和布置为具有重叠的上部。 这些重叠部分可采取各种各样的构造，其允许突起重叠而不彼此接触，包括针阵列以及周围和被包围的元件的组合。 在每种构造中，加强突起将倾向于抑制裂纹形成和/或裂纹扩展，从而提高可靠性。

公开(公告)号：US20060094587A1

公开(公告)日：2006-05-04

申请号：US11262159

申请日：2005-10-28

申请人： Jung Lee ,  Tae Lee ,  Kwang Song ,  In Young Lee

发明人： Jung Lee ,  Tae Lee ,  Kwang Song ,  In Young Lee

IPC分类号： B01J38/60

CPC分类号： B01J23/92 ,  B01J38/60 ,  Y10S502/514 ,  Y10S502/516 ,  Y10S502/517

摘要： Provided is a method of regenerating a honeycomb type SCR catalyst which is used in selective catalytic reduction (SCR), comprising treating a waste honeycomb type SCR catalyst used in an industrial boiler with a mixed solution containing 0.1 M to 1.0 M H2SO4, 0.005 M to 0.1 M NH4VO3 and 0.005 M to 0.1 M 5(NH4)2O•12WO3•5H2O in an air lift loop reactor.

摘要翻译： 本发明提供一种再生用于选择性催化还原（SCR）的蜂窝型SCR催化剂的方法，其特征在于，在工业锅炉中使用含有0.1M〜1.0MH 2 0.005至0.1M NH 4 VO 3 3和0.005M至0.1M 5（NH 4）3 SO 3， /SUB> )₂O.12WO₃.5H₂O在空气提升环路反应器中。

公开(公告)号：US20050104222A1

公开(公告)日：2005-05-19

申请号：US10944613

申请日：2004-09-20

申请人： Se-Young Jeong ,  Gu-Sung Kim ,  Nam-Seog Kim ,  Gi-Hwan Park ,  Se-Yong Oh ,  Soon-Bum Kim ,  In-Young Lee

发明人： Se-Young Jeong ,  Gu-Sung Kim ,  Nam-Seog Kim ,  Gi-Hwan Park ,  Se-Yong Oh ,  Soon-Bum Kim ,  In-Young Lee

IPC分类号： H01L23/28 ,  H01L21/60 ,  H01L23/16 ,  H01L23/31 ,  H01L23/485 ,  H01L23/498 ,  H05K3/34 ,  H01L23/48

CPC分类号： H01L24/13 ,  H01L23/16 ,  H01L23/3114 ,  H01L23/49838 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06102 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14136 ,  H01L2224/14155 ,  H01L2224/16 ,  H01L2224/1601 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29076 ,  H01L2224/30155 ,  H01L2224/30156 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2203/0465 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01083 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/013

摘要： A flip chip device may have a semiconductor chip with an active surface on which chip pads and a protective layer may be provided. Solder bumps may be provided on the active surface and electrically connected to the chip pads. And a solder bar may be provided on a portion of the protective layer. The solder bar may disperse thermal stress produced in the solder bumps. A metal core may be embedded within the solder bar. The flip chip device may be mounted on and flip-chip bonded to a substrate. The substrate may have land pads to which the solder bumps and the solder bar may be mechanically joined. The solder bar increases a joint area between the flip chip device and the substrate and reinforces solder connections therebetween.

摘要翻译： 倒装芯片器件可以具有其上可以设置有芯片焊盘和保护层的有源表面的半导体芯片。 可以在活性表面上提供焊料凸块并电连接到芯片焊盘。 并且可以在保护层的一部分上设置焊料条。 焊料棒可能会分散焊料凸点产生的热应力。 金属芯可以嵌入在焊条内。 倒装芯片器件可以安装在衬底上并倒装芯片结合到衬底上。 衬底可以具有焊盘，焊盘和焊条可以焊接到其上。 焊条增加了倒装芯片器件和衬底之间的接合面积，并加强了它们之间的焊接连接。