公开(公告)号：US20120061834A1

公开(公告)日：2012-03-15

申请号：US13226564

申请日：2011-09-07

申请人： Tae Min KANG

发明人： Tae Min KANG

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L24/11 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/11003 ,  H01L2224/11011 ,  H01L2224/111 ,  H01L2224/13009 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/94 ,  H01L2225/06541 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/05552

摘要： A semiconductor chip includes a silicon wafer formed with a via hole, a metal wire disposed in the via hole, and a filler that exposes a part of an upper portion of the metal wire while filing the via hole.

摘要翻译： 半导体芯片包括形成有通孔的硅晶片，设置在通孔中的金属线，以及填充物，其在填充通孔的同时露出金属线的上部的一部分。

公开(公告)号：US07674702B1

公开(公告)日：2010-03-09

申请号：US12104362

申请日：2008-04-16

申请人： Viraj Patwardhan ,  Nikhil V. Kelkar

发明人： Viraj Patwardhan ,  Nikhil V. Kelkar

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/11011 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11472 ,  H01L2224/11901 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A polymer stencil is applied to the active surface of a wafer. The stencil has openings that at least partially overlay associated metallization pads on the wafer and divider strips positioned between adjacent openings. The divider strips are arranged to overlay portions of associated metallization pads so that at least two adjacent openings overlay portions of each metallization pad. After the stencil has been positioned, a solder paste is applied to the stencil openings. The solder paste may then be reflowed with the polymer stencil remaining in place. The solder naturally creeps under the stencil so that unitary solder bumps are formed on each metallization pad. The described methods and arrangements can be used to create low profile solder bumps that are not attainable using conventional solder bump formation techniques.

摘要翻译： 将聚合物模板施加到晶片的有效表面。 模板具有至少部分地覆盖晶片上相关联的金属化焊盘并且位于相邻开口之间的分隔条的开口。 分隔带布置成覆盖相关联的金属化焊盘的部分，使得至少两个相邻的开口覆盖每个金属化焊盘的部分。 在模板定位之后，将焊膏施加到模版孔。 然后可以将聚合物模板保留在适当位置来回流焊膏。 焊料自然地在模板下爬行，使得在每个金属化焊盘上形成单一的焊料凸块。 所描述的方法和布置可以用于产生使用常规的焊料凸块形成技术不可获得的低轮廓焊料凸块。

公开(公告)号：US20240222301A1

公开(公告)日：2024-07-04

申请号：US18147497

申请日：2022-12-28

申请人： Intel Corporation

发明人： Bohan Shan ,  Hongxia Feng ,  Haobo Chen ,  Srinivas Pietambaram ,  Bai Nie ,  Gang Duan ,  Kyle Arrington ,  Ziyin Lin ,  Yiqun Bai ,  Xiaoying Guo ,  Dingying Xu ,  Sairam Agraharam ,  Ashay Dani ,  Eric J. M. Moret ,  Tarek Ibrahim

IPC分类号： H01L23/00

CPC分类号： H01L24/11 ,  H01L2224/10122 ,  H01L2224/11011 ,  H01L2924/143 ,  H01L2924/186

摘要： Methods and apparatus for optical thermal treatment in semiconductor packages are disclosed. A disclosed example integrated circuit (IC) package includes a dielectric substrate, an interconnect associated with the dielectric substrate, and light absorption material proximate or surrounding the interconnect, the light absorption material to increase in temperature in response to being exposed to a pulsed light for thermal treatment corresponding to the IC package.

公开(公告)号：US09812415B2

公开(公告)日：2017-11-07

申请号：US14506423

申请日：2014-10-03

申请人： Micron Technology, Inc.

发明人： Matt E. Schwab ,  David J. Corisis ,  J. Michael Brooks

IPC分类号： H01L21/44 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC分类号： H01L24/03 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/09 ,  H01L24/17 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/11011 ,  H01L2224/13111 ,  H01L2224/1405 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a method for forming a microelectronic device includes attaching a microelectronic die to a support member by forming an attachment feature on at least one of a back side of the microelectronic die and the support member. The attachment feature includes a volume of solder material. The method also includes contacting the attachment feature with the other of the microelectronic die and the support member, and reflowing the solder material to join the back side of the die and the support member via the attachment feature. In several embodiments, the attachment feature is not electrically connected to internal active structures of the die.

公开(公告)号：US20170033066A1

公开(公告)日：2017-02-02

申请号：US15295631

申请日：2016-10-17

申请人： Infineon Technologies AG

发明人： Evelyn Napetschnig ,  Ulrike Fastner ,  Alexander Heinrich ,  Thomas Fischer

IPC分类号： H01L23/00 ,  H01L21/304 ,  H01L21/268 ,  H01L23/31 ,  H01L21/78

CPC分类号： H01L24/05 ,  H01L21/268 ,  H01L21/304 ,  H01L21/3086 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/94 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02205 ,  H01L2224/03009 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/10126 ,  H01L2224/11009 ,  H01L2224/11011 ,  H01L2224/11019 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11845 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/26125 ,  H01L2224/27009 ,  H01L2224/27019 ,  H01L2224/2746 ,  H01L2224/2747 ,  H01L2224/27845 ,  H01L2224/29007 ,  H01L2224/29013 ,  H01L2224/291 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/94 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/206 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/27

摘要： In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. The contact layer is disposed in the kerf region and the device regions. A structured solder layer is formed over the device regions. The contact layer is exposed at the kerf region after forming the structured solder layer. The contact layer and the substrate in the kerf regions are diced.

摘要翻译： 根据本发明的实施例，形成半导体器件的方法包括在衬底的第一主表面上形成接触层。 衬底包括由切口区域分隔开的器件区域。 接触层设置在切口区域和器件区域中。 在器件区域上形成结构化的焊料层。 在形成结构化的焊料层之后，在切割区域处露出接触层。 切割区域中的接触层和基底。

公开(公告)号：US09397060B2

公开(公告)日：2016-07-19

申请号：US14819189

申请日：2015-08-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Mirng-Ji Lii ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Kai-Chiang Wu

IPC分类号： H01L23/02 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/31 ,  H01L25/10 ,  H01L23/367 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  H01L23/498

CPC分类号： H01L24/14 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/11011 ,  H01L2224/14 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0206 ,  H05K1/0306 ,  H05K1/113 ,  H05K2201/068 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A package on packaging structure comprising a first package and a second package provides for improved thermal conduction and mechanical strength by the introduction of a thermally conductive substrate attached to the second package. The first package has a first substrate and a first integrated circuit. The second package has a second substrate containing through vias that has a first coefficient of thermal expansion. The second package also has a second integrated circuit having a second coefficient of thermal expansion located on the second substrate. The second coefficient of thermal expansion deviates from the first coefficient of thermal expansion by less than about 10 or less than about 5 parts-per-million per degree Celsius. A first set of conductive elements couples the first substrate and the second substrate. A second set of conductive elements couples the second substrate and the second integrated circuit.

公开(公告)号：US20150258638A1

公开(公告)日：2015-09-17

申请号：US14657262

申请日：2015-03-13

申请人： Indium Corporation

发明人： Ming Hu ,  Ning-Cheng Lee

IPC分类号： B23K35/362 ,  B23K35/36 ,  B23K1/20

CPC分类号： B23K35/362 ,  B23K1/0016 ,  B23K1/008 ,  B23K1/203 ,  B23K3/0623 ,  B23K35/3612 ,  B23K35/3613 ,  B23K2101/42 ,  C08K5/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/03828 ,  H01L2224/10126 ,  H01L2224/11011 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3478 ,  H05K3/3489 ,  H05K2201/099 ,  H05K2201/10674 ,  H05K2203/041 ,  H05K2203/043 ,  H01L2924/014

摘要： Methods of forming solder bumps or joints using a radiation curable, thermal curable solder flux, or dual curable solder flux are disclosed. The method includes applying a liquid solder flux that is radiation curable or thermal curable to a substrate such that the solder flux covers contact pads on the substrate; placing solder balls on the contacts pads covered with the radiation curable or thermal curable solder flux; heating the substrate to join the solder balls to the contact pads, thereby forming solder bumps or solder joints; and curing the liquid solder flux by applying radiation or heat to the substrate, thereby forming a solid film. The solder flux includes radiation curable, thermally curable, or dual curable materials that aid formation of solder bumps or joints before the solder flux is cured; and are curable to form a solid material by the application of radiation or heat.

摘要翻译： 公开了使用可辐射固化的，可热固化的焊剂焊剂或双重可固化的助焊剂形成焊料凸块或接头的方法。 该方法包括将可辐射固化或可热固化的液体焊剂施加到衬底上，使得焊剂覆盖衬底上的接触焊盘; 将焊球放置在用可辐射固化或可热固化的焊剂覆盖的接触焊盘上; 加热衬底以将焊球接合到接触焊盘，从而形成焊料凸块或焊点; 并通过向基板施加辐射或加热来固化液体焊剂，由此形成固体膜。 焊剂包括可辐射固化的，可热固化的或双重可固化的材料，其在焊剂固化之前有助于形成焊料凸块或接头; 并且通过施加辐射或热量可固化以形成固体材料。

公开(公告)号：US20150137360A1

公开(公告)日：2015-05-21

申请号：US14607865

申请日：2015-01-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yung-Chi Lin ,  Hsin-Yu Chen ,  Wen-Chih Chiou ,  Ku-Feng Yang ,  Tsang-Jiuh Wu ,  Jing-Cheng Lin

IPC分类号： H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49827 ,  H01L21/76879 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/0557 ,  H01L2224/11011 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/1405 ,  H01L2224/14104 ,  H01L2224/73204 ,  H01L2924/01028 ,  H01L2924/0132 ,  H01L2924/067 ,  H01L2924/0705 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012

摘要： A device includes a substrate having a front side and a backside, a through-via extending from the backside to the front side of the substrate, and a conductive pad on the backside of the substrate and over the through-via. The conductive pad has a substantially planar top surface. A conductive bump has a non-planar top surface over the substantially planar top surface and aligned to the through-via. The conductive bump and the conductive pad are formed of a same material. No interface is formed between the conductive bump and the conductive pad.

摘要翻译： 一种器件包括具有正面和背面的衬底，从衬底的背面延伸到前侧的通孔，以及位于衬底的背面和通孔上方的导电焊盘。 导电垫具有基本平坦的顶表面。 导电凸块在基本上平坦的顶表面上方具有非平面的顶表面，并且与通孔对准。 导电凸块和导电垫由相同的材料形成。 在导电凸块和导电垫之间不形成界面。

公开(公告)号：US20150096798A1

公开(公告)日：2015-04-09

申请号：US14050215

申请日：2013-10-09

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh

IPC分类号： H05K1/11 ,  H05K3/26 ,  H05K3/40 ,  H05K3/10

CPC分类号： H01L24/02 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L25/00 ,  H01L2224/02166 ,  H01L2224/02372 ,  H01L2224/05548 ,  H01L2224/11 ,  H01L2224/11011 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  Y10T29/49165 ,  H01L2924/00

摘要： An apparatus relating generally to a substrate is disclosed. In this apparatus, a post extends from the substrate. The post includes a conductor member. An upper portion of the post extends above an upper surface of the substrate. An exterior surface of the post associated with the upper portion is in contact with a dielectric layer. The dielectric layer is disposed on the upper surface of the substrate and adjacent to the post to provide a dielectric collar for the post. An exterior surface of the dielectric collar is in contact with a conductor layer. The conductor layer is disposed adjacent to the dielectric collar to provide a metal collar for the post, where a top surface of each of the conductor member, the dielectric collar and the metal collar have formed thereon a bond structure for interconnection of the metal collar and the conductor member.

摘要翻译： 公开了一般涉及基板的装置。 在该装置中，柱从基板延伸。 该柱包括导体构件。 柱的上部在衬底的上表面上方延伸。 与上部相关联的柱的外表面与电介质层接触。 电介质层设置在基板的上表面上并与柱相邻，以提供用于柱的介电环。 电介质套圈的外表面与导体层接触。 所述导体层邻近所述介质环设置以提供用于所述柱的金属环，其中所述导体构件，所述介电环和所述金属环中的每一个的顶表面在其上形成有用于金属套圈和 导体构件。

公开(公告)号：US20150021769A1

公开(公告)日：2015-01-22

申请号：US14506423

申请日：2014-10-03

申请人： Micron Technology, Inc.

发明人： Matt E. Schwab ,  David J. Corisis ,  J. Michael Brooks

IPC分类号： H01L23/00

CPC分类号： H01L24/03 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/09 ,  H01L24/17 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/11011 ,  H01L2224/13111 ,  H01L2224/1405 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a method for forming a microelectronic device includes attaching a microelectronic die to a support member by forming an attachment feature on at least one of a back side of the microelectronic die and the support member. The attachment feature includes a volume of solder material. The method also includes contacting the attachment feature with the other of the microelectronic die and the support member, and reflowing the solder material to join the back side of the die and the support member via the attachment feature. In several embodiments, the attachment feature is not electrically connected to internal active structures of the die.

摘要翻译： 公开了用于制造封装的微电子器件的封装的微电子器件和方法。 在一个实施例中，用于形成微电子器件的方法包括通过在微电子管芯的背面和支撑构件的至少一个上形成附着特征来将微电子管芯附接到支撑构件。 附件特征包括一定量的焊料。 该方法还包括使附接特征与另一个微电子管芯和支撑构件接触，以及回流焊料材料以经由附接特征连接到管芯的背面和支撑构件。 在几个实施例中，附接特征不与管芯的内部有源结构电连接。