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    Device and method of manufacture of an interconnection structure for printed circuit boards
    22.
    发明申请
    Device and method of manufacture of an interconnection structure for printed circuit boards 审中-公开
    用于印刷电路板的互连结构的制造装置和方法

    公开(公告)号：US20050286238A1

    公开(公告)日：2005-12-29

    申请号：US10875964

    申请日：2004-06-24

    Applicant: Stephen Joy

    Inventor： Stephen Joy

    IPC: H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H05K3/40

    CPC classification number: H05K1/184 ,  H05K3/308 ,  H05K3/3447 ,  H05K3/4046 ,  H05K2201/092 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/10242 ,  H05K2201/10303 ,  H05K2201/1059 ,  H05K2201/1081 ,  H05K2201/10893 ,  H05K2203/1115 ,  H05K2203/1189

    Abstract: An interconnection structure for coupling conductive layers of a circuit board includes a pin configured to be press-fitted in an aperture traversing the circuit board, to electrically couple the conductive traces. The pin may be placed in a predrilled aperture, or driven into the circuit board, forming the aperture thereby. The pin may also be configured as a punch, removing a plug of material as it is driven therethrough. The pin may comprise a capacitive or resistive region configured to capacitively or resistively couple the first and second traces. The pin may be configured such that capacitive or resistive values are selectable according to a depth to which the pin is positioned in the aperture. The pin may serve as an offset post for mounting the circuit board to a chassis. In such a case, the pin may be provided with a longitudinal aperture configured to receive a threaded screw.

    Abstract translation: 用于耦合电路板的导电层的互连结构包括被配置成压配合在穿过电路板的孔中的引脚，用于电连接导电迹线。 销可以放置在预钻孔中，或者被驱动到电路板中，从而形成孔。 该销还可以被配置为冲头，当其被驱动通过其时移除材料塞。 引脚可以包括被配置为电容地或电阻地耦合第一和第二迹线的电容或电阻区域。 引脚可以被配置为使得电容或电阻值可根据销定位在孔中的深度来选择。 该引脚可以用作将电路板安装到底盘的偏移柱。 在这种情况下，销可以设置有构造成接收螺纹螺钉的纵向孔。

    Apparatus and method for calibrating equipment for high frequency measurements
    23.
    发明授权
    Apparatus and method for calibrating equipment for high frequency measurements 失效
    用于校准高频测量设备的装置和方法

    公开(公告)号：US06963209B1

    公开(公告)日：2005-11-08

    申请号：US10897638

    申请日：2004-07-23

    Applicant: Mark W. Gailus ,  Marc B. Cartier, Jr.

    Inventor： Mark W. Gailus ,  Marc B. Cartier, Jr.

    IPC: G01R31/02 ,  G01R35/00 ,  H05K1/00 ,  H05K1/02 ,  H05K3/40 ,  H05K3/42

    CPC classification number: G01R35/007 ,  H05K1/0268 ,  H05K1/0298 ,  H05K3/403 ,  H05K3/429 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09981

    Abstract: Calibration standards for accurate high frequency or wide bandwidth calibration measurements. A “short” or “reflect” standard is formed in a printed circuit board from a conductive coating on a generally planar surface. The conductive coating connects a signal trace to one or more ground planes. The generally planar surface is at least as wide as the signal trace and is preferably several times wider than the signal trace to provide a short standard with properties uniform over a wide frequency range. The short standard is incorporated into a printed circuit upon which a device under test is to be mounted. Connections to the short standard are made through components equivalent to components used to connect a device under test. When a through and line standard are added to the same board, the test board contains all the standards needed for a TRL calibration.

    Abstract translation: 精确的高频或宽带宽校准测量的校准标准。 在大体上平坦的表面上由导电涂层形成印刷电路板中的“短”或“反射”标准。 导电涂层将信号迹线连接到一个或多个接地层。 通常平面的表面至少与信号迹线一样宽，并且优选地比信号迹线宽数倍，以提供具有在宽频率范围内均匀的特性的短标准。 短标准被并入印刷电路中，在该印刷电路中将安装被测器件。 与短标准的连接通过与用于连接被测设备的组件相当的组件进行。 当通过和线路标准被添加到同一个板上时，测试板包含TRL校准所需的所有标准。

    Printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices
    24.
    发明授权
    Printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices 有权
    具有RF部件的电气设备的印刷电路板，特别是用于移动无线电通信设备

    公开(公告)号：US06370034B1

    公开(公告)日：2002-04-09

    申请号：US09381041

    申请日：1999-09-13

    Applicant: Georg Busch

    Inventor： Georg Busch

    IPC: H05K114

    CPC classification number: H05K1/0224 ,  H05K1/0237 ,  H05K1/114 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0715 ,  H05K2201/092 ,  H05K2201/093 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09845 ,  H05K2203/1438

    Abstract: A printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices, wherein to increase the packing density of electronic circuits and conductor-track structures on such circuit board, a “micro via” coating is initially applied to one or both sides of a printed circuit board assembly. This “micro via” coating then has, in particular, RF circuits and RF conductor-track structures applied to at least part of its surface. Finally, the RF circuits and RF conductor-track structures are protected in relation to an RF ground coating of the printed circuit board assembly by barrier areas arranged in an assembly coating, situated directly below the “micro via” coating, of the printed circuit board assembly against interfering influences which impair the RF parameters, to be set in each case, of the RF circuits and RF conductor-track structures.

    Abstract translation: 一种用于具有RF组件的电子设备的印刷电路板，特别是用于移动无线电通信设备的电子设备，其中为了增加电路板和导体轨道结构在这种电路板上的堆积密度，“微通孔”涂层最初被应用于一个或两个 印刷电路板组件的侧面。 这种“微通孔”涂层尤其具有应用于其表面的至少一部分的RF电路和RF导体轨迹结构。 最后，射频电路和RF导体轨道结构相对于印刷电路板组件的射频接地涂层被保护，该屏蔽区布置在布置在印刷电路板的“微孔”涂层正下方的组装涂层中 可以防止RF电路和RF导体轨道结构中的RF参数的干扰影响。

    Printed-circuit substrate and method of making thereof
    28.
    发明授权
    Printed-circuit substrate and method of making thereof 失效
    印刷电路基板及其制造方法

    公开(公告)号：US5079065A

    公开(公告)日：1992-01-07

    申请号：US502807

    申请日：1990-04-02

    Applicant: Shimizu Masakazu ,  Koji Udagawa ,  Ishiguro Yousuke

    Inventor： Shimizu Masakazu ,  Koji Udagawa ,  Ishiguro Yousuke

    IPC: B32B27/04 ,  H05K1/05 ,  H05K3/40 ,  H05K3/46

    CPC classification number: H05K3/4652 ,  B32B27/04 ,  H05K1/056 ,  H05K3/4608 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/092 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2203/063 ,  H05K3/4038 ,  H05K3/4069 ,  Y10S428/901 ,  Y10T156/10 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/31678

    Abstract: The present invention is directed toward a printed-circuit substrate comprisng a first layer having through holes formed through a sheet impregnated with resin which shows a half-hardened property at the time of impregnation, a first electrically conductive circuit provided on the sheet, and a second layer having an electrically conductive circuit provided on either a metal or resin substrate. The first and second layers are pressure-stuck to each other and the through holes are filled with an electrically conductive material. The present invention is also directed to a method of making a printed-circuit substrate comprising the steps of: forming through holes and a first electrically conductive circuit respectively throgh and on at least one layer of a sheet impregnated with resin which shows a half-hardened property at the time of impregnation, thereby forming a first layer; forming a second electrically conductive circuit on an insulating plate having through holes formed therein and plating said through holes and opposite surfaces of the insulating plate, thereby forming a second layer; heat sticking said first layer onto said second layer; and filling said through holes with an electrically conductive material, thereby electrically connecting the first and second electrically conductive circuits.

    Abstract translation: 本发明涉及一种印刷电路基板，其包括具有通过浸渍有树脂的片材形成的通孔的第一层，其在浸渍时显示出半硬化特性，设置在片材上的第一导电电路和 第二层具有设置在金属或树脂基板上的导电电路。 第一层和第二层彼此压力粘合，并且通孔填充有导电材料。 本发明还涉及一种制造印刷电路基板的方法，该方法包括以下步骤：分别形成通孔和第一导电电路，并且在至少一层浸渍有树脂的薄片上形成半导体 浸渍时的特性，由此形成第一层; 在其上形成有通孔的绝缘板上形成第二导电电路，并对绝缘板的所述通孔和相对表面进行电镀，从而形成第二层; 将所述第一层热粘附到所述第二层上; 并用导电材料填充所述通孔，从而电连接第一和第二导电电路。

    Method of making multilayer pc board using polymer thick films
    29.
    发明授权
    Method of making multilayer pc board using polymer thick films 失效
    使用聚合物厚膜制作多层印刷电路板的方法

    公开(公告)号：US4854040A

    公开(公告)日：1989-08-08

    申请号：US212321

    申请日：1988-06-27

    Applicant: Joseph A. Turek

    Inventor： Joseph A. Turek

    IPC: H05K1/09 ,  H05K1/11 ,  H05K1/16 ,  H05K3/24 ,  H05K3/34 ,  H05K3/42 ,  H05K3/46

    CPC classification number: H05K3/4664 ,  H05K1/116 ,  H05K1/162 ,  H05K1/095 ,  H05K2201/0209 ,  H05K2201/092 ,  H05K2201/09309 ,  H05K2203/044 ,  H05K2203/0571 ,  H05K2203/1394 ,  H05K3/243 ,  H05K3/3447 ,  H05K3/3452 ,  H05K3/3468 ,  H05K3/3473 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4602 ,  Y10T29/49156 ,  Y10T29/49165

    Abstract: A multilayer printed circuit board which reliably and economically marries conventional copper clad printed circuit board technology with polymeric conductors and insulators. Reliability is enhanced by forming all solder pads of copper, providing conductive tails on solder pads which are to be connected by polymeric inks, and ultimately forming a solder resist over all but the solder pads. As a result, polymer inks can be applied to both sides of the board, and the completed board can be subject to conventional solder dipping or wave soldering operations. According to one feature of the invention, a thin dielectric layer can be applied as intermediate to planar conductive layers which form a power plane having built-in distributed capacitance for decoupling.

    Abstract translation: 一种多层印刷电路板，可靠且经济地将传统的铜包层印刷电路板技术与聚合物导体和绝缘体结合在一起。 通过形成铜的所有焊盘来提高可靠性，在焊盘上提供导电尾部，这些焊盘将通过聚合物墨水连接，并最终在除焊盘之外的所有焊料上形成阻焊剂。 因此，聚合物油墨可以应用于板的两侧，并且完成的板可以进行常规焊料浸渍或波峰焊操作。 根据本发明的一个特征，可以将薄介电层作为中间层应用于形成具有用于去耦的内置分布电容的功率平面的平面导电层。

    Multilayer circuit board construction and method
    30.
    发明授权
    Multilayer circuit board construction and method 失效
    多层电路板结构及方法

    公开(公告)号：US4211603A

    公开(公告)日：1980-07-08

    申请号：US901904

    申请日：1978-05-01

    Applicant: Douglas A. Reed

    Inventor： Douglas A. Reed

    IPC: H05K3/10 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  C23F1/02

    CPC classification number: H05K3/429 ,  H05K3/4602 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2203/1476 ,  H05K3/108 ,  H05K3/181 ,  H05K3/426 ,  Y10S428/901 ,  Y10T29/49165

    Abstract: Multilayer circuit boards having large area through-hole electrical connections are provided by a process that begins with the fabrication by known means of a drilled and through-hole plated single layer board. Next, a layer of insulating material is applied to either side of the board, leaving at least the through-hole plating exposed. A continuous layer of metal is then deposited on the body, completely covering the insulating layer and through-hole plating. Finally, the deposited metal layer is selectively masked and etched to form conductive circuit patterns on the insulating layer, overlying the original circuit patterns and electrically connected to them by the multiple layer through-hole plating.

    Abstract translation: 具有大面积通孔电连接的多层电路板由通过已知的钻孔和通孔电镀单层板的制造开始的工艺提供。 接下来，将一层绝缘材料施加到板的任一侧，至少留下通孔板暴露。 然后将连续的金属层沉积在主体上，完全覆盖绝缘层和通孔电镀。 最后，沉积的金属层被选择性地掩蔽和蚀刻，以在绝缘层上形成导电电路图案，覆盖原始电路图案，并通过多层通孔电镀电连接到它们。

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