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公开(公告)号：US08900922B2
公开(公告)日：2014-12-02
申请号：US13398568
申请日：2012-02-16
Applicant: Cheng-Chung Lin , Kuei-Wei Huang , Ai-Tee Ang , Tsai-Tsung Tsai , Ming-Da Cheng , Chung-Shi Liu
Inventor： Cheng-Chung Lin , Kuei-Wei Huang , Ai-Tee Ang , Tsai-Tsung Tsai , Ming-Da Cheng , Chung-Shi Liu
IPC: H01L25/07
CPC classification number: H01L21/565 , H01L21/486 , H01L23/145 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L25/105 , H01L25/50 , H01L2224/13082 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16225 , H01L2224/16227 , H01L2224/27436 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/81203 , H01L2224/81815 , H01L2224/83104 , H01L2224/83191 , H01L2224/94 , H01L2225/1023 , H01L2225/1058 , H01L2924/01322 , H01L2924/15311 , H01L2924/1533 , H01L2924/1815 , H01L2924/18161 , H01L2924/00014 , H01L2924/013 , H01L2224/11 , H01L2224/27 , H01L2924/0665 , H01L2924/01014 , H01L2924/014 , H01L2924/00
Abstract: A method includes laminating a Non-Conductive Film (NCF) over a first package component, and bonding a second package component on the first package component. The NCF and the second package component are on a same side of the first package component. Pillars of a mold tool are then forced into the NCF to form openings in the NCF. The connectors of the first package component are exposed through the openings.
Abstract translation: 一种方法包括在第一包装部件上层压非导电膜（NCF），以及将第二包装部件接合在第一包装部件上。 NCF和第二封装组件位于第一封装组件的同一侧。 然后将模具的支柱压入NCF中以在NCF中形成开口。 第一包装部件的连接器通过开口露出。
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公开(公告)号：US08674496B2
公开(公告)日：2014-03-18
申请号：US13399437
申请日：2012-02-17
Applicant: Cheng-Chung Lin , Hsiu-Jen Lin , Cheng-Ting Chen , Chun-Cheng Lin , Ming-Da Cheng , Chung-Shi Liu
Inventor： Cheng-Chung Lin , Hsiu-Jen Lin , Cheng-Ting Chen , Chun-Cheng Lin , Ming-Da Cheng , Chung-Shi Liu
IPC: H01L25/07
CPC classification number: H01L24/14 , H01L23/49816 , H01L23/5389 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2225/1023 , H01L2225/1058 , H01L2924/01322 , H01L2924/15311 , H01L2924/15331 , H01L2924/15787 , H01L2924/181 , H01L2924/18161 , H01L2924/00
Abstract: A fine pitch package-on-package (PoP), and a method of forming, are provided. The PoP may be formed by placing connections, e.g., solder balls, on a first substrate having a semiconductor die attached thereto. A first reflow process is performed to elongate the solder balls. Thereafter, a second substrate having another semiconductor die attached thereto is connected to the solder balls. A second reflow process is performed to form an hourglass connection.
Abstract translation: 提供了一种精细节距封装（PoP）和一种形成方法。 PoP可以通过将连接例如焊球放置在具有附接到其上的半导体管芯的第一基板上而形成。 执行第一回流处理以延长焊球。 此后，具有安装有另一个半导体管芯的第二基板连接到焊球。 执行第二回流处理以形成沙漏连接。
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33.发明申请公开(公告)号：US20130214431A1
公开(公告)日：2013-08-22
申请号：US13398568
申请日：2012-02-16
Applicant: Cheng-Chung Lin , Kuei-Wei Huang , Ai-Tee Ang , Tsai-Tsung Tsai , Ming-Da Cheng , Chung-Shi Liu
Inventor： Cheng-Chung Lin , Kuei-Wei Huang , Ai-Tee Ang , Tsai-Tsung Tsai , Ming-Da Cheng , Chung-Shi Liu
CPC classification number: H01L21/565 , H01L21/486 , H01L23/145 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L25/105 , H01L25/50 , H01L2224/13082 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16225 , H01L2224/16227 , H01L2224/27436 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/81203 , H01L2224/81815 , H01L2224/83104 , H01L2224/83191 , H01L2224/94 , H01L2225/1023 , H01L2225/1058 , H01L2924/01322 , H01L2924/15311 , H01L2924/1533 , H01L2924/1815 , H01L2924/18161 , H01L2924/00014 , H01L2924/013 , H01L2224/11 , H01L2224/27 , H01L2924/0665 , H01L2924/01014 , H01L2924/014 , H01L2924/00
Abstract: A method includes laminating a Non-Conductive Film (NCF) over a first package component, and bonding a second package component on the first package component. The NCF and the second package component are on a same side of the first package component. Pillars of a mold tool are then forced into the NCF to form openings in the NCF. The connectors of the first package component are exposed through the openings.
Abstract translation: 一种方法包括在第一包装部件上层压非导电膜（NCF），以及将第二包装部件接合在第一包装部件上。 NCF和第二封装组件位于第一封装组件的同一侧。 然后将模具的支柱压入NCF中以在NCF中形成开口。 第一包装部件的连接器通过开口露出。
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公开(公告)号：US20130214401A1
公开(公告)日：2013-08-22
申请号：US13399437
申请日：2012-02-17
Applicant: Cheng-Chung Lin , Hsiu-Jen Lin , Cheng-Ting Chen , Chun-Cheng Lin , Ming-Da Cheng , Chung-Shi Liu
Inventor： Cheng-Chung Lin , Hsiu-Jen Lin , Cheng-Ting Chen , Chun-Cheng Lin , Ming-Da Cheng , Chung-Shi Liu
CPC classification number: H01L24/14 , H01L23/49816 , H01L23/5389 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2225/1023 , H01L2225/1058 , H01L2924/01322 , H01L2924/15311 , H01L2924/15331 , H01L2924/15787 , H01L2924/181 , H01L2924/18161 , H01L2924/00
Abstract: A fine pitch package-on-package (PoP), and a method of forming, are provided. The PoP may be formed by placing connections, e.g., solder balls, on a first substrate having a semiconductor die attached thereto. A first reflow process is performed to elongate the solder balls. Thereafter, a second substrate having another semiconductor die attached thereto is connected to the solder balls. A second reflow process is performed to form an hourglass connection.
Abstract translation: 提供了一种精细节距封装（PoP）和一种形成方法。 PoP可以通过将连接例如焊球放置在具有附接到其上的半导体管芯的第一基板上而形成。 执行第一回流处理以延长焊球。 此后，具有安装有另一个半导体管芯的第二基板连接到焊球。 执行第二回流处理以形成沙漏连接。
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35.发明申请COPPER PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE AND METHOD OF MAKING THE SAME 有权具有非金属侧壁保护结构的铜制保险丝及其制造方法公开(公告)号：US20120280388A1
公开(公告)日：2012-11-08
申请号：US13551421
申请日：2012-07-17
Applicant: Yi-Wen WU , Cheng-Chung LIN , Chien Ling HWANG , Chung-Shi LIU
Inventor： Yi-Wen WU , Cheng-Chung LIN , Chien Ling HWANG , Chung-Shi LIU
CPC classification number: H01L23/49811 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/0345 , H01L2224/0401 , H01L2224/05023 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05541 , H01L2224/05568 , H01L2224/05582 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/05681 , H01L2224/05687 , H01L2224/10145 , H01L2224/11002 , H01L2224/1112 , H01L2224/1132 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11827 , H01L2224/11831 , H01L2224/11849 , H01L2224/11912 , H01L2224/13005 , H01L2224/13007 , H01L2224/13023 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13118 , H01L2224/1312 , H01L2224/13123 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13166 , H01L2224/13169 , H01L2224/1317 , H01L2224/13171 , H01L2224/13181 , H01L2224/13551 , H01L2224/13561 , H01L2224/13565 , H01L2224/1357 , H01L2224/1358 , H01L2224/13582 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13664 , H01L2224/13686 , H01L2224/13687 , H01L2224/13688 , H01L2224/1369 , H01L2224/81192 , H01L2224/81193 , H01L2224/814 , H01L2224/81815 , H01L2224/94 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/05442 , H01L2924/0665 , H01L2924/07025 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/3841 , H01L2924/0105 , H01L2224/11 , H01L2924/01007 , H01L2924/01014 , H01L2924/01015 , H01L2924/00 , H01L2224/05552
Abstract: This description relates to an integrated circuit device including a conductive pillar formed over a substrate. The conductive pillar has a sidewall surface and a top surface. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer between the substrate and the conductive pillar. The UBM layer has a surface region. The integrated circuit device further includes a protection structure on the sidewall surface of the conductive pillar and the surface region of the UBM layer. The protection structure is formed of a non-metal material.
Abstract translation: 该描述涉及一种集成电路器件，其包括形成在衬底上的导电柱。 导电柱具有侧壁表面和顶表面。 集成电路器件还包括在衬底和导电柱之间的凸起下 - 冶金（UBM）层。 UBM层具有表面区域。 集成电路装置还包括在导电柱的侧壁表面和UBM层的表面区域上的保护结构。 保护结构由非金属材料形成。
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Patent Agency Ranking
公开(公告)号：US08269549B2
公开(公告)日：2012-09-18
申请号：US13048973
申请日：2011-03-16
Applicant: Cheng-Chung Lin , Wu Jiang
Inventor： Cheng-Chung Lin , Wu Jiang
IPC: G11C5/14
CPC classification number: G06F1/26
Abstract: A power supply circuit for a PCI-E slot includes a control chip, a first electronic switch, and a second electronic switch. The control chip determines a status of a motherboard, outputting a control signal. A first terminal of the first electronic switch is connected to the control chip to receive the control signal, and connected to a +3.3V dual power supply of the motherboard through a first resistor. A second terminal of the first electronic switch is grounded. A third terminal of the first electronic switch is connected to a first terminal of the second electronic switch, and connected to the +3.3V dual power supply through a second resistor. A second terminal of the second electronic switch is connected to the +3.3V dual power supply. A third terminal of the second electronic switch is connected to a PCI-E slot.
Abstract translation: 用于PCI-E插槽的电源电路包括控制芯片，第一电子开关和第二电子开关。 控制芯片确定主板的状态，输出控制信号。 第一电子开关的第一端子连接到控制芯片以接收控制信号，并通过第一电阻器连接到主板的+ 3.3V双电源。 第一个电子开关的第二个端子接地。 第一电子开关的第三端子连接到第二电子开关的第一端子，并通过第二电阻器连接到+ 3.3V双电源。 第二个电子开关的第二个端子连接到+ 3.3V双电源。 第二电子开关的第三端子连接到PCI-E插槽。
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公开(公告)号：US08258055B2
公开(公告)日：2012-09-04
申请号：US12832168
申请日：2010-07-08
Applicant: Chien Ling Hwang , Ying-Jui Huang , Zheng-Yi Lim , Yi-Yang Lei , Cheng-Chung Lin , Chung-Shi Liu
Inventor： Chien Ling Hwang , Ying-Jui Huang , Zheng-Yi Lim , Yi-Yang Lei , Cheng-Chung Lin , Chung-Shi Liu
IPC: H01L21/44
CPC classification number: H01L24/13 , H01L21/563 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/73 , H01L24/81 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/03464 , H01L2224/0361 , H01L2224/03831 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/1132 , H01L2224/1145 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11622 , H01L2224/11831 , H01L2224/11849 , H01L2224/11901 , H01L2224/13007 , H01L2224/13017 , H01L2224/13022 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/131 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2224/81801 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01072 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10329 , H01L2924/14 , H01L2924/3512 , H01L2224/05552 , H01L2924/00 , H01L2224/1146
Abstract: An embodiment of the disclosure includes a conductive bump on a semiconductor die. A substrate is provided. A bond pad is over the substrate. An under bump metallurgy (UBM) layer is over the bond pad. A copper pillar is over the UBM layer. The copper pillar has a top surface with a first width and sidewalls with a concave shape. A nickel layer having a top surface and a bottom surface is over the top surface of the copper pillar. The bottom surface of the nickel layer has a second width. A ratio of the second width to the first width is between about 0.93 to about 1.07. A solder material is over the top surface of the cap layer.
Abstract translation: 本公开的实施例包括半导体管芯上的导电凸块。 提供基板。 焊盘在衬底上。 凸块下金属（UBM）层位于焊盘上方。 铜柱在UBM层之上。 铜柱具有第一宽度的顶表面和具有凹形的侧壁。 具有顶表面和底表面的镍层在铜柱的顶表面之上。 镍层的底面具有第二宽度。 第二宽度与第一宽度的比率在约0.93至约1.07之间。 焊料材料在盖层的顶表面之上。
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公开(公告)号：US20120018878A1
公开(公告)日：2012-01-26
申请号：US12843760
申请日：2010-07-26
Applicant: Ming-Da Cheng , MIng-Che Ho , Chung-Shi Liu , Chien Ling Hwang , Cheng-Chung Lin , Hui-Jung Tsai , Zheng-Yi Lim
Inventor： Ming-Da Cheng , MIng-Che Ho , Chung-Shi Liu , Chien Ling Hwang , Cheng-Chung Lin , Hui-Jung Tsai , Zheng-Yi Lim
IPC: H01L21/288 , H01L29/45
CPC classification number: H01L24/11 , H01L21/4853 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/93 , H01L25/0657 , H01L25/50 , H01L2224/0345 , H01L2224/0346 , H01L2224/0347 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/11416 , H01L2224/11422 , H01L2224/11424 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/118 , H01L2224/1181 , H01L2224/1182 , H01L2224/11822 , H01L2224/11827 , H01L2224/11848 , H01L2224/11849 , H01L2224/119 , H01L2224/13005 , H01L2224/13111 , H01L2224/13144 , H01L2224/13155 , H01L2224/13164 , H01L2224/132 , H01L2224/13211 , H01L2224/13339 , H01L2224/13562 , H01L2224/13584 , H01L2224/13611 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13657 , H01L2224/13664 , H01L2224/1379 , H01L2224/13794 , H01L2224/13809 , H01L2224/13813 , H01L2224/13817 , H01L2224/13818 , H01L2224/1382 , H01L2224/13849 , H01L2224/13855 , H01L2224/13857 , H01L2224/1386 , H01L2224/13866 , H01L2224/16145 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2224/93 , H01L2225/06513 , H01L2924/01012 , H01L2924/01013 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01058 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/04941 , H01L2924/04953 , H01L2924/00014 , H01L2924/01039 , H01L2224/11 , H01L2924/00
Abstract: A method of forming a device includes providing a substrate, and forming a solder bump over the substrate. A minor element is introduced to a region adjacent a top surface of the solder bump. A re-flow process is then performed to the solder bump to drive the minor element into the solder bump.
Abstract translation: 形成器件的方法包括提供衬底，以及在衬底上形成焊料凸点。 将次要元件引入邻近焊料凸块顶表面的区域。 然后对焊料凸块执行再流程以将次要元件驱动到焊料凸块中。
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公开(公告)号：US20110266667A1
公开(公告)日：2011-11-03
申请号：US12769768
申请日：2010-04-29
Applicant: Yi-Wen WU , Cheng-Chung LIN , Chien Ling HWANG , Chung-Shi LIU
Inventor： Yi-Wen WU , Cheng-Chung LIN , Chien Ling HWANG , Chung-Shi LIU
IPC: H01L23/50
CPC classification number: H01L23/49811 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/0345 , H01L2224/0401 , H01L2224/05023 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05541 , H01L2224/05568 , H01L2224/05582 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/05681 , H01L2224/05687 , H01L2224/10145 , H01L2224/11002 , H01L2224/1112 , H01L2224/1132 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11827 , H01L2224/11831 , H01L2224/11849 , H01L2224/11912 , H01L2224/13005 , H01L2224/13007 , H01L2224/13023 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13118 , H01L2224/1312 , H01L2224/13123 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13166 , H01L2224/13169 , H01L2224/1317 , H01L2224/13171 , H01L2224/13181 , H01L2224/13551 , H01L2224/13561 , H01L2224/13565 , H01L2224/1357 , H01L2224/1358 , H01L2224/13582 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13664 , H01L2224/13686 , H01L2224/13687 , H01L2224/13688 , H01L2224/1369 , H01L2224/81192 , H01L2224/81193 , H01L2224/814 , H01L2224/81815 , H01L2224/94 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/05442 , H01L2924/0665 , H01L2924/07025 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/3841 , H01L2924/0105 , H01L2224/11 , H01L2924/01007 , H01L2924/01014 , H01L2924/01015 , H01L2924/00 , H01L2224/05552
Abstract: A sidewall protection structure is provided for covering at least a portion of a sidewall surface of a bump structure, in which a protection structure on the sidewalls of a Cu pillar and a surface region of an under-bump-metallurgy (UBM) layer is formed of at least one non-metal material layers, for example a dielectric material layer, a polymer material layer, or combinations thereof.
Abstract translation: 提供了一种侧壁保护结构，用于覆盖凸块结构的侧壁表面的至少一部分，其中形成有Cu柱的侧壁上的保护结构和凸起下 - 冶金（UBM）层的表面区域 至少一个非金属材料层，例如介电材料层，聚合物材料层或其组合。
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公开(公告)号：US20110133331A1
公开(公告)日：2011-06-09
申请号：US12633499
申请日：2009-12-08
Applicant: Cheng-Chung Lin , Chung-Shi Liu , Chen-Hua Yu
Inventor： Cheng-Chung Lin , Chung-Shi Liu , Chen-Hua Yu
IPC: H01L23/50 , H01L21/3205
CPC classification number: H01L21/76885 , H01L23/53228 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0381 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05572 , H01L2224/05647 , H01L2224/11462 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/81013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/10336 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/04941 , H01L2924/04953 , H01L2924/00 , H01L2224/05552
Abstract: An integrated circuit device is disclosed. An exemplary integrated circuit device includes a first copper layer, a second copper layer, and an interface between the first and second copper layers. The interface includes a flat zone interface region and an intergrowth interface region, wherein the flat zone interface region is less than or equal to 50% of the interface.
Abstract translation: 公开了一种集成电路器件。 示例性的集成电路器件包括第一铜层，第二铜层以及第一和第二铜层之间的界面。 该界面包括平坦区域界面区域和共同生长界面区域，其中平坦区域界面区域小于或等于界面的50％。
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