公开(公告)号：US07868728B2

公开(公告)日：2011-01-11

申请号：US12692907

申请日：2010-01-25

Applicant: Yasuhiko Mano ,  Takashi Kariya ,  Shinobu Kato

Inventor： Yasuhiko Mano ,  Takashi Kariya ,  Shinobu Kato

IPC: H01F5/00

CPC classification number: H05K3/4046 ,  H01F17/0006 ,  H01F17/06 ,  H01F41/046 ,  H01F2017/002 ,  H01F2017/065 ,  H01L23/645 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0233 ,  H05K1/115 ,  H05K1/185 ,  H05K3/42 ,  H05K3/4602 ,  H05K2201/086 ,  H05K2201/09581 ,  Y10T29/4902 ,  H01L2224/05599

Abstract: An inductor embedded in a printed wiring board includes a conductor extending in the thickness direction of a printed circuit board and a magnetic body that is in contact with the conductor with no gap therebetween. For example, the magnetic body is composed of ferrite having a cylindrical tubular shape. The conductor is composed of a copper film formed by plating on an inner peripheral surface of the cylindrical tubular ferrite. The inductor is inserted in the thickness direction of the printed wiring board.

Abstract translation: 嵌入印刷电路板的电感器包括沿着印刷电路板的厚度方向延伸的导体和与导体接触而不间隙的磁体。 例如，磁性体由具有圆柱形管状的铁氧体构成。 导体由在圆筒形管状铁氧体的内周面上电镀形成的铜膜构成。 电感器沿印刷电路板的厚度方向插入。

公开(公告)号：US07773388B2

公开(公告)日：2010-08-10

申请号：US11566912

申请日：2006-12-05

Applicant: Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

Inventor： Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

IPC: H01R9/00

CPC classification number: H05K3/326 ,  H01L23/49811 ,  H01L24/72 ,  H01L24/81 ,  H01L24/90 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/3011 ,  H05K3/28 ,  H05K3/341 ,  H05K3/4092 ,  H05K2201/0311 ,  H05K2201/0314 ,  H05K2201/0397 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599

Abstract: The present invention is to provide a printed wiring board in which malconnection or disconnection caused by a difference between coefficients of thermal expansion of a semiconductor chip and a printed wiring board can be decreased even when a highly-integrated semiconductor apparatus is mounted thereon and an electronic device using the same. An electronic device (4) according to the present invention includes a printed wiring board (1) with a component mounting pin (18) and a surface-mounting type semiconductor apparatus (2) with an electrode pad (3), wherein the component mounting pin (18) has elasticity and is urged against the electrode pad (3) to maintain electric connection.

Abstract translation: 本发明是提供一种印刷电路板，其中即使在高度集成的半导体装置安装在其上时也能够降低由半导体芯片和印刷电路板的热膨胀系数之间的差异引起的故障连接或断开，并且电子 设备使用相同。 根据本发明的电子设备（4）包括具有元件安装销（18）的印刷电路板（1）和具有电极焊盘（3）的表面安装型半导体设备（2），其中元件安装 销（18）具有弹性并且被推靠在电极焊盘（3）上以保持电连接。

公开(公告)号：US07760062B2

公开(公告)日：2010-07-20

申请号：US11429157

申请日：2006-05-08

Applicant: Yasuhiko Mano ,  Takashi Kariya ,  Shinobu Kato

Inventor： Yasuhiko Mano ,  Takashi Kariya ,  Shinobu Kato

IPC: H01F5/00

Abstract: An inductor embedded in a printed wiring board includes a conductor extending in the thickness direction of a printed circuit board and a magnetic body that is in contact with the conductor with no gap therebetween. For example, the magnetic body is composed of ferrite having a cylindrical tubular shape. The conductor is composed of a copper film formed by plating on an inner peripheral surface of the cylindrical tubular ferrite. The inductor is inserted in the thickness direction of the printed wiring board.

公开(公告)号：US07754978B2

公开(公告)日：2010-07-13

申请号：US11397802

申请日：2006-04-05

Applicant: Takashi Kariya ,  Toshiki Furutani

Inventor： Takashi Kariya ,  Toshiki Furutani

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H01L24/16 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K1/0271 ,  H05K1/0373 ,  H05K1/111 ,  H05K1/115 ,  H05K3/243 ,  H05K3/28 ,  H05K3/4007 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/068 ,  H05K2201/09881 ,  H05K2201/10674 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49204 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A multilayer printed wiring board 10 includes: a core substrate 20; a build-up layer 30 formed on the core substrate 20 and having a conductor pattern 32 on an upper surface; a low elastic modulus layer 40 formed on the build-up layer 30; lands 52 that are disposed on an upper surface of the low elastic modulus layer 40 and connected via solder bumps 66 to a semiconductor chip 70; and conductor posts 50 that are passing through the low elastic modulus layer 40 and electrically connecting lands 52 with conductor patterns 32. The conductor posts 50 are formed to have the diameters of an upper portion and a lower portion of 80 μm, the diameter of an intermediate portion of 35 μm, the height of 200 μm, and the aspect ratio Rasp (height/minimum diameter) of 5.7 and the maximum diameter/minimum diameter of 2.3.

Abstract translation: 多层印刷线路板10包括：芯基板20; 形成在芯基板20上并且在上表面上具有导体图案32的堆积层30; 形成在积层30上的低弹性模量层40; 焊盘52设置在低弹性模量层40的上表面上并通过焊锡凸块66连接到半导体芯片70; 以及导体柱50，其穿过低弹性模量层40和电连接焊盘52与导体图案32.导体柱50形成为具有80μm的上部和下部的直径， 中间部分为35μm，高度为200μm，纵横比Rasp（高/最小直径）为5.7，最大直径/最小直径为2.3。

公开(公告)号：US07656032B2

公开(公告)日：2010-02-02

申请号：US11280248

申请日：2005-11-17

Applicant: Takashi Kariya ,  Masaya Nishikawa

Inventor： Takashi Kariya ,  Masaya Nishikawa

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/32 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83101 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/30107 ,  H01L2924/3511 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05599

Abstract: A semiconductor chip mounting wiring board 2 includes an insulating resin substrate 5, a first conductive bump 12 formed on one side of the insulative resin substrate 5 to mount a semiconductor chip 3, a wiring pattern 15 extending from the first conductive bump 12 toward the periphery of the insulating resin substrate 5, a filled viahole 9 leading from the other side of the insulating resin substrate 5 to the wiring pattern 15, and a second conductive bump 13, or a conductive pad 19, positioned just above the filled viahole 9 and electrically connected to the viahole 9. A semiconductor module is produced by mounting the semiconductor chip 3 in advance on the first conductive bump 12 on the semiconductor chip mounting wiring board 2 and stacking a plurality of the wiring boards 2 and interlayer members 20 each having an opening 27 to receive the semiconductor chip 3 and a conductive post 26 or conductive pad connected to the second conductive bump 13 of the wiring board 2 alternately on each other with an adhesive applied between them, placing another interconnecting circuit board such as an I/O wiring board 30 or the like on an outermost layer, and by applying hot-pressing to the stack. The semiconductor module thus produced has a high connection reliability and can be designed for a high mounting density and a lower profile.

Abstract translation: 半导体芯片安装用配线基板2具备：绝缘树脂基板5，形成于绝缘性树脂基板5的一侧的第一导电凸块12，搭载半导体芯片3;从第一导电凸块12向周边延伸的布线图案15 绝缘树脂基板5，从绝缘树脂基板5的另一侧引导到布线图案15的填充通孔9，以及位于填充通孔9正上方的第二导电凸块13或导电垫19， 连接到通孔9.半导体模块通过将半导体芯片3预先安装在半导体芯片安装布线板2上的第一导电凸块12上并且堆叠多个布线板2和夹层构件20来制造，每个布线板2和中间层构件20具有开口 27接收半导体芯片3和与布线板2的第二导电凸块13交替连接的导电柱26或导电焊盘 n彼此之间施加粘合剂，将另一个互连电路板，例如I / O布线板30等放置在最外层上，并通过对堆叠进行热压。 这样制造的半导体模块具有高的连接可靠性，并且可以设计成具有高的安装密度和较低的轮廓。

公开(公告)号：US20090260857A1

公开(公告)日：2009-10-22

申请号：US12488224

申请日：2009-06-19

Applicant: Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

Inventor： Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

IPC: H05K1/00

CPC classification number: H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/112 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/10674 ,  H01L2224/05599

Abstract: A circuit wiring board including a wiring substrate, and a heat resistant substrate accommodated in the wiring substrate and including a core substrate and a through hole conductor formed in the core substrate, the core substrate having a first surface and a second surface on an opposite side of the first surface, the through hole conductor providing electrical connection through the core substrate between the first surface and the second surface of the core substrate.

Abstract translation: 一种电路布线板，包括布线基板和容纳在所述布线基板中的耐热基板，所述布线基板包括形成在所述芯基板中的芯基板和通孔导体，所述芯基板具有第一表面和位于相对侧的第二表面 所述通孔导体在所述芯基板的所述第一表面和所述第二表面之间提供通过所述芯基板的电连接。

公开(公告)号：US07497694B2

公开(公告)日：2009-03-03

申请号：US11566862

申请日：2006-12-05

Applicant: Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

Inventor： Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

IPC: H01R9/00

CPC classification number: H05K3/4015 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/45 ,  H01L24/72 ,  H01L24/78 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/451 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/78301 ,  H01L2224/786 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/838 ,  H01L2224/851 ,  H01L2224/85205 ,  H01L2224/90 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3011 ,  H05K3/326 ,  H05K3/341 ,  H05K2201/10265 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49135 ,  Y10T29/49142 ,  Y10T29/49149 ,  Y10T29/49153 ,  H01L2224/13099 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2224/48 ,  H01L2924/00015 ,  H01L2224/05599

Abstract: A printed circuit board according to the present invention is a printed circuit board (4) including a component mounting pin (1) made of a metal wire to connect with a semiconductor chip (10). The semiconductor chip (10) is a surface mounting type semiconductor chip having an electrode pad on its mounting surface for use in a flip-chip mounting system. The component mounting pin (1) is formed by using wire-bonding technology. This printed circuit board (4) is able to decrease malconnections or disconnection caused by a difference between the coefficients of thermal expansion of the semiconductor chip (10) and the printed circuit board (4).

Abstract translation: 根据本发明的印刷电路板是印刷电路板（4），包括由金属线制成的元件安装销（1），以与半导体芯片（10）连接。 半导体芯片（10）是表面安装型半导体芯片，其在其安装表面上具有用于倒装芯片安装系统的电极焊盘。 元件安装销（1）通过引线接合技术形成。 该印刷电路板（4）能够减少由半导体芯片（10）和印刷电路板（4）的热膨胀系数之间的差异引起的误连接或断开。

公开(公告)号：US20080151517A1

公开(公告)日：2008-06-26

申请号：US12034586

申请日：2008-02-20

Applicant: Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

Inventor： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC: H05K1/18

CPC classification number: H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A multilayer printed circuit board has an IC chip 20 included in a core substrate 30 in advance and a mediate layer 38 provided on a pad 24 of the IC chip 20. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the mediate layer 38 made of copper on the die pad 24, it is possible to prevent resin residues on the pad 24 and to improve connection characteristics between the pad 24 and a via hole 60 and reliability.

Abstract translation: 多层印刷电路板预先包括在芯基板30中的IC芯片20和设置在IC芯片20的焊盘24上的中介层38。 由此，可以在不使用引线部件和密封树脂的情况下将IC芯片电连接到多层印刷电路板。 此外，通过在芯片焊盘24上设置由铜制成的中介层38，可以防止焊盘24上的树脂残留，并且改善焊盘24和通孔60之间的连接特性，并且可靠性。

公开(公告)号：US20070105278A1

公开(公告)日：2007-05-10

申请号：US11615495

申请日：2006-12-22

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H01L21/00 ,  H01L23/02

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: In a printed wiring board 10, an upper electrode connecting portion 52 penetrates through a capacitor portion 40 in top to bottom direction so that an upper electrode connecting portion first part 52a is not in contact with the capacitor portion 40, passes through an upper electrode connecting portion third part 52c provided at the upper portion of the capacitor portion 40, and then connects from the upper electrode connecting portion second part 52b to an upper electrode 42. Furthermore, a lower electrode connecting portion 51 penetrates through the capacitor portion 40 in top to bottom direction so that it is not in contact with the upper electrode 42 of the capacitor portion 40, but is in contact with a lower electrode 41. Therefore, the upper electrode connecting portion 52 and the lower electrode connecting portion 51 can be formed even after in process of build-up, the whole surface is covered by a high dielectric capacitor sheet that has a structure that a high dielectric layer is sandwiched between two metal foils and will afterwards serve as the capacitor portion 40.

Abstract translation: 在印刷布线板10中，上部电极连接部52从上下方向贯穿电容器部40，使上部电极连接部第一部分52a不与电容器部40接触，通过上部电极 连接部分第三部分52c设置在电容器部分40的上部，然后从上电极连接部分第二部分52b连接到上电极42。 此外，下电极连接部51从上下方向贯通电容器部40，使其不与电容器部40的上部电极42接触，而与下部电极41接触。 因此，上部电极连接部52和下部电极连接部51即使在积聚的过程中也可以形成，整个表面被高介电电容器片覆盖，该介电电容片具有将介电层夹在高介电层之间的结构 两个金属箔，然后用作电容器部分40。

公开(公告)号：US20060076671A1

公开(公告)日：2006-04-13

申请号：US11280248

申请日：2005-11-17

Applicant: Takashi Kariya ,  Masaya Nishikawa

Inventor： Takashi Kariya ,  Masaya Nishikawa

IPC: H01L23/14

CPC classification number: H01L24/32 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83101 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/30107 ,  H01L2924/3511 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05599

Abstract: A semiconductor chip mounting wiring board 2 includes an insulating resin substrate 5, a first conductive bump 12 formed on one side of the insulative resin substrate 5 to mount a semiconductor chip 3, a wiring pattern 15 extending from the first conductive bump 12 toward the periphery of the insulating resin substrate 5, a filled viahole 9 leading from the other side of the insulating resin substrate 5 to the wiring pattern 15, and a second conductive bump 13, or a conductive pad 19, positioned just above the filled viahole 9 and electrically connected to the viahole 9. A semiconductor module is produced by mounting the semiconductor chip 3 in advance on the first conductive bump 12 on the semiconductor chip mounting wiring board 2 and stacking a plurality of the wiring boards 2 and interlayer members 20 each having an opening 27 to receive the semiconductor chip 3 and a conductive post 26 or conductive pad connected to the second conductive bump 13 of the wiring board 2 alternately on each other with an adhesive applied between them, placing another interconnecting circuit board such as an I/O wiring board 30 or the like on an outermost layer, and by applying hot-pressing to the stack. The semiconductor module thus produced has a high connection reliability and can be designed for a high mounting density and a lower profile.

Abstract translation: 半导体芯片安装用配线基板2具备：绝缘树脂基板5，形成于绝缘性树脂基板5的一侧的第一导电凸块12，搭载半导体芯片3;从第一导电凸块12向周边延伸的布线图案15 绝缘树脂基板5，从绝缘树脂基板5的另一侧引导到布线图案15的填充通孔9，以及位于填充通孔9正上方的第二导电凸块13或导电垫19， 连接到通孔9.半导体模块通过将半导体芯片3预先安装在半导体芯片安装布线板2上的第一导电凸块12上并且堆叠多个布线板2和夹层构件20来制造，每个布线板2和中间层构件20具有开口 27接收半导体芯片3和连接到布线板2的第二导电凸块13的导电柱26或导电焊盘 将它们之间施加粘合剂彼此相互配合，在最外层上放置另一个互连电路板，例如I / O布线板30等，并通过对堆叠进行热压。 这样制造的半导体模块具有高的连接可靠性，并且可以设计成具有高的安装密度和较低的轮廓。