公开(公告)号：US20090008794A1

公开(公告)日：2009-01-08

申请号：US11773171

申请日：2007-07-03

申请人： Weng-Jin Wu ,  Ku-Feng Yang ,  Hung-Pin Chang ,  Wen-Chih Chiou ,  Chen-Hua Yu

发明人： Weng-Jin Wu ,  Ku-Feng Yang ,  Hung-Pin Chang ,  Wen-Chih Chiou ,  Chen-Hua Yu

IPC分类号： H01L21/66 ,  B24B7/00 ,  H01L23/48 ,  H01L21/00

CPC分类号： B24B7/228 ,  B24B37/013 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： A wafer thinning system and method are disclosed that includes grinding away substrate material from a backside of a semiconductor device. A current change is detected in a grinding device responsive to exposure of a first set of device structures through the substrate material, where the grinding is stopped in response to the detected current change. Polishing repairs the surface and continues to remove an additional amount of the substrate material. Exposure of one or more additional sets of device structures through the substrate material is monitored to determine the additional amount of substrate material to remove, where the additional sets of device structures are located in the semiconductor device at a known depth different than the first set.

摘要翻译： 公开了一种包括从半导体器件的背面研磨衬底材料的晶片减薄系统和方法。 在研磨装置中检测到电流变化，响应于第一组器件结构暴露于基底材料，其中根据检测到的电流变化停止研磨。 抛光修复表面，并继续去除额外量的基材。 监测一个或多个另外的一组装置结构穿过基底材料的曝光，以确定要除去的基底材料的附加量，其中附加的器件结构组位于半导体器件中在与第一组不同的已知深度处。

公开(公告)号：US20090001598A1

公开(公告)日：2009-01-01

申请号：US11769559

申请日：2007-06-27

申请人： Wen-Chih Chiou ,  Chen-Hua Yu ,  Weng-Jin Wu

发明人： Wen-Chih Chiou ,  Chen-Hua Yu ,  Weng-Jin Wu

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541

摘要： The formation of through silicon vias (TSVs) in an integrated circuit (IC) die or wafer is described in which the TSV is formed in the integration process prior to contact or metallization processing. Contacts and bonding pads may then be fabricated after the TSVs are already in place, which allows the TSV to be more dense and allows more freedom in the overall TSV design. By providing a denser connection between TSVs and bonding pads, individual wafers and dies may be bonded directly at the bonding pads. The conductive bonding material, thus, maintains an electrical connection to the TSVs and other IC components through the bonding pads.

摘要翻译： 描述了在集成电路（IC）管芯或晶片中形成通孔硅通孔（TSV），其中在接触或金属化处理之前的集成工艺中形成TSV。 然后可以在TSV已经就位之后制造触点和接合焊盘，这允许TSV更致密并且允许TSV设计中的更多自由度。 通过在TSV和接合焊盘之间提供更密集的连接，单个晶片和管芯可以直接接合在接合焊盘处。 因此，导电接合材料通过接合焊盘保持与TSV和其它IC部件的电连接。

公开(公告)号：US20080124845A1

公开(公告)日：2008-05-29

申请号：US11563973

申请日：2006-11-28

申请人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Weng-Jin Wu ,  Jean Wang

发明人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Weng-Jin Wu ,  Jean Wang

IPC分类号： H01L21/335

CPC分类号： H01L21/76898 ,  H01L23/3114 ,  H01L23/3185 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/08145 ,  H01L2224/13009 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13025 ,  H01L2224/14051 ,  H01L2224/14135 ,  H01L2224/14155 ,  H01L2224/14179 ,  H01L2224/17517 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29035 ,  H01L2224/29075 ,  H01L2224/29116 ,  H01L2224/29124 ,  H01L2224/29147 ,  H01L2224/29169 ,  H01L2224/29184 ,  H01L2224/29186 ,  H01L2224/3003 ,  H01L2224/30155 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81193 ,  H01L2224/83193 ,  H01L2224/9202 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12041 ,  H01L2924/14 ,  Y10S438/926 ,  H01L2924/00 ,  H01L2924/053 ,  H01L2924/049 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A method includes: forming a transistor gate over a first substrate and at least one first dummy structure within the first substrate; forming an interlayer dielectric (ILD) layer over the gate transistor, the ILD layer including at least one contact structure formed therein and making electrical contact with the transistor gate and at least one first conductive structure formed therethrough at least partially over a surface of the dummy structure; forming a passivation layer over the ILD layer, the passivation layer comprising at least one first pad structure formed therein and making electrical contact with the conductive structure; bonding the first substrate with a second substrate; removing at least a portion of the first dummy structure, thereby forming a first opening; and forming a conductive material within the first opening for formation of a second conductive structure, the second conductive structure being electrically coupled to the first conductive structure.

摘要翻译： 一种方法包括：在第一衬底和第一衬底内的至少一个第一虚拟结构之上形成晶体管栅极; 在所述栅极晶体管上形成层间电介质层（ILD）层，所述ILD层包括形成在其中的至少一个接触结构，并与所述晶体管栅极形成电接触;以及至少一个第一导电结构，其至少部分地形成在所述虚拟 结构体; 在所述ILD层上形成钝化层，所述钝化层包括形成在其中并与所述导电结构电接触的至少一个第一焊盘结构; 用第二衬底接合第一衬底; 去除所述第一虚设结构的至少一部分，从而形成第一开口; 以及在所述第一开口内形成导电材料以形成第二导电结构，所述第二导电结构电耦合到所述第一导电结构。

公开(公告)号：US08647925B2

公开(公告)日：2014-02-11

申请号：US12792975

申请日：2010-06-03

申请人： Wen-Chih Chiou ,  Shau-Lin Shue ,  Weng-Jin Wu ,  Ju-Pin Hung

发明人： Wen-Chih Chiou ,  Shau-Lin Shue ,  Weng-Jin Wu ,  Ju-Pin Hung

IPC分类号： H01L21/00

CPC分类号： H01L21/76898 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L24/94 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/14181 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A wafer is provided with a through via extending a portion of a substrate, an interconnect structure electrically connecting the through via, and a polyimide layer formed on the interconnect structure. Surface modification of the polyimide layer is the formation of a thin dielectric film on the polyimide layer by coating, plasma treatment, chemical treatment, or deposition methods. The thin dielectric film is adhered strongly to the polyimide layer, which can reduce the adhesion between the wafer surface and an adhesive layer formed in subsequent carrier attaching process.

摘要翻译： 晶片设置有延伸基板的一部分的通孔，连接通孔的互连结构和形成在互连结构上的聚酰亚胺层。 聚酰亚胺层的表面改性是通过涂覆，等离子体处理，化学处理或沉积方法在聚酰亚胺层上形成薄的电介质膜。 薄的电介质膜牢固地粘附到聚酰亚胺层，这可以降低晶片表面和随后的载体附接过程中形成的粘合剂层之间的粘合性。

公开(公告)号：US08581418B2

公开(公告)日：2013-11-12

申请号：US12840949

申请日：2010-07-21

申请人： Weng-Jin Wu ,  Ying-Ching Shih ,  Wen-Chih Chiou ,  Shin-Puu Jeng ,  Chen-Hua Yu

发明人： Weng-Jin Wu ,  Ying-Ching Shih ,  Wen-Chih Chiou ,  Shin-Puu Jeng ,  Chen-Hua Yu

IPC分类号： H01L23/48

CPC分类号： H01L21/768 ,  H01L21/56 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/481 ,  H01L23/5384 ,  H01L24/11 ,  H01L24/14 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/81895 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81805

摘要： A device includes a first die having a first side and a second side opposite to first side, the first side includes a first region and a second region, and a first metal bump of a first horizontal size formed on the first region of the first side of the first die. A second die is bonded to the first side of the first die through the first metal bump. A dielectric layer is formed over the first side of the first die and includes a first portion directly over the second die, a second portion encircling the second die, and an opening exposing the second region of the first side of the first die. A second metal bump of a second horizontal size is formed on the second region of the first side of the first die and extending into the opening of the dielectric layer. The second horizontal size is greater than the first horizontal size. An electrical component is bonded to the first side of the first die through the second metal bump.

摘要翻译： 一种器件包括具有第一侧和与第一侧相对的第二侧的第一管芯，第一侧包括第一区域和第二区域，以及形成在第一侧面的第一区域上的第一水平尺寸的第一金属凸块 的第一个死亡。 通过第一金属凸块将第二模具结合到第一模具的第一侧。 介电层形成在第一管芯的第一侧上，并且包括直接在第二管芯上方的第一部分，环绕第二管芯的第二部分和暴露第一管芯的第一侧的第二区域的开口。 第二水平尺寸的第二金属凸块形成在第一模具的第一侧的第二区域上并且延伸到电介质层的开口中。 第二个水平尺寸大于第一个水平尺寸。 电子部件通过第二金属凸块接合到第一管芯的第一侧。

公开(公告)号：US08264077B2

公开(公告)日：2012-09-11

申请号：US12345239

申请日：2008-12-29

申请人： Wen-Chih Chiou ,  Weng-Jin Wu

发明人： Wen-Chih Chiou ,  Weng-Jin Wu

IPC分类号： H01L23/04

CPC分类号： H01L24/05 ,  H01L21/6835 ,  H01L23/481 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L2221/6834 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05599 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/13099 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate. The TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and connected to the back end of the TSV. A silicide layer is over and contacting the RDL.

摘要翻译： 集成电路结构包括具有正面和背面的半导体衬底。 穿透硅通孔（TSV）穿透半导体衬底。 TSV具有延伸到半导体衬底背面的后端。 再分配线（RDL）位于半导体衬底的背面，并连接到TSV的后端。 硅化物层已经结束并与RDL接触。

公开(公告)号：US20120187576A1

公开(公告)日：2012-07-26

申请号：US13437533

申请日：2012-04-02

申请人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Weng-Jin Wu ,  Hung-Jung Tu ,  Ku-Feng Yang

发明人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Weng-Jin Wu ,  Hung-Jung Tu ,  Ku-Feng Yang

IPC分类号： H01L23/538 ,  H01L23/488

CPC分类号： H01L21/8221 ,  H01L21/76898 ,  H01L24/16 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05609 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/13099 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  Y10S148/164 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/013

摘要： A semiconductor structure includes a first die comprising a first substrate and a first bonding pad over the first substrate, a second die having a first surface and a second surface opposite the first surface, wherein the second die is stacked on the first die and a protection layer having a vertical portion on a sidewall of the second die, and a horizontal portion extending over the first die.

摘要翻译： 半导体结构包括第一裸片，其包括第一衬底和第一衬底上的第一焊盘，第二裸片，具有与第一表面相对的第一表面和第二表面，其中第二裸片堆叠在第一裸片上， 层，其具有在第二管芯的侧壁上的垂直部分，以及在第一管芯上延伸的水平部分。

公开(公告)号：US20120145204A1

公开(公告)日：2012-06-14

申请号：US12964097

申请日：2010-12-09

申请人： Yu-Liang Lin ,  Weng-Jin Wu ,  Jing-Cheng Lin ,  Wen-Chih Chiou

发明人： Yu-Liang Lin ,  Weng-Jin Wu ,  Jing-Cheng Lin ,  Wen-Chih Chiou

IPC分类号： B08B3/08 ,  B08B3/02

CPC分类号： H01L21/67051 ,  H01L21/68728

摘要： A device and system for thin wafer cleaning is disclosed. A preferred embodiment comprises a spin chuck having at least three holding clamps. A thin wafer with a wafer frame is mounted on the spin chuck through a tape layer. When the holding clamps are unlocked, there is no interference with the removal and placement of the wafer frame. On the other hand, when the holding clamps are locked, the holding clamps are brought into contact with the outer edge of the wafer frame so as to prevent the wafer frame from moving laterally. Furthermore, the shape of the holding clamps in a locked position is capable of preventing the wafer frame from moving vertically.

摘要翻译： 公开了用于薄晶片清洁的装置和系统。 优选实施例包括具有至少三个保持夹具的旋转卡盘。 具有晶片框架的薄晶片通过带层安装在旋转卡盘上。 当保持夹具解锁时，不会干扰晶片框架的移除和放置。 另一方面，当保持夹具被锁定时，保持夹具与晶片框架的外边缘接触，以防止晶片框架横向移动。 此外，保持夹具处于锁定位置的形状能够防止晶片框架垂直移动。

公开(公告)号：US20120018876A1

公开(公告)日：2012-01-26

申请号：US12840949

申请日：2010-07-21

申请人： Weng-Jin Wu ,  Ying-Ching Shih ,  Wen-Chih Chiou ,  Shin-Puu Jeng ,  Chen-Hua Yu

发明人： Weng-Jin Wu ,  Ying-Ching Shih ,  Wen-Chih Chiou ,  Shin-Puu Jeng ,  Chen-Hua Yu

IPC分类号： H01L23/485 ,  H01L21/768

CPC分类号： H01L21/768 ,  H01L21/56 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/481 ,  H01L23/5384 ,  H01L24/11 ,  H01L24/14 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/81895 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81805

摘要： A device includes a first die having a first side and a second side opposite to first side, the first side includes a first region and a second region, and a first metal bump of a first horizontal size formed on the first region of the first side of the first die. A second die is bonded to the first side of the first die through the first metal bump. A dielectric layer is formed over the first side of the first die and includes a first portion directly over the second die, a second portion encircling the second die, and an opening exposing the second region of the first side of the first die. A second metal bump of a second horizontal size is formed on the second region of the first side of the first die and extending into the opening of the dielectric layer. The second horizontal size is greater than the first horizontal size. An electrical component is bonded to the first side of the first die through the second metal bump.

摘要翻译： 一种器件包括具有第一侧和与第一侧相对的第二侧的第一管芯，第一侧包括第一区域和第二区域，以及形成在第一侧面的第一区域上的第一水平尺寸的第一金属凸块 的第一个死亡。 通过第一金属凸块将第二模具结合到第一模具的第一侧。 介电层形成在第一管芯的第一侧上，并且包括直接在第二管芯上方的第一部分，环绕第二管芯的第二部分和暴露第一管芯的第一侧的第二区域的开口。 第二水平尺寸的第二金属凸块形成在第一模具的第一侧的第二区域上并且延伸到电介质层的开口中。 第二个水平尺寸大于第一个水平尺寸。 电子部件通过第二金属凸块接合到第一管芯的第一侧。

公开(公告)号：US08053900B2

公开(公告)日：2011-11-08

申请号：US12255060

申请日：2008-10-21

申请人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Weng-Jin Wu

发明人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Weng-Jin Wu

IPC分类号： H01L23/48

CPC分类号： H01L24/05 ,  H01L24/06 ,  H01L24/80 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/16106 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/81894 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/12 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor chip, which further includes a first surface; and a patterned bond pad exposed through the first surface. The patterned bond pad includes a plurality of portions electrically connected to each other, and at least one opening therein. The integrated circuit further includes a dielectric material filled into at least a portion of the at least one opening.

摘要翻译： 集成电路结构包括还包括第一表面的半导体芯片; 以及通过第一表面暴露的图案化接合焊盘。 图案化接合焊盘包括彼此电连接的多个部分和其中的至少一个开口。 集成电路还包括填充到至少一个开口的至少一部分中的电介质材料。