Abstract:
A light emitting device comprises a rectangular element mounted upon a mounting substrate via a heat-melted connecting material, wherein second substrate electrodes are formed conforming to the recesses of a first substrate electrode and a portion of the outer periphery of the first and second substrate electrodes is provided with first extended sections that extend farther outward than the outer periphery of the aforementioned element. The aforementioned first extended sections are formed in at least one or more locations per one side of the outer periphery of the aforementioned rectangular element; the aforementioned first substrate electrode is provided with second extended sections that are formed on at least one of both ends of the aforementioned recesses flanking the first extended sections of the aforementioned second substrate electrodes; and the aforementioned second extended sections extend farther outward than the outer periphery of the aforementioned element.
Abstract:
The present invention provides a dicing film with a protecting film that enables to paste a dicing film to a semiconductor wafer without a shift in position while reducing a downtime. There is provided a dicing film with a protecting film in which a dicing film and a protecting film are laminated, wherein the difference between the transmittance of the protecting film and the transmittance of the dicing film with a protecting film at a portion of the dicing film where light for detecting a film transmits first is 20% or more in a wavelength of 600 to 700 nm.
Abstract:
[Problem] A semiconductor device which achieves a fine pitch, a high throughput and a high connection reliability, especially in flip-chip mounting is provided. A method for manufacturing the semiconductor device and a circuit device using the semiconductor device are also provided.[Means for solving the problem] The semiconductor device has: an electrode; an insulating part having an opening on the electrode; a protruding part formed on the electrode; a protecting part which is formed at the periphery of the protruding part and electrically isolates the protruding part; and a bonding part which is formed on the protecting part by being spaced apart from the protruding part. An upper surface of the protruding part, an upper surface of the protecting part, and an upper surface of the bonding part form the same plane.
Abstract:
The present technology discloses a multi-die package. The package comprises a lead frame structure and three dies including a first flip chip die, a second flip chip die and a third flip chip die stacked vertically. The first flip chip die is mounted on the bottom surface of the lead frame structure through the flip chip bumps; the second flip chip is mounted on the top surface of the first flip chip die through flip chip bumps; and the third flip chip die is mounted on the top surface of the lead frame structure through flip chip bumps.
Abstract:
A semiconductor package and it manufacturing method includes a lead frame having a die pad, and a source lead with substantially a V groove disposed on a top surface. A semiconductor chip disposed on the die pad. A metal plate connected to a top surface electrode of the chip having a bent extension terminated in the V groove in contact with at least one of the V groove sidewalls.
Abstract:
A semiconductor device includes a semiconductor chip, an electrode pad formed on the semiconductor chip, an underlying barrier metal formed on the electrode pad, a solder bump formed on the underlying barrier metal, and an underfill material surrounding the underlying barrier metal and the solder bump. A junction interface of the solder bump with the underlying barrier metal corresponds to an upper surface of the underlying barrier metal, and a portion of the underfill material bonded to a side surface of the solder bump and an end surface of the underlying barrier metal forms a right angle or an obtuse angle.
Abstract:
A semiconductor package and a package on package are provided. The semiconductor package includes a substrate; a semiconductor chip attached to a surface of the substrate; connecting conductors disposed on the surface of the substrate; a mold formed on the substrate and in which the connecting conductors and the semiconductor chip are provided; and connecting via holes extending through the mold and exposing the connecting conductors. With respect to a first connecting via hole of the connecting via holes, a planar distance between a first connecting conductor exposed by the first connecting via hole and an entrance of the first connecting via hole is not uniform.
Abstract:
In a stacked chip configuration, the “inter chip” connection is established on the basis of functional molecules, thereby providing a fast and space-efficient communication between the different semiconductor chips.
Abstract:
A method includes providing a pad chip having contact pads, providing a spring chip having micro-springs, applying a chemical activator to one of either the pad chip or the spring chip, applying an adhesive responsive to the chemical activator on the other of the pad chip or the spring chip, aligning the pad chip to the spring chip such that the micro-springs will contact the contact pads, and pressing the pad chip and the spring chip together such that the chemical activator at least partially cures the adhesive.
Abstract:
A copper pillar bump has a sidewall protection layer formed of an electrolytic metal layer. The electrolytic metal layer is an electrolytic nickel layer, an electrolytic gold layer, and electrolytic copper layer, or an electrolytic silver layer.