公开(公告)号：US08982469B2

公开(公告)日：2015-03-17

申请号：US13042124

申请日：2011-03-07

Applicant: David R. Hembree ,  Steve Oliver

Inventor： David R. Hembree ,  Steve Oliver

IPC: G02B27/10 ,  B29D11/00 ,  G02B3/00

CPC classification number: G02B3/0025 ,  B29D11/00278 ,  G02B3/0031 ,  G02B3/005 ,  G02B3/0056

Abstract: A method and apparatus providing a lens master device and use of the same to form a lens template and/or a lens structure. The method includes obtaining a plurality of individual lens masters, each of which has a shaped portion defining at least a portion of a lens structure to be formed. The lens masters are affixed onto a supporting structure to form a lens master device.

公开(公告)号：US08053909B2

公开(公告)日：2011-11-08

申请号：US13007743

申请日：2011-01-17

Applicant: David R. Hembree

Inventor： David R. Hembree

IPC: H01L23/49

CPC classification number: H01L25/0657 ,  B23K20/004 ,  B23K20/005 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/53213 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact. The semiconductor component can be used to form chip scale components, wafer scale components, stacked components, or interconnect components for electrically engaging or testing other semiconductor components.

Abstract translation: 用于通过导线互连制造半导体部件的方法包括提供具有电路侧，背面和通孔的基板的步骤。 该方法还包括以下步骤：将导线穿过通孔，在背面的导线上形成接触，在电路侧的导线上形成接合接触，然后将线从接合接触件断开。 通线互连包括通孔中的导线，背侧的触点和电路侧的接合触点。 背面的触点和电路侧的接合触点允许多个部件与相邻部件之间的电连接层叠。 用于执行该方法的系统包括具有通孔的基板和具有接合毛细管的引线接合器，所述接合毛细管被配置为使线穿过通孔，并形成接触和接合接触。 半导体部件可用于形成用于电接合或测试其它半导体部件的芯片级部件，晶片级部件，堆叠部件或互连部件。

公开(公告)号：US07833832B2

公开(公告)日：2010-11-16

申请号：US12412906

申请日：2009-03-27

Applicant: Alan G. Wood ,  Warren M. Farnworth ,  David R. Hembree

Inventor： Alan G. Wood ,  Warren M. Farnworth ,  David R. Hembree

IPC: H01L21/00 ,  H01L29/06 ,  H05K1/03

CPC classification number: H01L23/3114 ,  B33Y70/00 ,  B81B7/0006 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/481 ,  H01L24/48 ,  H01L27/14618 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/45015 ,  H01L2224/45624 ,  H01L2224/45655 ,  H01L2224/45664 ,  H01L2224/4813 ,  H01L2224/48471 ,  H01L2224/85045 ,  H01L2224/85207 ,  H01L2224/85951 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  Y10T29/49147 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A method for fabricating a semiconductor component with through interconnects can include the steps of providing a semiconductor substrate with substrate contacts, and forming openings from a backside of the substrate aligned with the substrate contacts. The method can also include the steps of providing an interposer substrate (or alternately a second semiconductor substrate), forming projections on the interposer substrate (or on the second semiconductor substrate), and forming conductive vias in the projections. The method can also include the steps of placing the projections in physical contact with the openings, and placing the conductive vias in electrical contact with the substrate contacts. The method can also include the steps of bonding the conductive vias to the substrate contacts, and forming terminal contacts on the interposer substrate (or alternately on one of the semiconductor substrates) in electrical communication with the conductive vias.

Abstract translation: 用于通过互连制造半导体部件的方法可以包括以下步骤：提供具有衬底触点的半导体衬底，以及从与衬底触点对准的衬底的背面形成开口。 该方法还可以包括提供插入器衬底（或者替代地第二半导体衬底）的步骤，在插入器衬底（或第二半导体衬底上）上形成突起，并在突起中形成导电通孔。 该方法还可以包括以下步骤：将突起放置在与开口物理接触的位置，并且将导电通孔放置在与基板触点电接触的位置。 该方法还可以包括以下步骤：将导电通孔接合到基板触点，以及在内导体基板（或者替代地在其中一个半导体基板上）上形成与导电通孔电连通的端子触点。

公开(公告)号：US07709776B2

公开(公告)日：2010-05-04

申请号：US12390195

申请日：2009-02-20

Applicant: Warren M. Farnworth ,  Sidney B. Rigg ,  William Mark Hiatt ,  Alan G. Wood ,  Peter A. Benson ,  James M. Wark ,  David R. Hembree ,  Kyle K. Kirby ,  Charles M. Watkins ,  Salman Akram

Inventor： Warren M. Farnworth ,  Sidney B. Rigg ,  William Mark Hiatt ,  Alan G. Wood ,  Peter A. Benson ,  James M. Wark ,  David R. Hembree ,  Kyle K. Kirby ,  Charles M. Watkins ,  Salman Akram

IPC: H01L27/00 ,  H01L31/0232

CPC classification number: H01L27/00 ,  B33Y80/00 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14683 ,  H01L27/14687 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/00014

Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract translation: 微电子成像器组件包括包括衬底的工件和在衬底上和/或衬底中的多个成像管芯。 基板包括前侧和后侧，并且成像管芯包括在基板的前侧的成像传感器和可操作地耦合到图像传感器的外部触点。 微电子成像器组件还包括相对于成像管芯叠加的光学支架。 光学支撑件可以直接在基板上或衬底上的盖上。 单个光学支撑件可以具有（a）与图像传感器中的一个对准的开口，以及（b）与图像传感器相距一定距离处的轴承元件。 微电子成像器组件还可以包括由光学器件支撑件安装或以其它方式承载的光学器件。

公开(公告)号：US07705349B2

公开(公告)日：2010-04-27

申请号：US10230836

申请日：2002-08-29

Applicant: David R. Hembree ,  Salman Akram

Inventor： David R. Hembree ,  Salman Akram

IPC: H01L23/58

CPC classification number: G01R1/18 ,  H01L22/34 ,  H01L23/5256 ,  H01L27/0251 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An apparatus and method for providing external electrostatic discharge (ESD) protection to a semiconductor device, which may or may not include its own ESD protection, are provided. An ESD structure may be associated with each interconnect, either individually or shared between two or more interconnects. Each interconnect includes a contact tip for establishing a temporary electrical connection with a bond pad of the semiconductor device and a contact pad for electrically interfacing the bond pad with external burn-in and/or test equipment. The ESD structure may be implemented, for example, as a fusible element or a shunting element, such as a pair of diodes, a diode-resistor network, or a pair of transistors. The interconnect may be employed as part of an insert including a plurality of interconnects that provides ESD protection to a plurality of integrated circuits of at least one semiconductor device.

Abstract translation: 提供了一种用于向半导体器件提供外部静电放电（ESD）保护的装置和方法，其可以包括或可以不包括其自身的ESD保护。 ESD结构可以与每个互连相关联，单独地或在两个或更多个互连之间共享。 每个互连包括用于与半导体器件的接合焊盘建立临时电连接的接触尖端和用于将接合焊盘与外部老化和/或测试设备电接口的接触焊盘。 ESD结构可以实现为例如可熔元件或分流元件，例如一对二极管，二极管 - 电阻器网络或一对晶体管。 互连可以用作插入件的一部分，其包括向至少一个半导体器件的多个集成电路提供ESD保护的多个互连。

公开(公告)号：US07659612B2

公开(公告)日：2010-02-09

申请号：US11409638

申请日：2006-04-24

Applicant: David R. Hembree ,  Alan G. Wood

Inventor： David R. Hembree ,  Alan G. Wood

IPC: H01L23/04

CPC classification number: H01L24/16 ,  G01R1/06716 ,  G01R1/07307 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76877 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02125 ,  H01L2224/0233 ,  H01L2224/02333 ,  H01L2224/02335 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/0333 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1134 ,  H01L2224/13009 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45116 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45655 ,  H01L2224/45684 ,  H01L2224/45698 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4899 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10155 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45164 ,  H01L2924/013 ,  H01L2924/00013

Abstract: A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) attached to the substrate contact. The through wire interconnect provides a multi level interconnect having contacts on opposing first and second sides of the semiconductor substrate. The through wire interconnect (TWI) includes a via through the substrate contact and the substrate, a wire in the via having a bonded connection with the substrate contact, a first contact on the wire proximate to the first side, and a second contact on the wire proximate to the second side. The through wire interconnect (TWI) also includes a polymer layer which partially encapsulates the through wire interconnect (TWI) while leaving the first contact exposed. The semiconductor component can be used to fabricate stacked systems, module systems and test systems. A method for fabricating the semiconductor component can include a film assisted molding process for forming the polymer layer.

Abstract translation: 半导体部件包括具有衬底接触的半导体衬底和附着到衬底触点的通线互连（TWI）。 通线互连提供了在半导体衬底的相对的第一和第二侧上具有触点的多电平互连。 通线互连（TWI）包括穿过基板触点和基板的通孔，通孔中的导线与基板接触具有接合连接，接近第一侧的导线上的第一触点和第二触点 电线靠近第二侧。 通线互连（TWI）还包括聚合物层，其部分地封装通孔互连（TWI），同时使第一触点暴露。 半导体部件可用于制造堆叠系统，模块系统和测试系统。 制造半导体部件的方法可以包括用于形成聚合物层的膜辅助成型工艺。

公开(公告)号：US20090155949A1

公开(公告)日：2009-06-18

申请号：US12390195

申请日：2009-02-20

Applicant: Warren M. Farnworth ,  Sidney B. Rigg ,  William Mark Hiatt ,  Alan G. Wood ,  Peter A. Benson ,  James M. Wark ,  David R. Hembree ,  Kyle K. Kirby ,  Charles M. Watkins ,  Salman Akram

Inventor： Warren M. Farnworth ,  Sidney B. Rigg ,  William Mark Hiatt ,  Alan G. Wood ,  Peter A. Benson ,  James M. Wark ,  David R. Hembree ,  Kyle K. Kirby ,  Charles M. Watkins ,  Salman Akram

IPC: H01L31/0232

CPC classification number: H01L27/00 ,  B33Y80/00 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14683 ,  H01L27/14687 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/00014

Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract translation: 微电子成像器组件包括包括衬底的工件和在衬底上和/或衬底中的多个成像管芯。 基板包括前侧和后侧，并且成像管芯包括在基板的前侧的成像传感器和可操作地耦合到图像传感器的外部触点。 微电子成像器组件还包括相对于成像管芯叠加的光学支架。 光学支撑件可以直接在基板上或衬底上的盖上。 单个光学支撑件可以具有（a）与图像传感器中的一个对准的开口，以及（b）与图像传感器相距一定距离处的轴承元件。 微电子成像器组件还可以包括由光学器件支撑件安装或以其它方式承载的光学器件。

公开(公告)号：US07459393B2

公开(公告)日：2008-12-02

申请号：US11497699

申请日：2006-08-02

Applicant: Warren M. Farnworth ,  Alan G. Wood ,  William M. Hiatt ,  James M. Wark ,  David R. Hembree ,  Kyle K. Kirby ,  Pete A. Benson

Inventor： Warren M. Farnworth ,  Alan G. Wood ,  William M. Hiatt ,  James M. Wark ,  David R. Hembree ,  Kyle K. Kirby ,  Pete A. Benson

IPC: H01L21/44

CPC classification number: H01L21/561 ,  B33Y70/00 ,  B33Y80/00 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05111 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05178 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13009 ,  H01L2224/13024 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/18161 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/351 ,  H01L2924/207 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

Abstract: A method for fabricating a semiconductor component includes the steps of providing a substrate having a contact on a circuit side thereof, forming an opening from a backside of the substrate to the contact, forming a conductive via in the opening in electrical contact with a surface of the contact, and forming a second contact on the back side in electrical communication with the conductive via. The method can also include the steps of thinning the substrate from the backside, forming insulating layers on the circuit side and the backside, and forming a conductor and terminal contact on the circuit side in electrical communication with the conductive via. A semiconductor component includes the contact on the circuit side, the conductive via in electrical contact with the contact, and the second contact on the backside in electrical communication with the conductive via. The semiconductor component can also include the insulating layers, the conductor and the terminal contact.

Abstract translation: 一种制造半导体部件的方法包括以下步骤：提供在其电路侧具有接触的基板，从基板的背面形成开口到触点，在开口中形成导电通孔，该导电通孔与 接触，并且在背面形成与导电通孔电连通的第二接触。 该方法还可以包括从背面减薄衬底的步骤，在电路侧和背面形成绝缘层，以及在电路侧形成与导电通孔电连通的导体和端子触点。 半导体部件包括电路侧的触点，与触点电接触的导电通孔以及与导电通路电气连通的背侧的第二触点。 半导体部件还可以包括绝缘层，导体和端子触头。

公开(公告)号：US07387119B2

公开(公告)日：2008-06-17

申请号：US11137048

申请日：2005-05-25

Applicant: Salman Akram ,  Derek J. Gochnour ,  Michael E. Hess ,  David R. Hembree

Inventor： Salman Akram ,  Derek J. Gochnour ,  Michael E. Hess ,  David R. Hembree

IPC: B28D1/32

CPC classification number: H01L21/67092 ,  B28D5/024 ,  B28D5/029 ,  Y10T83/0222 ,  Y10T83/0363 ,  Y10T83/04 ,  Y10T83/0524 ,  Y10T83/7726 ,  Y10T83/7809 ,  Y10T83/7868

Abstract: A saw for dicing substrates, such as semiconductor wafers, that has one or more variable indexing capabilities and two or more blades. One of the blades may be moved laterally or vertically, independent of one or more other blades.

Abstract translation: 用于具有一个或多个可变分度能力的切割基板（例如半导体晶片）的锯和两个或更多个叶片。 一个叶片可以横向或垂直地移动，而与一个或多个其它叶片无关。

公开(公告)号：US20080138973A1

公开(公告)日：2008-06-12

申请号：US12027106

申请日：2008-02-06

Applicant: Kyle K. Kirby ,  Salman Akram ,  David R. Hembree ,  Sidney B. Rigg ,  Warren M. Farnworth ,  William M. Hiatt

Inventor： Kyle K. Kirby ,  Salman Akram ,  David R. Hembree ,  Sidney B. Rigg ,  Warren M. Farnworth ,  William M. Hiatt

IPC: H01L21/44 ,  H01L21/768

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/0306 ,  H05K3/4038 ,  H05K3/422 ,  H05K3/423 ,  H05K2201/0305 ,  H05K2201/09827 ,  H05K2203/072 ,  H05K2203/1147 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.

Abstract translation: 本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微电子器件中形成互连的方法。 在一个实施例中，一种方法包括提供具有正面和背面的微电子衬底。 衬底具有包括集成电路的微电子管芯和可操作地耦合到集成电路的端子。 该方法还包括至少部分地形成通过基底并且在基底的前侧和/或后侧具有开口的通道。 该方法还包括用封闭通道一端的导电盖密封开口，同时通道的另一端保持打开。 该方法然后包括用导电材料填充通道。