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公开(公告)号:US20130270698A1
公开(公告)日:2013-10-17
申请号:US13448217
申请日:2012-04-16
申请人: Hsien-Wei CHEN , Ying-Ju CHEN , Tsung-Yuan YU , Yu-Feng CHEN , Tsung-Ding WANG
发明人: Hsien-Wei CHEN , Ying-Ju CHEN , Tsung-Yuan YU , Yu-Feng CHEN , Tsung-Ding WANG
IPC分类号: H01L23/488 , H01L21/28
CPC分类号: H01L24/06 , H01L24/05 , H01L24/13 , H01L24/16 , H01L2224/0401 , H01L2224/05008 , H01L2224/05541 , H01L2224/05548 , H01L2224/05552 , H01L2224/05567 , H01L2224/05569 , H01L2224/05572 , H01L2224/05644 , H01L2224/0603 , H01L2224/06131 , H01L2224/06133 , H01L2224/06179 , H01L2224/1134 , H01L2224/13005 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13166 , H01L2224/13181 , H01L2224/16145 , H01L2224/16238 , H01L2224/81191 , H01L2924/00014 , H01L2924/10253 , H01L2924/1306 , H01L2924/014 , H01L2924/00 , H01L2924/207 , H01L2924/206
摘要: A semiconductor device includes a semiconductor die having first and second conductive pads, and a substrate having third and fourth bonding pads. A width ratio of the first conductive pad over the third bonding pad at an inner region is different from a width ratio of the second conductive pad over the fourth bonding pad at an outer region.
摘要翻译: 半导体器件包括具有第一和第二导电焊盘的半导体管芯,以及具有第三和第四焊盘的衬底。 第一导电焊盘在内部区域的第三接合焊盘上的宽度比不同于外部区域处的第四接合焊盘上的第二导电焊盘的宽度比。
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公开(公告)号:US20130256914A1
公开(公告)日:2013-10-03
申请号:US13586629
申请日:2012-08-15
IPC分类号: H01L25/00 , H01L21/768
CPC分类号: H01L24/81 , H01L21/56 , H01L23/3114 , H01L23/3121 , H01L23/49811 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/85 , H01L25/0657 , H01L25/105 , H01L2224/0401 , H01L2224/04042 , H01L2224/05557 , H01L2224/05571 , H01L2224/05611 , H01L2224/05613 , H01L2224/05616 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06155 , H01L2224/131 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/81192 , H01L2224/85 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06568 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/15311 , H01L2924/15321 , H01L2924/181 , H01L2924/18161 , H01L2924/00 , H01L2224/45099 , H01L2924/014 , H01L2224/05552 , H01L2924/00012
摘要: The described embodiments of forming bonding structures for package on package involves removing a portion of connectors and molding compound of the lower package. The described bonding mechanisms enable easier placement and alignment of connectors of an upper package to with connector of a lower package. As a result, the process window of the bonding process is wider. In addition, the bonding structures have smoother join profile and planar joint plane. As a result, the bonding structures are less likely to crack and also are less likely to crack. Both the yield and the form factor of the package on package structure are improved.
摘要翻译: 所形成的用于包装在包装上的粘合结构的实施例包括去除连接器的一部分和下封装的模塑料。 所描述的接合机构使得能够更容易地将上部封装的连接器放置和对准到具有较低封装的连接器。 结果,接合过程的过程窗口更宽。 此外,接合结构具有更平滑的接合轮廓和平面接合平面。 结果,接合结构不太可能破裂,也不易破裂。 包装结构上的包装的产量和形状因数均得到改善。
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公开(公告)号:US20140048926A1
公开(公告)日:2014-02-20
申请号:US13585500
申请日:2012-08-14
申请人: Tsung-Ding WANG , Jung Wei CHENG , Bo-I LEE
发明人: Tsung-Ding WANG , Jung Wei CHENG , Bo-I LEE
IPC分类号: H01L23/485 , H01L21/60
CPC分类号: H01L23/3185 , H01L21/302 , H01L21/561 , H01L21/565 , H01L21/6836 , H01L21/78 , H01L23/3114 , H01L23/3178 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/94 , H01L2221/6834 , H01L2224/0401 , H01L2224/05009 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05572 , H01L2224/0558 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/05686 , H01L2224/11334 , H01L2224/1134 , H01L2224/11849 , H01L2224/1191 , H01L2224/13005 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/94 , H01L2924/10156 , H01L2924/12042 , H01L2924/181 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2224/11 , H01L2224/03 , H01L2924/206 , H01L2924/00 , H01L2924/014 , H01L2924/01047
摘要: A semiconductor package includes a passivation layer overlying a semiconductor substrate, a bump overlying the passivation layer, and a molding compound layer overlying the passivation layer and covering a lower portion of the bump. A sidewall of the passivation layer is covered by the molding compound layer.
摘要翻译: 半导体封装包括覆盖半导体衬底的钝化层,覆盖钝化层的凸块以及覆盖钝化层并覆盖凸块下部的模塑复合层。 钝化层的侧壁被模塑料层覆盖。
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公开(公告)号:US20130113108A1
公开(公告)日:2013-05-09
申请号:US13602650
申请日:2012-09-04
申请人: Tsung-Ding WANG , Chien-Hsun LEE
发明人: Tsung-Ding WANG , Chien-Hsun LEE
CPC分类号: H01L25/03 , H01L21/563 , H01L23/145 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/131 , H01L2224/16225 , H01L2224/16237 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/81447 , H01L2224/81815 , H01L2224/8191 , H01L2224/83385 , H01L2224/92125 , H01L2224/97 , H01L2225/06517 , H01L2225/06562 , H01L2225/06589 , H01L2924/15311 , H01L2924/15331 , H01L2924/15747 , H01L2924/181 , H01L2924/18161 , H01L2924/014 , H01L2224/81 , H01L2924/00012 , H01L2924/00
摘要: A method comprises connecting a substrate having a plurality of integrated circuit (IC) dies to a package substrate, so that the package substrate extends beyond at least two edges of the substrate, leaving first and second edge portions of the package substrate having exposed contacts. The first and second edge portions meet at a first corner of the package substrate. At least a first upper die package is placed over the substrate, so that first and second edge portions of the first upper die package extend beyond the at least two edges of the substrate. Pads on the first and second edge portions of the first upper die package are connected to the contacts of the first and second edge portions of the package substrate.
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公开(公告)号:US20130187269A1
公开(公告)日:2013-07-25
申请号:US13427787
申请日:2012-03-22
申请人: Hung-Jen LIN , Tsung-Ding WANG , Chien-Hsiun LEE , Wen-Hsiung LU , Ming-Da CHENG , Chung-Shi LIU
发明人: Hung-Jen LIN , Tsung-Ding WANG , Chien-Hsiun LEE , Wen-Hsiung LU , Ming-Da CHENG , Chung-Shi LIU
IPC分类号: H01L23/498 , H01L21/56
CPC分类号: H01L24/81 , H01L21/563 , H01L21/565 , H01L21/566 , H01L21/768 , H01L23/3114 , H01L23/3171 , H01L23/525 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/83 , H01L24/92 , H01L24/94 , H01L2224/02311 , H01L2224/0239 , H01L2224/024 , H01L2224/0347 , H01L2224/03612 , H01L2224/03614 , H01L2224/0362 , H01L2224/0401 , H01L2224/05008 , H01L2224/05073 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05187 , H01L2224/05582 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/11334 , H01L2224/1146 , H01L2224/11849 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/21 , H01L2224/27318 , H01L2224/27334 , H01L2224/27416 , H01L2224/2919 , H01L2224/73204 , H01L2224/81024 , H01L2224/81191 , H01L2224/81203 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83855 , H01L2224/92125 , H01L2224/94 , H01L2924/00014 , H01L2924/01013 , H01L2924/01047 , H01L2924/12042 , H01L2924/181 , H01L2924/2076 , H01L2224/81 , H01L2924/01029 , H01L2924/04941 , H01L2924/04953 , H01L2924/014 , H01L2224/11 , H01L2924/00
摘要: A package assembly including a semiconductor die electrically coupled to a substrate by an interconnected joint structure. The semiconductor die includes a bump overlying a semiconductor substrate, and a molding compound layer overlying the semiconductor substrate and being in physical contact with a first portion of the bump. The substrate includes a no-flow underfill layer on a conductive region. A second portion of the bump is in physical contact with the no-flow underfill layer to form the interconnected joint structure.
摘要翻译: 一种包装组件,其包括通过互连的接合结构电耦合到衬底的半导体管芯。 半导体管芯包括覆盖半导体衬底的凸块和覆盖半导体衬底并与凸点的第一部分物理接触的模塑复合层。 衬底包括导电区域上的无流动底部填充层。 凸块的第二部分与无流动底部填充层物理接触以形成互连的连接结构。
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公开(公告)号:US20130056880A1
公开(公告)日:2013-03-07
申请号:US13223428
申请日:2011-09-01
申请人: Tsung-Ding WANG , Chien-Hsiun Lee
发明人: Tsung-Ding WANG , Chien-Hsiun Lee
CPC分类号: H01L25/0657 , H01L23/145 , H01L23/3128 , H01L23/3135 , H01L23/49816 , H01L23/49827 , H01L24/10 , H01L24/19 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/12105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2224/81 , H01L2924/00012 , H01L2924/00
摘要: An assembly has at least one integrated circuit (IC) die fixed in a medium. The assembly has a redistribution layer over the IC die. The redistribution layer has conductors connecting first pads on active faces of the IC die to second pads at an exposed surface of the assembly. A die unit is provided over the IC die. The die unit has a bottom die interconnected to a package substrate. Respective portions of the redistribution layer corresponding to each of the at least one IC die partially underlie the bottom die, and extend beyond the bottom die. The package substrate has contacts connected to the ones of the second pads corresponding to the at least one IC die.
摘要翻译: 组件具有固定在介质中的至少一个集成电路(IC)模具。 组件在IC芯片上具有再分配层。 再分配层具有将IC芯片的有源面上的第一焊盘与组件的暴露表面处的第二焊盘连接的导体。 模芯单元设置在IC芯片上。 模具单元具有与封装衬底互连的底模。 对应于至少一个IC模具中的每一个的重分配层的各个部分部分地位于底模下面,并且延伸超出底模。 封装衬底具有连接到对应于至少一个IC管芯的第二焊盘的触点的触点。
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公开(公告)号:US20120168962A1
公开(公告)日:2012-07-05
申请号:US13419078
申请日:2012-03-13
申请人: Ku-Feng YANG , Weng-Jin WU , Wen-Chih CHIOU , Tsung-Ding WANG
发明人: Ku-Feng YANG , Weng-Jin WU , Wen-Chih CHIOU , Tsung-Ding WANG
IPC分类号: H01L23/498 , H01L23/29
CPC分类号: H01L23/3114 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L24/16 , H01L24/32 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/68368 , H01L2221/68381 , H01L2224/16145 , H01L2224/32145 , H01L2224/80006 , H01L2224/80894 , H01L2224/80895 , H01L2224/80896 , H01L2224/81005 , H01L2224/81801 , H01L2224/83005 , H01L2224/8385 , H01L2224/94 , H01L2224/95001 , H01L2225/06541 , H01L2924/01006 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , H01L2924/1421 , H01L2924/1431 , H01L2924/1434 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/3512 , H01L2924/00 , H01L2224/83
摘要: A thin wafer protection device includes a wafer having a plurality of semiconductor chips. The wafer has a first side and an opposite second side. A plurality of dies is over the first side of the wafer, and at least one of the plurality of dies is bonded to at least one of the plurality of semiconductor chips. A wafer carrier is over the second side of the wafer. An encapsulating layer is over the first side of the wafer and the plurality of dies, and the encapsulating layer has a planar top surface. An adhesive tape is over the planar top surface of the encapsulating layer.
摘要翻译: 薄晶片保护装置包括具有多个半导体芯片的晶片。 晶片具有第一侧和相对的第二侧。 多个管芯在晶片的第一侧上方,多个管芯中的至少一个与多个半导体芯片中的至少一个接合。 晶片载体在晶片的第二面之上。 封装层在晶片的第一侧和多个管芯之上,并且封装层具有平坦的顶表面。 粘合带在封装层的平坦顶表面之上。
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公开(公告)号:US20100244284A1
公开(公告)日:2010-09-30
申请号:US12731281
申请日:2010-03-25
申请人: Ku-Feng YANG , Weng-Jin WU , Wen-Chih CHIOU , Tsung-Ding WANG
发明人: Ku-Feng YANG , Weng-Jin WU , Wen-Chih CHIOU , Tsung-Ding WANG
CPC分类号: H01L23/3114 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L24/16 , H01L24/32 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/68368 , H01L2221/68381 , H01L2224/16145 , H01L2224/32145 , H01L2224/80006 , H01L2224/80894 , H01L2224/80895 , H01L2224/80896 , H01L2224/81005 , H01L2224/81801 , H01L2224/83005 , H01L2224/8385 , H01L2224/94 , H01L2224/95001 , H01L2225/06541 , H01L2924/01006 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , H01L2924/1421 , H01L2924/1431 , H01L2924/1434 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/3512 , H01L2924/00 , H01L2224/83
摘要: A method for thin wafer handling and processing is provided. In one embodiment, the method comprises providing a wafer having a plurality of semiconductor chips, the wafer having a first side and a second side. A plurality of dies are attached to the first side of the wafer, at least one of the dies are bonded to at least one of the plurality of semiconductor chips. A wafer carrier is provided, wherein the wafer carrier is attached to the second side of the wafer. The first side of the wafer and the plurality of dies are encapsulated with a planar support layer. A first adhesion tape is attached to the planar support layer. The wafer carrier is then removed from the wafer and the wafer is diced into individual semiconductor packages.
摘要翻译: 提供了一种用于薄晶片处理和处理的方法。 在一个实施例中,该方法包括提供具有多个半导体芯片的晶片,该晶片具有第一侧和第二侧。 多个管芯附接到晶片的第一侧,至少一个管芯被结合到多个半导体芯片中的至少一个。 提供晶片载体,其中晶片载体附接到晶片的第二侧。 晶片的第一侧和多个管芯被平坦的支撑层封装。 第一粘合带附接到平面支撑层。 然后将晶片载体从晶片上移除,并将晶片切成单独的半导体封装。
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