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    Microelectronic bond ribbon design
    1.
    发明授权
    Microelectronic bond ribbon design 失效
    微电子键带设计

    公开(公告)号：US6081035A

    公开(公告)日：2000-06-27

    申请号：US736415

    申请日：1996-10-24

    申请人： Michael Warner ,  Thomas H. Distefano ,  David Gibson

    发明人： Michael Warner ,  Thomas H. Distefano ,  David Gibson

    IPC分类号： H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L24/50 ,  H01L23/49541 ,  H01L23/49558 ,  H01L23/49572 ,  H01L23/49586 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14

    摘要： An improved bond ribbon design, said bond ribbon having a dual taper that functions to localize the bending along a predetermined distribution of the bond ribbon during the bonding of the bond ribbon to an associated contact of a semiconductor chip. Use of the dual-tapered bond ribbons during bonding provides a bonded bond ribbon having a form that is substantially s-shaped. The radii of curvature making out the curves of the s-shaped configuration can be predetermined and controlled by the length and taper of the individual tapered section. The improved bond ribbon further comprises an anchor pad, said anchor pad characterized by a large surface area that decreases the likelihood of delamination of it from a supporting dielectric structure. A multiplicity of these improved bond ribbons can be fabricated in an external connection component so as to facilitate the alignment and bonding process of multiple bond ribbons to corresponding contacts of the semiconductor chip and can be designed, configured or placed such that the corner contact of the semiconductor chip are accessible for bonding. With respect to the problems associated with accessing the corner contacts of a semiconductor chip when using the connection component, three approaches are offered as solutions.

    摘要翻译： 改进的粘结带设计，所述粘结带具有双锥度，其功能是在粘结带与半导体芯片的相关联的接合处期间沿着粘合带的预定分布定位弯曲。 在接合期间使用双锥形粘结带提供具有基本上S形的形式的粘结粘结带。 形成s形构造曲线的曲率半径可以由单个锥形部分的长度和锥度来预定和控制。 改进的粘结带还包括锚垫，所述锚垫的特征在于大的表面积减小了其从支撑介质结构分层的可能性。 可以在外部连接部件中制造多个这些改进的接合带，以便于将多个接合带对准和接合处理到半导体芯片的对应接点，并且可以被设计，配置或放置，使得 半导体芯片可用于接合。 关于在使用连接部件时访问半导体芯片的角接触相关的问题，提供三种方案作为解决方案。

    Bonding lead structure with enhanced encapsulation
    2.
    发明授权
    Bonding lead structure with enhanced encapsulation 失效
    结合引线结构增强封装

    公开(公告)号：US06191473B1

    公开(公告)日：2001-02-20

    申请号：US09315252

    申请日：1999-05-20

    申请人： Thomas H. Distefano

    发明人： Thomas H. Distefano

    IPC分类号： H01L2352

    CPC分类号： H01L24/50 ,  H01L23/49572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/00

    摘要： A connection component for a semiconductor chip includes a support structure having a top surface including a dielectric material and a bottom surface. The support structure includes a central portion, a peripheral portion and one or more gaps extending substantially between the central portion and the peripheral portion. A bus overlies the top surface of the support structure. The each bus has an outer edge which overlies the peripheral portion of the support structure and an inner edge which overlies the one or more gaps. The support structure also includes one or more electrically conductive leads having first ends secured to the central portion and second ends overlying the gaps and being secured to the inner edge of the bus. The second ends of the leads are displaceable relative to the bus in response to bonding forces being applied to the leads for engaging contacts on a semiconductor chip.

    摘要翻译： 用于半导体芯片的连接部件包括具有包括电介质材料和底面的顶表面的支撑结构。 支撑结构包括中心部分，周边部分和基本上在中心部分和周边部分之间延伸的一个或多个间隙。 公共汽车覆盖在支撑结构的顶面上。 每个总线具有覆盖支撑结构的周边部分的外边缘和覆盖在一个或多个间隙上的内边缘。 支撑结构还包括一个或多个导电引线，其具有固定到中心部分的第一端和覆盖间隙的第二端并固定到总线的内边缘。 引线的第二端可以响应于施加到引线上的接合力而相对于母线移位，以接合半导体芯片上的触点。

    Microelectronic encapsulation methods and equipment
    7.
    发明授权
    Microelectronic encapsulation methods and equipment 失效
    微电子封装方法和设备

    公开(公告)号：US5766987A

    公开(公告)日：1998-06-16

    申请号：US532235

    申请日：1995-09-22

    申请人： Craig Mitchell ,  Thomas H. Distefano

    发明人： Craig Mitchell ,  Thomas H. Distefano

    IPC分类号： H01L21/56 ,  H01L21/44

    CPC分类号： H01L21/565 ,  H01L2924/0002

    摘要： Microelectronic assemblies such as semiconductor chip assemblies are encapsulated. During encapsulation, the terminals carried by a dielectric layer in each assembly, and the bottom surface of the semiconductor chip in each assembly are protected by covering layers. The covering layers confine the liquid encapsulant and prevent contamination of the terminals and chip bottom surfaces. The encapsulation process may be conducted by using a tilting fixture. The liquid encapsulant and the assemblies are placed into the fixture, the fixture is closed and evacuated, and the encapsulant is then poured onto the assemblies while maintaining the fixture under vacuum. The fixture is then pressurized and maintained under pressure during cure of the encapsulant.

    摘要翻译： 诸如半导体芯片组件的微电子组件被封装。 在封装期间，每个组件中由介电层承载的端子和每个组件中的半导体芯片的底表面由覆盖层保护。 覆盖层限制液体密封剂，并防止端子和芯片底面的污染。 封装过程可以通过使用倾斜夹具进行。 将液体密封剂和组件放入固定装置中，将固定装置关闭并抽真空，然后将密封剂倒入组件上，同时将固定装置保持在真空状态。 然后将固定装置加压并在密封剂固化期间保持压力。