公开(公告)号：US5762866A

公开(公告)日：1998-06-09

申请号：US502941

申请日：1995-07-17

申请人： Sungho Jin ,  Mark Thomas McCormack

发明人： Sungho Jin ,  Mark Thomas McCormack

IPC分类号： B23K35/26 ,  C22C13/00 ,  C22C13/02

CPC分类号： C22C13/00 ,  B23K35/262

摘要： A high-strength Pb-free solder alloy, based on the Sn--Ag--Zn system, is disclosed. The Pb-free solder alloy contains, in weight percent, 0.2-0.6% Zn, 1-6% Ag, one or both 0.2-0.6% In and 0.2-0.6% Bi, and the balance Sn. The addition of Zn significantly improves the mechanical strength and creep resistance of e.g., Sn--3.5% Ag eutectic solder while maintaining substantially the same level of ductility. The increase in strength is as much as 48% over that of the Sn--3.5% Ag alloy. This strengthening from the Zn additions is attributed to a uniform solidification structure and a substantial refinement of the precipitates in the alloy. Essentially all of the added Zn resides in the more corrosion-resistant, Ag-based, intermetallic precipitates, leaving the Sn-rich matrix primarily free of Zn in solid solution.

摘要翻译： 公开了一种基于Sn-Ag-Zn系统的高强度无铅焊料合金。 无铅焊料合金以重量百分比含有0.2-0.6％的Zn，1-6％的Ag，一种或两种为0.2-0.6％的In和0.2-0.6％的Bi，余量为Sn。 Zn的添加显着提高例如Sn-3.5％Ag共晶焊料的机械强度和抗蠕变性，同时保持基本上相同的延展性水平。 强度比Sn-3.5％Ag合金高出48％。 Zn添加物的这种强化归因于合金中的均匀凝固结构和沉淀物的显着改进。 基本上所有添加的Zn都位于更耐腐蚀的Ag基金属间析出物中，使富含Sn的基体在固溶体中基本上不含Zn。

公开(公告)号：US5747918A

公开(公告)日：1998-05-05

申请号：US567867

申请日：1995-12-06

申请人： Chang-Beom Eom ,  Sungho Jin ,  Gregory Peter Kochanski ,  Mark Thomas McCormack ,  Yiu-Huen Wong

发明人： Chang-Beom Eom ,  Sungho Jin ,  Gregory Peter Kochanski ,  Mark Thomas McCormack ,  Yiu-Huen Wong

IPC分类号： H01J31/12 ,  H01J1/304 ,  H01J29/04 ,  H01J1/30

CPC分类号： H01J1/3042 ,  H01J2201/30403 ,  H01J2201/30457

摘要： A novel and advantageous cathode structure for a field emission display apparatus is disclosed. A given pixel comprises a multiplicity of spaced apart emitter bodies on a support. A given emitter body comprises diamond and/or rare earth boride, and has a relatively sharp geometrical feature that facilitates electron emission from the emitter body. By way of example, the emitter body comprises diamond bodies grown on a support, or it comprises a pre-existing diamond particle that was placed on the support. Such emitter bodies generally can be provided easily and at low cost, and typically have naturally occurring sharp geometrical features such as points and edges. We have also discovered that appropriately grown rare earth boride films of thickness 30 nm or less may substantially improve electron emission from emitter bodies, and some preferred embodiments of the invention comprise a cathode structure that comprises a thin layer of, e.g., LaB.sub.6 on the emitter bodies. Methods of making cathodes according to the invention are also disclosed.

摘要翻译： 公开了一种用于场发射显示装置的新型和有利的阴极结构。 给定像素包括在支撑体上的多个间隔开的发射体。 给定的发射体包括金刚石和/或稀土硼化物，并且具有促进发射体的电子发射的相对尖锐的几何特征。 作为示例，发射器体包括在支撑体上生长的金刚石体，或者包括放置在支撑体上的预先存在的金刚石颗粒。 这样的发射体通常可以容易且低成本地提供，并且通常具有天然存在的尖锐几何特征，例如点和边缘。 我们还发现，适当生长的厚度为30nm或更小的稀土硼化物膜可以显着改善发射体的电子发射，并且本发明的一些优选实施例包括阴极结构，其包括例如发射极上的LaB6的薄层 身体。 还公开了制备根据本发明的阴极的方法。

公开(公告)号：US5846366A

公开(公告)日：1998-12-08

申请号：US698284

申请日：1996-08-14

申请人： Sungho Jin ,  Mark Thomas McCormack

发明人： Sungho Jin ,  Mark Thomas McCormack

IPC分类号： B23K1/20 ,  B23K3/06 ,  H01L21/48 ,  H01L21/60 ,  H01L21/68 ,  H05K3/34 ,  B23K31/02

CPC分类号： H01L24/81 ,  H01L21/4853 ,  H01L21/6835 ,  H01L24/11 ,  H05K3/3484 ,  H01L2224/11003 ,  H01L2224/1111 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/0106 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15787 ,  H05K2201/0133 ,  H05K2201/0218 ,  H05K2201/083 ,  H05K2203/0156 ,  H05K2203/0338 ,  H05K2203/0425 ,  H05K2203/0528 ,  H05K2203/104 ,  Y10T156/1089 ,  Y10T156/1093

摘要： In accordance with the invention, an electronic device having one or more contact pads is placed in contact with a carrier sheet bearing an array of transferable solder particles. Heat is applied to adhere the solder to the contact pads, and solder is selectively transferred onto the contact pads. In a preferred embodiment the solder-carrying medium comprises elastomeric material and the solder particles comprise solder-coated magnetic particles. Application of a magnetic field while the elastomer is curing produces a regular array of solder coated particles. Using this method, devices having smaller than conventional contact structures can be readily interconnected.

摘要翻译： 根据本发明，具有一个或多个接触垫的电子设备被放置成与承载有可转移焊料颗粒阵列的载体片接触。 施加热量以将焊料粘附到接触焊盘，并且将焊料选择性地转移到接触焊盘上。 在优选实施例中，焊料载体介质包括弹性材料，焊料颗粒包括焊料涂覆的磁性颗粒。 在弹性体固化时施加磁场产生规则的焊料涂覆颗粒阵列。 使用这种方法，具有小于常规接触结构的装置可以容易地相互连接。

公开(公告)号：US5834709A

公开(公告)日：1998-11-10

申请号：US234528

申请日：1994-04-28

申请人： Greg E. Blonder ,  Robert Albert Boie ,  Sungho Jin ,  Mark Thomas McCormack

发明人： Greg E. Blonder ,  Robert Albert Boie ,  Sungho Jin ,  Mark Thomas McCormack

IPC分类号： G01B7/00 ,  G01D5/14 ,  G01D5/16 ,  G01D5/18 ,  G01R33/09 ,  G06F3/033 ,  G06F3/046 ,  G11B5/39 ,  H01F1/00 ,  H01F1/40 ,  H01L43/08 ,  H01L43/10 ,  G08C21/00

CPC分类号： G06F3/046 ,  B82Y25/00 ,  G01D5/145 ,  G01R33/09 ,  H01F1/0036 ,  H01F1/407 ,  H01L43/10

摘要： The present invention provides a position-sensing system which employs sensors incorporating magnetoresistive materials. The position of a magnetic information input member is determined through the resistance change of the magnetoresistive sensor in response to the magnetic field from the magnetic information input member. Exemplary magnetoresistive materials are lanthanum manganites having high magnetoresistive ratios. Two-dimensional position sensing systems for graphics tablets are also described.

摘要翻译： 本发明提供了采用包含磁阻材料的传感器的位置感测系统。 响应于来自磁信息输入构件的磁场，磁信息输入构件的位置由磁阻传感器的电阻变化确定。 示例性的磁致电阻材料是具有高磁阻率的锰酸镧。 还描述了用于图形片的二维位置感测系统。

公开(公告)号：US5698160A

公开(公告)日：1997-12-16

申请号：US705035

申请日：1996-08-29

申请人： Ho Sou Chen ,  Sungho Jin ,  Mark Thomas McCormack

发明人： Ho Sou Chen ,  Sungho Jin ,  Mark Thomas McCormack

IPC分类号： B23K35/26 ,  C22C13/00

CPC分类号： C22C13/00 ,  B23K35/262

摘要： According to the present invention, an article of manufacture is provided having at least one region which includes a lead-free solder composition. The lead-free solder composition comprises an alloy of at least 50 wt. % tin and 7-30 wt. % zinc. An effective amount of silver is added to increase the ductility of the resultant alloy at least 25% over the ductility of the binary eutectic tin-zinc alloy. In a further embodiment, the present invention provides alloys useful in articles comprising lead-free solder compositions. The alloys include at least (8.0+y) wt. % zinc, 0.25 y to 0.5 y wt. % silver and at least 50 wt. % tin where y is from 0.2 to 22.

摘要翻译： 根据本发明，提供了具有至少一个包括无铅焊料组合物的区域的制造品。 无铅焊料组合物包含至少50wt。 ％锡和7-30重量％ ％锌。 加入有效量的银以使所得合金的延展性比二元共晶锡 - 锌合金的延展性提高至少25％。 在另一个实施方案中，本发明提供了可用于包含无铅焊料组合物的制品中的合金。 合金包括至少（8.0 + y）wt。 ％锌，0.25〜0.5重量％ ％银和至少50重量％ ％锡，其中y为0.2至22。

公开(公告)号：US07513037B2

公开(公告)日：2009-04-07

申请号：US11060002

申请日：2005-02-17

申请人： Mark Thomas McCormack ,  Hunt Hang Jiang ,  Michael G. Peters ,  Yasuhito Takahashi

发明人： Mark Thomas McCormack ,  Hunt Hang Jiang ,  Michael G. Peters ,  Yasuhito Takahashi

IPC分类号： H01K3/10

CPC分类号： H01L24/82 ,  H01L23/5389 ,  H01L24/24 ,  H01L2224/24051 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/185 ,  H05K3/4602 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method for producing a circuit board having an integrated electronic component comprising providing a circuit board substrate having a first substrate surface and a second substrate surface, securing an integrated electronic component to the first substrate surface, and disposing a first dielectric layer on the first substrate surface and over the first integrated electronic component. The method additionally includes disposing a metallic layer on the first dielectric layer to produce an integrated electronic component assembly, producing in the integrated electronic component assembly at least one via having a metal lining in contact with the metallic layer, and disposing a second dielectric layer over the via and over the metallic layer. At least one metal-lined opening is formed in the second dielectric layer and in the first dielectric layer to expose at least part of the integrated electronic component, and to couple the metal lining of the opening to the first integrated electronic component to produce a circuit board having at least one integrated electronic component. A multi-layer printed circuit board having at least one prefabricated, integrated electronic component.

摘要翻译： 一种具有集成电子部件的电路板的制造方法，其特征在于，具备：提供具有第一基板表面和第二基板表面的电路板基板，将集成电子部件固定到所述第一基板表面，以及将第一电介质层设置在所述第一基板 表面和第一个集成电子部件。 该方法还包括在第一电介质层上设置金属层以产生集成的电子部件组件，在集成电子部件组件中产生具有与金属层接触的金属衬里的至少一个通孔，并且将第二电介质层设置在 通孔和金属层上。 在第二电介质层和第一电介质层中形成至少一个金属衬里的开口以暴露集成电子元件的至少一部分，并将开口的金属衬里连接到第一集成电子元件以产生电路 具有至少一个集成电子部件的板。 具有至少一个预制的集成电子部件的多层印刷电路板。

公开(公告)号：US6163957A

公开(公告)日：2000-12-26

申请号：US192003

申请日：1998-11-13

申请人： Hunt Hang Jiang ,  Thomas Massingill ,  Mark Thomas McCormack ,  Michael Guang-Tzong Lee

发明人： Hunt Hang Jiang ,  Thomas Massingill ,  Mark Thomas McCormack ,  Michael Guang-Tzong Lee

IPC分类号： H01R12/04 ,  H01L21/48 ,  H01L23/538 ,  H05K1/14 ,  H05K3/00 ,  H05K3/12 ,  H05K3/28 ,  H05K3/36 ,  H05K3/40 ,  H05K3/46 ,  H01K3/10

CPC分类号： H05K3/4617 ,  H01L21/4857 ,  H01L23/5385 ,  H01L2924/0002 ,  H05K3/0035 ,  H05K3/1216 ,  H05K3/28 ,  H05K3/4069 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0394 ,  H05K2203/0191 ,  H05K2203/1453 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49165 ,  Y10T29/49167 ,  Y10T428/31678 ,  Y10T428/31681 ,  H01L2924/00

摘要： Multilayer circuit lamination methods and circuit layer structures are disclosed which enable one to manufacture high-density multichip module boards and the like at lower cost, with higher yield, with higher signal densities, and with fewer processing steps.

摘要翻译： 公开了多层电路层叠方法和电路层结构，其能够以更低的成本，更高的产量，更高的信号密度和更少的处理步骤来制造高密度多芯片模块板等。

公开(公告)号：US06326555B1

公开(公告)日：2001-12-04

申请号：US09259126

申请日：1999-02-26

申请人： Mark Thomas McCormack ,  Hunt Hang Jiang ,  Thomas J. Massingill ,  Solomon I. Beilin

发明人： Mark Thomas McCormack ,  Hunt Hang Jiang ,  Thomas J. Massingill ,  Solomon I. Beilin

IPC分类号： H05K103

CPC分类号： H05K3/462 ,  H05K3/3484 ,  H05K2201/09536 ,  H05K2203/0191 ,  H05K2203/043 ,  H05K2203/0568 ,  Y10T29/49128

摘要： Structures, methods and materials for making multilayer circuit substrates are disclosed. The structures include bumped structures or microencapsulated conductive particles suitable for use in a lamination process to make a multilayer printed circuit substrate.

摘要翻译： 公开了用于制造多层电路基板的结构，方法和材料。 这些结构包括适于用于层压工艺以制造多层印刷电路基板的凸起结构或微胶囊化导电颗粒。

公开(公告)号：US06271107B1

公开(公告)日：2001-08-07

申请号：US09282788

申请日：1999-03-31

申请人： Thomas Massingill ,  Mark Thomas McCormack ,  Hunt Hang Jiang

发明人： Thomas Massingill ,  Mark Thomas McCormack ,  Hunt Hang Jiang

IPC分类号： H01L2144

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L23/3171 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05169 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/29111 ,  H01L2224/73203 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H05K3/0032 ,  H05K3/3484 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2224/29099 ,  H01L2924/00014

摘要： Bumped semiconductor substrates and methods for forming bumped semiconductor substrates are disclosed. The bumped semiconductor substrates have a polymeric layer, which can serve as a passivation layer for chips derived from the semiconductor substrate.

摘要翻译： 公开了凸起的半导体衬底和用于形成凸起的半导体衬底的方法。 凸起的半导体衬底具有聚合物层，其可以用作来自半导体衬底的芯片的钝化层。

公开(公告)号：US06882045B2

公开(公告)日：2005-04-19

申请号：US09997589

申请日：2001-11-29

申请人： Thomas J. Massingill ,  Mark Thomas McCormack ,  Wen-Chou Vincent Wang

发明人： Thomas J. Massingill ,  Mark Thomas McCormack ,  Wen-Chou Vincent Wang

IPC分类号： H01L21/48 ,  H05K3/00 ,  H05K3/10 ,  H05K3/24 ,  H05K3/46 ,  H01L23/34

CPC分类号： H01L21/486 ,  H01L24/96 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16237 ,  H01L2224/16501 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K3/0035 ,  H05K3/108 ,  H05K3/243 ,  H05K3/4602 ,  H05K3/4647 ,  H05K2203/066 ,  H05K2203/0733 ,  H05K2203/1383 ,  H01L2924/01049 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599

摘要： A method for deplating defective capacitors comprising forming a plurality of capacitors on a semiconductor substrate, forming a plurality of metal contacts on the plurality of capacitors, and depositing a layer of photoresist on the semiconductor substrate. The photoresist layer is patterned so that the plurality of metal contacts are exposed, which are then contacted with an electrically conductive solution. The metal contacts, which are disposed over defective capacitors, are subsequently deplated. A method for forming a multi-chip module comprising forming a thin-film polymeric interconnect structure having a pair of sides, one of which is disposed on a silicon substrate having active or passive devices and the other of which has a computer chip mounted thereon. A multi-chip module formed by the method.

摘要翻译： 一种用于去除有缺陷的电容器的方法，包括在半导体衬底上形成多个电容器，在多个电容器上形成多个金属触点，并在半导体衬底上沉积一层光致抗蚀剂。 图案化光致抗蚀剂层，使得多个金属触点暴露，然后与导电溶液接触。 随后将金属触点设置在不良电容器上，随后被去掉。 一种用于形成多芯片模块的方法，包括形成具有一对侧面的薄膜聚合物互连结构，其中一个侧面设置在具有有源或无源器件的硅衬底上，并且另一个具有安装在其上的计算机芯片。 通过该方法形成的多芯片模块。