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    Multi-layer circuit substrates and electrical assemblies having conductive composition connectors
    4.
    发明授权
    Multi-layer circuit substrates and electrical assemblies having conductive composition connectors 有权
    具有导电组合物连接器的多层电路基板和电气组件

    公开(公告)号：US6054761A

    公开(公告)日：2000-04-25

    申请号：US203126

    申请日：1998-12-01

    申请人： Mark Thomas McCormack ,  Hunt Hang Jiang ,  Solomon I. Beilin ,  Albert Wong Chan ,  Yasuhito Takahashi

    发明人： Mark Thomas McCormack ,  Hunt Hang Jiang ,  Solomon I. Beilin ,  Albert Wong Chan ,  Yasuhito Takahashi

    IPC分类号： C08K3/00 ,  C08L63/00 ,  H01L23/498 ,  H05K3/40 ,  H05K3/46 ,  H01L23/04

    CPC分类号： H05K3/363 ,  H01L23/49883 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/462 ,  H01L2224/16503 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10666 ,  H05K2203/0425 ,  H05K2203/0455 ,  H05K3/321 ,  H05K3/4623

    摘要： Printed circuit substrates and electrical assemblies including a conductive composition are disclosed. The printed circuit substrate and the electrical assembly embodiments comprise a first conducting region and a second conducting region. A dielectric layer is disposed between the first and second conducting regions. An aperture is disposed in the dielectric layer and a via structure including the conductive composition is disposed in the aperture. The conductive composition is preferably in a cured state and electrically communicates with the first and second conducting regions. In preferred embodiments, the conductive composition comprises conductive particles in an amount of at least about 75 wt. % based on the weight of the composition. At least 50% by weight of the conductive particles have melting points of less than about 400.degree. C. The composition further includes a carrier including an epoxy-functional resin in an amount of at least about 50 wt. % based on the weight of the carrier, and a fluxing agent in an amount of at least about 0.1 wt % based on the weight of the carrier. The epoxy functional resin can have a viscosity of less than about 1000 centipoise at 25.degree. C.

    摘要翻译： 公开了印刷电路基板和包括导电组合物的电气组件。 印刷电路基板和电组件实施例包括第一导电区域和第二导电区域。 电介质层设置在第一和第二导电区域之间。 在电介质层中设置孔，并且包括导电组合物的通孔结构设置在孔中。 导电组合物优选处于固化状态并与第一和第二导电区域电连通。 在优选的实施方案中，导电组合物包含至少约75wt。 基于组合物的重量％。 至少50重量％的导电颗粒具有小于约400℃的熔点。该组合物还包括载体，其包含至少约50重量％的量的环氧官能树脂。 基于载体的重量，以及基于载体重量的至少约0.1重量％的助熔剂。 环氧官能树脂在25℃下的粘度可以小于约1000厘泊

    High density signal interposer with power and ground wrap
    10.
    发明授权
    High density signal interposer with power and ground wrap 有权
    高密度信号插入器，具有电源和地面包装

    公开(公告)号：US6081026A

    公开(公告)日：2000-06-27

    申请号：US191755

    申请日：1998-11-13

    申请人： Wen-chou Vincent Wang ,  Yasuhito Takahashi ,  William T. Chou ,  Michael G. Peters ,  Michael G. Lee ,  Solomon Beilin

    发明人： Wen-chou Vincent Wang ,  Yasuhito Takahashi ,  William T. Chou ,  Michael G. Peters ,  Michael G. Lee ,  Solomon Beilin

    IPC分类号： H01L23/498 ,  H01L23/50 ,  H01L23/538 ,  H01L23/552 ,  H05K1/02 ,  H05K1/14 ,  H05K3/20 ,  H01L23/12 ,  H01L23/053

    CPC分类号： H01L23/5383 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/552 ,  H05K1/0219 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/144 ,  H05K2201/049 ,  H05K2201/055 ,  H05K2201/10378 ,  H05K3/20

    摘要： An interposer for providing power, ground, and signal connections between an integrated circuit chip or chips and a substrate. The interposer includes a signal core and external power/ground connection wrap. The two sections may be fabricated and tested separately, then joined together using z-connection technology. The signal core is a dielectric film with patterned metal on both sides. The two metal layers are interconnected by a through via or post process. The power/ground wrap includes an upper substrate positioned above the signal core and a lower substrate positioned below the signal core. The upper and lower substrates of the power/ground wrap are formed from a dielectric film having a patterned metal layer on both sides connected by a through via or post process. The upper power/ground wrap substrate, signal core, and lower power/ground substrate are interconnected as desired using z-connection technology (e.g., solder or conductive ink). The power/ground layers on the upper substrate can be connected to the power/ground layers on the lower substrate by suitable edge connectors. With an integrated circuit chip or chips connected to the upper layer of the top substrate of the power/ground wrap and a printed circuit board or other mounting substrate connected to the bottom layer of the lower substrate of the wrap, the inventive interposer provides a set of high density and electrically isolated signal, power, and ground interconnections.

    摘要翻译： 一种用于在集成电路芯片或芯片与基板之间提供电源，接地和信号连接的插入器。 插入器包括信号芯和外部电源/接地连接外壳。 这两个部分可以单独制造和测试，然后使用z连接技术连接在一起。 信号芯是两侧具有图案化金属的电介质膜。 两个金属层通过通孔或后处理相互连接。 电源/接地包裹物包括位于信号芯上方的上基板和位于信号芯下方的下基板。 电源/接地套管的上基板和下基板由具有通过通孔或后工艺连接的两侧上的图案化金属层的电介质膜形成。 上电源/地基封装衬底，信号芯和下电源/接地衬底根据需要使用z连接技术（例如焊料或导电油墨）互连。 上基板上的电源/接地层可以通过合适的边缘连接器连接到下基板上的电源/接地层。 通过将集成电路芯片或芯片连接到电源/接地外壳的顶部基板的上层，以及连接到包装的下基板的底层的印刷电路板或其它安装基板，本发明的插入件提供一组 高密度和电隔离的信号，电源和接地互连。