公开(公告)号：US20080102561A1

公开(公告)日：2008-05-01

申请号：US11552987

申请日：2006-10-26

Applicant: YASUNORI GOTO ,  JIRO TAKEDA ,  TSUTOMU MASAKI

Inventor： YASUNORI GOTO ,  JIRO TAKEDA ,  TSUTOMU MASAKI

IPC: H01L21/00

CPC classification number: H05K3/3489 ,  H05K3/305 ,  H05K3/3421 ,  H05K3/3494 ,  H05K2201/10689 ,  H05K2201/10977 ,  H05K2203/0195 ,  H05K2203/086 ,  H05K2203/107 ,  Y02P70/613

Abstract: Methods of manufacturing printed circuit board assemblies include placing a semiconductor chip having a plurality of lead terminals on a board formed with a plurality of solder lands at its surface such that each of the plurality of lead terminals is in touch with a corresponding one of the solder lands; supplying a solder material on the plurality of lead terminal s and the plurality of solder lands; supplying a flux including mono salt of adipic acid and alkyl secondary amine; and locally heating the plurality of lead terminals such that the solder material and the flux are melted to join together the lead terminals and the solder lands.

Abstract translation: 制造印刷电路板组件的方法包括将具有多个引线端子的半导体芯片放置在其表面上形成有多个焊接区域的板上，使得多个引线端子中的每一个与相应的一个焊料接触 土地 在多个引线端子和多个焊接区域上提供焊料材料; 提供包含己二酸单烷基酯和烷基仲胺的助熔剂; 并且对多个引线端子进行局部加热，使得焊料材料和焊剂熔化，以将引线端子和焊盘接合在一起。

公开(公告)号：US20080093739A1

公开(公告)日：2008-04-24

申请号：US11873618

申请日：2007-10-17

Applicant: Junichi KIMURA ,  Hideki Niimi ,  Yuji Fuwa ,  Tsuyoshi Sakaue

Inventor： Junichi KIMURA ,  Hideki Niimi ,  Yuji Fuwa ,  Tsuyoshi Sakaue

IPC: H01L23/52 ,  H01L21/00

CPC classification number: H01L21/563 ,  H01L23/3135 ,  H01L23/3142 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/19105 ,  H05K1/023 ,  H05K3/305 ,  H05K2201/10522 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A semiconductor mounting substrate according to the present invention comprises: a substrate; a semiconductor device, mounted on this substrate; solder bumps, which connect the semiconductor device and the substrate; a first resin, filled in a space between the semiconductor device and the substrate; and electronic components, mounted on a face side of the semiconductor device where the semiconductor device is mounted, wherein bond strength reinforcing resin section is provided at least between a side face in the vicinity of a corner part of the semiconductor device and a substrate surface of the substrate in a position corresponding to the corner part.

Abstract translation: 根据本发明的半导体安装基板包括：基板; 安装在该基板上的半导体器件; 焊料凸块，其连接半导体器件和衬底; 填充在半导体器件和衬底之间的空间中的第一树脂; 以及安装在半导体装置的半导体装置的正面侧的电子部件，其中，接合强度增强树脂部至少设置在半导体装置的角部附近的侧面和 所述基板处于与所述角部对应的位置。

公开(公告)号：US07351649B2

公开(公告)日：2008-04-01

申请号：US11111069

申请日：2005-04-21

Applicant: Yuji Shinkai

Inventor： Yuji Shinkai

IPC: H01L21/44 ,  H01L23/52 ,  H01L23/48 ,  H01L29/40 ,  H01L23/485 ,  B41J2/14

CPC classification number: B41J2/14209 ,  B41J2/1609 ,  B41J2/1623 ,  B41J2002/14217 ,  B41J2002/14225 ,  B41J2002/14306 ,  B41J2002/14459 ,  B41J2002/14491 ,  B41J2202/20 ,  H01L2924/0002 ,  H05K3/321 ,  H05K3/361 ,  H05K3/363 ,  H05K2201/0367 ,  H05K2201/10977 ,  H05K2203/1189 ,  H01L2924/00

Abstract: A method of producing a recording head unit including: (A) a recording head including: a plurality of recording elements; and an actuator unit including a plurality of individual electrodes which respectively correspond to the recording elements; and (B) a printed wiring board which includes conductive leads respectively having terminal portions, which is electrically connected to the individual electrodes, and through which an operating signal for operating the recording elements is supplied to the individual electrodes, the method including: forming a plurality of conductive bumps on a surface of the actuator unit such that the bumps protrude from the surface of the actuator unit, so as to be electrically connected to the individual electrodes, respectively; coating a surface of the printed wiring board with an uncured synthetic resin to form an uncured synthetic-resin layer covering the conductive leads of the printed wiring board; bringing the bumps and the terminal portions of the conductive leads into contact with one another by pressing the bumps onto the uncured synthetic-resin layer such that the bumps penetrate the uncured synthetic-resin layer; and curing the uncured synthetic-resin layer.

Abstract translation: 一种制造记录头单元的方法，包括：（A）记录头，包括：多个记录元件; 以及致动器单元，其包括分别对应于所述记录元件的多个单独电极; 和（B）印刷布线板，其包括分别具有电连接到各个电极的端子部分的导电引线，并且用于操作记录元件的操作信号通过该导体引导到各个电极，该方法包括：形成 多个导电凸块在致动器单元的表面上，使得凸块从致动器单元的表面突出，以便分别电连接到各个电极; 用未固化的合成树脂涂布印刷线路板的表面以形成覆盖印刷线路板的导电引线的未固化的合成树脂层; 通过将凸块按压到未固化的合成树脂层上，使凸块穿过未固化的合成树脂层，使导电引线的凸块和端子部彼此接触; 并固化未固化的合成树脂层。

公开(公告)号：US20080076209A1

公开(公告)日：2008-03-27

申请号：US11850531

申请日：2007-09-05

Applicant: Gerhard KLINK ,  Christof LANDESBERGER ,  Michael FEIL

Inventor： Gerhard KLINK ,  Christof LANDESBERGER ,  Michael FEIL

IPC: H01L21/56

CPC classification number: H01L23/4985 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/2402 ,  H01L2224/76155 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/005 ,  H05K3/305 ,  H05K3/321 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y10T29/49117 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: The present invention provides a method for producing integrated circuits which are mechanically flexible and can be provided contiguously on a common flexible carrier substrate. The method includes a step of continuously providing a first flexible substrate which has conductor-line patterns, and a step of mounting the integrated circuits on the first flexible substrate and connecting the integrated circuits to the conductor-line patterns of the first flexible substrate, and a step of covering the circuits mounted on the first flexible substrate with a second flexible substrate, recesses being provided in the first or second flexible substrates in order to make the conductor-line patterns of the first flexible substrate accessible. The step of covering has the sub-step of continuously providing a flexible film with recesses and laminating same onto the flexible integrated circuits mounted on the first flexible substrate, or a sub-step of applying, by a printing technique, a cover on the flexible integrated circuits mounted on the first flexible substrate.

Abstract translation: 本发明提供了一种制造集成电路的方法，所述集成电路机械地是柔性的并且可以连续地设置在共同的柔性载体基板上。 该方法包括连续提供具有导线图案的第一柔性基板的步骤，以及将集成电路安装在第一柔性基板上并将集成电路连接到第一柔性基板的导线图案的步骤，以及 利用第二柔性基板覆盖安装在第一柔性基板上的电路的步骤，在第一柔性基板或第二柔性基板中设置凹槽，以使第一柔性基板的导体线图形可访问。 覆盖步骤具有连续地提供具有凹陷的柔性膜并将其层压到安装在第一柔性基板上的柔性集成电路上的子步骤，或者通过印刷技术将柔性涂覆在柔性基板上的盖子的子步骤 集成电路安装在第一柔性基板上。

公开(公告)号：US07331502B2

公开(公告)日：2008-02-19

申请号：US10472311

申请日：2001-03-19

Applicant: Ryoichi Okada ,  Hitoshi Aoki ,  Yoshitaka Okugawa ,  Kensuke Nakamura ,  Shinichiro Itoh

Inventor： Ryoichi Okada ,  Hitoshi Aoki ,  Yoshitaka Okugawa ,  Kensuke Nakamura ,  Shinichiro Itoh

IPC: B23K31/02

CPC classification number: H05K3/3436 ,  H01L21/486 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/49827 ,  H01L24/29 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/1147 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01059 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1579 ,  H05K3/20 ,  H05K3/305 ,  H05K3/3489 ,  H05K3/386 ,  H05K3/4617 ,  H05K2201/0195 ,  H05K2201/0394 ,  H05K2201/10977 ,  H05K2203/0475 ,  H05K2203/1189 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2224/05599

Abstract: In a process for producing an electronic part which comprises soldering (A) an electronic member having conductor portions I for electric connection having a solder layer or a solder bump (a solder portion) on a surface of a tip and (B) an electronic member to be connected having conductor portions II for electric connection arranged at positions corresponding to positions of conductor portions I by pressing (A) to (B) under heating via an adhesive layer, the solder portion is brought into contact with the adhesive layer, the solder portion is melted by heating at a temperature of or higher than a melting point of the solder, the soldering is conducted by pressing the melted solder portion, and the adhesive layer is cured. An electronic part is obtained in accordance with the process. Electric connection is surely achieved and a highly reliable electronic part can be obtained with excellent productivity.

Abstract translation: 在制造电子部件的方法中，包括将具有焊料层或焊料凸块（焊料部分）的电连接用导体部分I的电子部件（A）焊接到电极部件的表面上，（B）电子部件 通过粘合剂层在加热下通过按压（A）至（B）而将具有用于电连接的导体部分II布置在与导体部分I的位置相对应的位置处，焊料部分与粘合剂层接触，焊料 通过在焊料的熔点以上的温度加热来熔融部分，通过挤压熔化的焊料部分进行焊接，并且使粘合剂层固化。 根据该过程获得电子部件。 可靠地实现电连接，并且可以以优异的生产率获得高可靠性的电子部件。

公开(公告)号：US20080036083A1

公开(公告)日：2008-02-14

申请号：US11882662

申请日：2007-08-03

Applicant: Yuko Sawada ,  Shinji Baba ,  Takahiro Sugimura

Inventor： Yuko Sawada ,  Shinji Baba ,  Takahiro Sugimura

IPC: H01L23/48 ,  H01L21/00

CPC classification number: H01L23/3128 ,  H01L21/563 ,  H01L21/565 ,  H01L23/293 ,  H01L23/3735 ,  H01L23/53295 ,  H01L24/48 ,  H01L25/03 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/0558 ,  H01L2224/05655 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/13091 ,  H01L2924/15311 ,  H05K3/305 ,  H05K2201/068 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The semiconductor device which can prevent destruction of a low dielectric constant film and a bump's destruction which consists of lead free solder both is obtained.A semiconductor package which has a semiconductor chip including a low dielectric constant film and a bump which consists of lead free solder, a wiring substrate by which flip chip junction of the semiconductor package was done via the bump, and under-filling resin, with which a gap between the semiconductor package and the wiring substrate is filled up, are provided. As for under-filling resin, the glass transition temperature is equal to or more than 125° C., the coefficient of thermal expansion in 125° C. is less than 40 ppm/° C., and the elastic modulus in 25° C. is less than 9 GPa.

Abstract translation: 可以获得能够防止低介电常数膜的破坏的半导体器件和由无铅焊料构成的凸起的破坏。 一种半导体封装，其具有包括低介电常数膜和由无铅焊料构成的凸块的半导体芯片，通过凸块进行半导体封装的倒装芯片接合的布线基板和未充填树脂， 提供半导体封装和布线基板之间的间隙。 对于填充不足的树脂，玻璃化转变温度等于或大于125℃，125℃的热膨胀系数小于40ppm /℃，在25℃下的弹性模量 小于9GPa。

公开(公告)号：US20080023841A1

公开(公告)日：2008-01-31

申请号：US11830505

申请日：2007-07-30

Applicant: Mayumi Nakasato ,  Hideki Mizuhara ,  Takaya Kusabe ,  Sadamichi Takakusaki

Inventor： Mayumi Nakasato ,  Hideki Mizuhara ,  Takaya Kusabe ,  Sadamichi Takakusaki

IPC: H01L23/48 ,  H01R12/04 ,  H05K3/02

CPC classification number: H05K3/305 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49833 ,  H01L2224/16225 ,  H01L2224/16227 ,  H05K1/0262 ,  H05K1/056 ,  H05K1/141 ,  H05K1/183 ,  H05K3/107 ,  H05K3/4614 ,  H05K3/4694 ,  H05K3/4697 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/09972 ,  H05K2201/10378 ,  H05K2201/10545 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2203/0278 ,  H05K2203/1189 ,  Y02P70/613 ,  Y10T29/49155

Abstract: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and a first conductive layer (including conductive parts) formed on this insulating layer; and a second circuit substrate mounted on the first circuit substrate, being composed of a base, a second conductive layer (including conductive parts) formed on the bottom of the base, and a third conductive layer (including conductive parts) formed on the top of the base. Here, the first and second circuit substrates are bonded by pressure so that the first and second conductive parts are laminated and embedded together into the insulating layer. The first and second conductive parts form connecting areas in the insulating layer, thereby connecting the first and second circuit substrates electrically.

Abstract translation: 为了减少设置在芯基板上的电路基板与要安装在其上的电路之间的连接缺陷，从而提高作为多层器件安装基板的可靠性。 装置安装基板包括：由基板，形成在该基板上的绝缘层和形成在该绝缘层上的第一导电层（包括导电部分）构成的第一电路基板; 以及安装在第一电路基板上的第二电路基板，由基底，形成在基底的底部的第二导电层（包括导电部）和形成在基底的顶部的第三导电层 的基地。 这里，第一和第二电路基板通过压力接合，使得第一和第二导电部件层叠并嵌入到绝缘层中。 第一和第二导电部分形成绝缘层中的连接区域，从而电连接第一和第二电路基板。

公开(公告)号：US20070298630A1

公开(公告)日：2007-12-27

申请号：US11473247

申请日：2006-06-22

Applicant: Norio Yoshizawa ,  Hiroaki Watanabe

Inventor： Norio Yoshizawa ,  Hiroaki Watanabe

IPC: H01R12/00

CPC classification number: H01R13/2414 ,  H01R4/04 ,  H01R13/03 ,  H05K3/305 ,  H05K3/323 ,  H05K3/3442 ,  H05K3/368 ,  H05K3/381 ,  H05K3/403 ,  H05K2201/09045 ,  H05K2201/10378 ,  H05K2201/10977 ,  Y02P70/613

Abstract: A circuit pattern is formed on a printed circuit board, and a plating surface of a projecting stripe on a substrate is connected to the circuit pattern by soldering. Further, adhesive agent is filled in a gap between a coarsened surface of a non-circuit unit and the printed circuit board. When the adhesive agent is filled in the gap, the adhesive agent comes in an uneven portion of the coarsened non-circuit unit and is hardened in the recessed portion, so that a chemical bonding force of the adhesive agent itself and an anchoring effect act. For this reason, a fixing force and the bonding force increase.

Abstract translation: 电路图案形成在印刷电路板上，并且基板上的突出条纹的电镀表面通过焊接连接到电路图案。 此外，粘合剂填充在非电路单元的粗化表面和印刷电路板之间的间隙中。 当粘合剂填充在间隙中时，粘合剂进入粗化的非电路单元的不平坦部分并且在凹部中硬化，使得粘合剂本身的化学粘合力和锚固效应起作用。 因此，固定力和结合力增加。

公开(公告)号：US20070262433A1

公开(公告)日：2007-11-15

申请号：US11748135

申请日：2007-05-14

Applicant: Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

Inventor： Erich Syri ,  Gerold Gruendler ,  Juergen Hoegerl ,  Thomas Killer ,  Volker Strutz

IPC: H01L23/02 ,  H01L21/00

CPC classification number: H01L25/165 ,  H01L21/563 ,  H01L23/293 ,  H01L2224/73203 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/10045 ,  H05K2201/10977 ,  Y02P70/613

Abstract: A semiconductor component including: a substrate, at least one semiconductor chip arranged on the substrate and at least one passive device likewise arranged on the substrate. The passive device is mounted with its underside on the substrate. The semiconductor component further includes an interspace disposed between the underside of the passive device and the substrate. The interspace is filled with an underfilling material. In order to avoid the solder pumping effect, the upper side and the lateral sides of the passive device are also embedded in a plastic compound.

Abstract translation: 一种半导体部件，包括：衬底，布置在衬底上的至少一个半导体芯片和同样布置在衬底上的至少一个无源器件。 无源器件的底面安装在基板上。 半导体部件还包括设置在无源器件的下侧和衬底之间的间隙。 该间隙填充有底部填充材料。 为了避免焊料泵送效应，无源器件的上侧和侧面也嵌入塑料化合物中。

公开(公告)号：US07291548B2

公开(公告)日：2007-11-06

申请号：US11736280

申请日：2007-04-17

Applicant: Daewoong Suh ,  Saikumar Jayaraman ,  Stephen E. Lehman ,  Mitesh Patel ,  Tiffany A. Byrne ,  Edward L. Martin ,  Mohd Erwan B. Basiron ,  Wei Keat Loh ,  Sheau Hooi Lim ,  Yoong Tatt P. Chin

Inventor： Daewoong Suh ,  Saikumar Jayaraman ,  Stephen E. Lehman ,  Mitesh Patel ,  Tiffany A. Byrne ,  Edward L. Martin ,  Mohd Erwan B. Basiron ,  Wei Keat Loh ,  Sheau Hooi Lim ,  Yoong Tatt P. Chin

IPC: H01L21/44

CPC classification number: H05K3/3436 ,  H01L23/562 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K3/3463 ,  H05K2201/10977 ,  H05K2203/0126 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.

Abstract translation: 通过在基底下表面上分配聚合物以部分地嵌入设置在下表面上的低熔点焊料凸点的条件来形成应力消除层。 应力消除层流向低熔点焊料凸块。 应力补偿轴环形成在与基板相配合的基板上，并且应力补偿套环部分嵌入低熔点焊料凸块。 还包括展示应力消除层和应力补偿套环的物品。 还包括包括低熔点焊料，应力消除层和应力补偿环的计算系统。