公开(公告)号：US20170179067A1

公开(公告)日：2017-06-22

申请号：US14975532

申请日：2015-12-18

Applicant: Intel Corporation

Inventor： RUSSELL S. AOKI ,  MICHAEL R. HUI ,  JONATHON R. CARSTENS ,  MICHAEL S. BRAZEL ,  DANIEL P. CARTER ,  THOMAS A. BOYD ,  SHELBY A. FERGUSON ,  RASHELLE YEE ,  JOSEPH J. JASNIEWSKI ,  HARVEY R. KOFSTAD ,  ANTHONY P. VALPIANI

IPC: H01L23/00 ,  B23K3/08 ,  B23K1/00

CPC classification number: H01L24/75 ,  B23K1/0016 ,  B23K3/087 ,  B23K2101/42 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/75703 ,  H01L2224/75754 ,  H01L2224/81139 ,  H01L2224/81234 ,  H01L2924/15311 ,  H05K3/325 ,  H05K3/3436 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/166 ,  H05K2203/167 ,  Y02P70/613

Abstract: Embodiments of the present disclosure describe package alignment frames for a local reflow process to attach a semiconductor package to an interposer. The frame may comprise a two frame system. The interposer may be on a mounting table or on a circuit board. The frame may include a body with a rectangular opening dimensioned to receive a semiconductor package to be coupled to the interposer. The frame may be to align a ball grid array of the semiconductor package with pads of the interposer. A second frame may be to receive the first frame and may be to align a ball grid array of the interposer with pads of the circuit board. A single frame may be used to couple a semiconductor package to an interposer and to couple the interposer to a circuit board. Other embodiments may be described and/or claimed.

公开(公告)号：US20170079155A1

公开(公告)日：2017-03-16

申请号：US15363429

申请日：2016-11-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Guodong ZHANG ,  Jian ZHANG ,  Jianping SHU

IPC: H05K7/14 ,  H01R12/70 ,  H01R12/79 ,  H01R12/75 ,  H05K1/14

CPC classification number: H05K7/1439 ,  H01R12/7005 ,  H01R12/75 ,  H01R12/79 ,  H04Q1/15 ,  H05K1/141 ,  H05K1/18 ,  H05K7/1449 ,  H05K7/1451 ,  H05K7/1452 ,  H05K2201/044 ,  H05K2201/10318 ,  H05K2201/10356

Abstract: A backplane and a communications device are disclosed. The backplane includes: at least one fixing plate, multiple connectors, and multiple flexible cables, where signal connection is implemented between corresponding connectors by means of the flexible cables, each of the connectors is provided with a housing and multiple signal pins installed on the housing, and the housing is installed on the fixing plate and is provided with a jack for insertion of a connector of a subcard in the communications device; one end of each signal pin is inserted into the jack, and the other end is connected to each flexible cable. When the communications device provided with the backplane transmits a high-rate signal, transmission quality and a transmission rate are relatively high.

Abstract translation: 公开了背板和通信设备。 背板包括：至少一个固定板，多个连接器和多个柔性电缆，其中通过柔性电缆在相应的连接器之间实现信号连接，每个连接器设置有壳体和安装在壳体上的多个信号销 并且所述壳体安装在所述固定板上并且设置有用于将子卡的连接器插入所述通信装置中的插孔; 每个信号针的一端插入插孔，另一端连接到每根柔性线。 当设置有背板的通信设备发送高速率信号时，传输质量和传输速率相对较高。

公开(公告)号：US20160352215A1

公开(公告)日：2016-12-01

申请号：US15163093

申请日：2016-05-24

Applicant: Denso Corporation

Inventor： Taijirou MOMOSE

IPC: H02M1/36 ,  H05K5/02 ,  B60L11/18

CPC classification number: H05K5/0239 ,  B60L11/18 ,  H05K1/144 ,  H05K3/3447 ,  H05K3/368 ,  H05K7/1432 ,  H05K2201/042 ,  H05K2201/09127 ,  H05K2201/10318 ,  H05K2201/10833 ,  H05K2201/1084

Abstract: A power converter includes a case body provided with a device main body part having a power conversion part accommodated therein, a lid member covering an aperture of the case body, a first substrate fixed to the case body, a second substrate fixed to the lid member, the first substrate and the second substrate being fixed therein and a connection member electrically connecting the first substrate and the second substrate.

Abstract translation: 电力转换器包括壳体，该壳体设置有容纳有电力转换部分的装置主体部分，覆盖壳体的孔的盖构件，固定到壳体的第一基板，固定到盖构件的第二基板 第一基板和第二基板固定在其中，以及连接构件，电连接第一基板和第二基板。

公开(公告)号：US20160286642A1

公开(公告)日：2016-09-29

申请号：US15005589

申请日：2016-01-25

Applicant: Intel Corporation

Inventor： Tsung-Yu Chen ,  Rebecca Shia

IPC: H05K1/11 ,  H01L23/498 ,  H01L23/373 ,  H05K3/40

CPC classification number: H05K1/11 ,  H01L21/4853 ,  H01L21/4885 ,  H01L23/373 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01R13/04 ,  H05K3/103 ,  H05K3/3426 ,  H05K3/4015 ,  H05K5/0069 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2201/10787 ,  H05K2201/10795 ,  H05K2201/1081 ,  H05K2203/1178 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments pin connections, electronic devices, and methods are shown that include pin configurations to reduce voids and pin tilting and other concerns during pin attach operations, such as attachment to a chip package pin grid array. Pin head are shown that include features such as convex surfaces, a number of legs, and channels in pin head surfaces.

公开(公告)号：US20160270213A1

公开(公告)日：2016-09-15

申请号：US15041033

申请日：2016-02-11

Applicant: APPLE INC.

Inventor： Amir Salehi ,  Vu T. Vo ,  Wyeman Chen ,  Chang Liu ,  Dennis R. Pyper ,  Steven Patrick Cardinali ,  Lan Hoang ,  Siddharth Nangia ,  Meng Chi Lee ,  Takayoshi Katahira

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K3/284 ,  B33Y80/00 ,  H05K1/0224 ,  H05K2201/0141 ,  H05K2201/0715 ,  H05K2201/10242 ,  H05K2201/10318 ,  H05K2201/10969 ,  H05K2201/2036

Abstract: Readily manufactured structures for sealing or encapsulating devices in system-in-a-package modules, such that the modules are easily assembled, have a low-profile, and are space efficient. One example may provide readily manufactured covers for SIP modules. These modules may be easily assembled by attaching the cover to a top side of a substrate. These SIP modules may have a low-profile, for example when their height is reduced using one or more recesses in a bottom surface of a top of the recess, where the one or more recesses are arranged to accept one or more components. These SIP modules may be made space efficient by placing an edge of a cover near an edge of the substrate and connecting the plating of the cover using side plating on, or vias through, the substrate.

Abstract translation: 易于制造的结构，用于将封装或封装在系统级封装模块中，使得模块易于组装，具有薄型，并且具有空间效率。 一个示例可以提供用于SIP模块的容易制造的盖。 这些模块可以通过将盖附接到基板的顶侧来容易地组装。 这些SIP模块可以具有低轮廓，例如当使用凹部的顶部的底部表面中的一个或多个凹部来减小其高度时，其中一个或多个凹部布置成接受一个或多个部件。 这些SIP模块可以通过将盖的边缘放置在基板的边缘附近并且使用侧板或通孔穿过基板来连接盖的镀层来实现空间效率。

公开(公告)号：US20160219705A1

公开(公告)日：2016-07-28

申请号：US15005345

申请日：2016-01-25

Applicant: Infineon Technologies AG

Inventor： Reinhold Bayerer

IPC: H05K1/14 ,  H05K1/18

CPC classification number: H05K1/142 ,  H01L25/162 ,  H01L2924/0002 ,  H05K1/0262 ,  H05K1/144 ,  H05K1/145 ,  H05K1/181 ,  H05K2201/04 ,  H05K2201/10166 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/1059 ,  H01L2924/00

Abstract: A power semiconductor module arrangement includes a semiconductor module having a controllable power semiconductor component, a first printed circuit board (PCB) arranged outside the semiconductor module, and a control unit arranged outside the semiconductor module and having a second PCB. The control unit is configured to control the controllable power semiconductor component. The controllable power semiconductor component has a first load terminal and a second load terminal between which a load path of the power semiconductor component is formed, and also a control terminal for controlling the load path. The first PCB has a conductor track connected in series with the load path. The first and second PCBs are spaced apart from one another and electrically connected to one another by a pin.

Abstract translation: 功率半导体模块装置包括具有可控功率半导体部件的半导体模块，布置在半导体模块外部的第一印刷电路板（PCB），以及布置在半导体模块外部并具有第二PCB的控制单元。 控制单元被配置为控制可控功率半导体部件。 可控功率半导体部件具有形成功率半导体部件的负载路径的第一负载端子和第二负载端子，以及用于控制负载路径的控制端子。 第一个PCB具有与负载路径串联连接的导体轨道。 第一和第二PCB彼此间隔开并且通过销彼此电连接。

公开(公告)号：US09247642B2

公开(公告)日：2016-01-26

申请号：US13533681

申请日：2012-06-26

Applicant: Tsung-Yu Chen ,  Rebecca Shia

Inventor： Tsung-Yu Chen ,  Rebecca Shia

IPC: H01L23/488 ,  H05K1/11 ,  H01L23/48 ,  H05K3/10 ,  H01L23/498 ,  H05K3/40 ,  H05K3/34

CPC classification number: H05K1/11 ,  H01L21/4853 ,  H01L21/4885 ,  H01L23/373 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01R13/04 ,  H05K3/103 ,  H05K3/3426 ,  H05K3/4015 ,  H05K5/0069 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2201/10787 ,  H05K2201/10795 ,  H05K2201/1081 ,  H05K2203/1178 ,  H01L2924/014 ,  H01L2924/00

Abstract: Embodiments pin connections, electronic devices, and methods are shown that include pin configurations to reduce voids and pin tilting and other concerns during pin attach operations, such as attachment to a chip package pin grid array. Pin head are shown that include features such as convex surfaces, a number of legs, and channels in pin head surfaces.

Abstract translation: 示出了引脚连接，电子设备和方法的实施例，其包括引脚配置以减少引脚连接操作期间的空隙和引脚倾斜以及其它问题，诸如附接到芯片封装引脚网格阵列。 引脚头被显示为包括诸如凸表面，多个腿和销头表面中的通道的特征。

公开(公告)号：US09212801B2

公开(公告)日：2015-12-15

申请号：US13683838

申请日：2012-11-21

Applicant: Huizhou Light Engine Limited

Inventor： Tean Sue-Anne Leung ,  Eddie Ping Kuen Li

IPC: H01R33/00 ,  B60Q1/06 ,  F21V29/00 ,  F21S13/10 ,  F21V3/00 ,  F21V15/00 ,  F21V5/00 ,  F21K99/00 ,  F21V23/06 ,  F21V29/506 ,  F21V23/00 ,  F21Y101/02 ,  F21V29/87 ,  F21V29/89

CPC classification number: F21V29/506 ,  F21K9/23 ,  F21K9/238 ,  F21V23/006 ,  F21V23/06 ,  F21V29/87 ,  F21V29/89 ,  F21Y2115/10 ,  H05K1/0209 ,  H05K3/366 ,  H05K2201/066 ,  H05K2201/09027 ,  H05K2201/10106 ,  H05K2201/10189 ,  H05K2201/10318 ,  Y10T29/4913 ,  Y10T29/53174

Abstract: An LED lamp comprises: a lamp base having live and neutral contacts for supplying electrical power to the LED lamp; a substantially hollow lamp holder; a PCB assembly comprising: first and second connection pins; a table portion attached to the top of each of the first and second connection pins; and at least one connecting structure formed at a top surface of the table portion and electrically coupled to the first and second connection pins; an LED PCB comprising at least one LED affixed to a PCB and an LED PCB connector having connector pins electrically coupled to the at least one LED and to the at least one connecting structure of the table portion; and a heat sink being configured to thermally couple to the at least one LED, and a globe having a bottom portion which is thermally coupled to an outer surface of the heat sink.

Abstract translation: 一种LED灯包括：灯座，其具有用于向LED灯供电的带电和中性触点; 大致中空的灯座; PCB组件，包括：第一和第二连接销; 连接到所述第一和第二连接销中的每一个的顶部的台部分; 以及至少一个连接结构，其形成在所述台部的顶表面处并电耦合到所述第一和第二连接销; LED PCB，其包括固定到PCB的至少一个LED和具有电耦合到所述至少一个LED和所述台部的至少一个连接结构的连接器引脚的LED PCB连接器; 并且散热器被配置为热耦合到所述至少一个LED，以及具有底部的球体，所述底部热耦合到所述散热器的外表面。

公开(公告)号：US20150157862A1

公开(公告)日：2015-06-11

申请号：US14563778

申请日：2014-12-08

Applicant: Second Sight Medical Products, Inc.

Inventor： Robert J. Greenberg ,  Neil H. Talbot ,  James S. Little

IPC: A61N1/36 ,  A61N1/05 ,  A61N1/375 ,  A61N1/372

CPC classification number: H05K3/282 ,  A61B5/0006 ,  A61B5/0478 ,  A61B5/4836 ,  A61B5/6868 ,  A61B2562/0209 ,  A61B2562/046 ,  A61B2562/125 ,  A61N1/0529 ,  A61N1/0531 ,  A61N1/0534 ,  A61N1/3606 ,  A61N1/36071 ,  A61N1/36082 ,  A61N1/36139 ,  A61N1/375 ,  A61N1/3752 ,  A61N1/3754 ,  H01L23/055 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48465 ,  H05K1/02 ,  H05K1/0271 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/11 ,  H05K1/111 ,  H05K1/145 ,  H05K1/147 ,  H05K1/189 ,  H05K3/0044 ,  H05K3/005 ,  H05K3/0058 ,  H05K3/28 ,  H05K3/321 ,  H05K3/363 ,  H05K3/4015 ,  H05K3/4061 ,  H05K2201/0245 ,  H05K2201/053 ,  H05K2201/055 ,  H05K2201/09063 ,  H05K2201/09145 ,  H05K2201/09163 ,  H05K2201/097 ,  H05K2201/09981 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10674 ,  H05K2201/10795 ,  H05K2201/10931 ,  H05K2201/2009 ,  H05K2203/0195 ,  H05K2203/025 ,  H05K2203/0278 ,  H05K2203/0307 ,  H05K2203/068 ,  H05K2203/082 ,  H05K2203/1322 ,  H05K2203/1327 ,  H05K2203/1394 ,  H05K2203/1461 ,  H05K2203/1476 ,  H05K2203/162 ,  H05K2203/304 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention consists of an implantable device with at least one package that houses electronics that sends and receives data or signals, and optionally power, from an external system through at least one coil attached to at least one package and processes the data, including recordings of neural activity, and delivers electrical pulses to neural tissue through at least one array of multiple electrodes that are attached to the at least one package. The device is adapted to electrocorticographic (ECoG) and local field potential (LFP) signals. A brain stimulator, preferably a deep brain stimulator, stimulates the brain in response to neural recordings in a closed feedback loop. The device is advantageous in providing neuromodulation therapies for neurological disorders such as chronic pain, post traumatic stress disorder (PTSD), major depression, or similar disorders. The invention and components thereof are intended to be installed in the head, or on or in the cranium or on the dura, or on or in the brain.

Abstract translation: 本发明包括具有至少一个封装的可植入装置，该封装装置容纳通过连接到至少一个封装件的至少一个线圈从外部系统发送和接收数据或信号并可选地供电的电子装置，并处理数据，包括记录 的神经活动，并且通过连接到所述至少一个包装的多个电极的至少一个阵列将电脉冲递送给神经组织。 该器件适用于电皮质（ECoG）和局部场电位（LFP）信号。 大脑刺激器，优选深部脑刺激器，在闭合反馈环路中响应于神经记录而刺激大脑。 该装置有利于为神经障碍如慢性疼痛，创伤后应激障碍（PTSD），主要抑郁症或类似疾病提供神经调节疗法。 本发明及其组分旨在安装在头部，或者在头颅或硬脑膜上，或在脑中或脑中。

公开(公告)号：US20150092376A1

公开(公告)日：2015-04-02

申请号：US14499915

申请日：2014-09-29

Applicant: Infineon Technologies AG

Inventor： Andre Arens ,  Juergen Hoegerl ,  Magdalena Hoier

IPC: H05K1/11 ,  H05K1/18 ,  H01L21/56 ,  H01L25/18 ,  H01L25/00

CPC classification number: H05K1/111 ,  H01L21/56 ,  H01L23/3121 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/13055 ,  H01L2924/181 ,  H05K1/0256 ,  H05K1/144 ,  H05K1/181 ,  H05K3/28 ,  H05K3/284 ,  H05K7/1432 ,  H05K2201/0104 ,  H05K2201/042 ,  H05K2201/10303 ,  H05K2201/10318 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A printed circuit board (PCB) has a first, structured metalization arranged on its top side and at least one second metalization arranged below the first metalization in a vertical direction, parallel to the first metalization and insulated therefrom. Also on the PCB top side is a bare semiconductor chip having contact electrodes connected by bonding wires to corresponding contact pads of the first metalization on the PCB top side. A first portion of the contact electrodes and corresponding contact pads carry high voltage during operation. All high-voltage-carrying contact pads are conductively connected to the second metalization via plated-through holes. An insulation layer completely covers the chip and a delimited region of the PCB around the chip, and all high-voltage-carrying contact pads and the plated-through holes are completely covered by the insulation layer. A second portion of the contact electrodes and corresponding contact pads are under low voltages during operation.

Abstract translation: 印刷电路板（PCB）具有布置在其顶侧的第一结构化金属化和在垂直方向上布置在第一金属化下方的至少一个第二金属化，平行于第一金属化并与其绝缘。 在PCB顶侧也是裸露的半导体芯片，其具有通过接合线连接到PCB顶面上的第一金属化的相应接触焊盘的接触电极。 在操作期间，接触电极和对应的接触垫的第一部分承载高电压。 所有高电压接触焊盘通过电镀通孔导电连接到第二金属化。 绝缘层完全覆盖芯片周围的芯片和PCB的界定区域，并且所有高压承载接触焊盘和电镀通孔完全被绝缘层覆盖。 在操作期间，接触电极和对应的接触焊盘的第二部分处于低电压。