Abstract:
A method for producing an electronic circuit assembly (e.g., a circuit board) from an etched tri-metal-layer structure which provides air bridge crossovers and specially designed bumps etched from a middle layer of the tri-metal-layer structure. The bumps are formed at particular circuit locations in order to provide interconnects for (1) heavy wirebonding, (2) fine wirebonding, or (3) direct chip attachment; or, to provide (4) lifters for assuring a minimum solder joint standoff height or (5) barriers for retarding solder joint crack propagation.
Abstract:
The present invention provides a method for manufacturing a front electrode of a semiconductor device. The method includes using an electrically conductive paste composed of a glass-free corrosion binder, a metallic powder and an organic carrier. The corrosion binder is one or more Pb—Te based crystalline compounds having a fixed melting temperature in a range of 440° C. to 760° C. During a sintering process of the electrically conductive paste for forming an electrode, the glass-free corrosion binder is converted into a liquid for easily corroding and penetrating an antireflective insulating layer on a front side of the solar cell, so that a good ohmic contact is formed. At the same time, the electrically conductive metallic powder is wetted, and the combination of the metallic powder is promoted. As a result, a high-conductivity front electrode of a crystalline silicon solar cell is formed.
Abstract:
The present invention provides an electrically conductive paste for a front electrode of a solar cell and a preparation method thereof. The electrically conductive paste is composed of a glass-free corrosion binder, a metallic powder and an organic carrier. The corrosion binder is one or more Pb—Te based crystalline compounds having a fixed melting temperature in a range of 440° C. to 760° C. During a sintering process of the electrically conductive paste for forming an electrode, the glass-free corrosion binder is converted into a liquid for easily corroding and penetrating an antireflective insulating layer on a front side of the solar cell, so that a good ohmic contact is formed. At the same time, the electrically conductive metallic powder is wetted, and the combination of the metallic powder is promoted. As a result, a high-conductivity front electrode of a crystalline silicon solar cell is formed.
Abstract:
A nodular graphite, heat-resistant cast iron composition for use in engine systems. The composition contains carbon 1.5-2.4 weight %, silicon 5.4-7.0 weight %, manganese 0.5-1.5 weight %, nickel 22.0-28.0 weight %, chromium 1.5-3.0 weight %, molybdenum 0.1-1.0 weight %, magnesium 0.03-0.1 weight %, and a balance weight % being substantially iron. The composition has an austenitic matrix. Additionally, the composition exhibits excellent oxidation resistance at high temperature and excellent mechanical properties at both room and high temperatures. Thus, the composition can be a lower cost substitute material for Ni-Resist D5S under thermocycling conditions experienced by exhaust gas accessories and housings such as engine exhaust manifolds, turbocharger housings, and catalytic converter housings.
Abstract:
An electrical component includes a substrate, a first integrated circuit attached to the substrate, a metal portion coupled to the first integrated circuit, and a second integrated circuit attached to the first integrated circuit. The metal portion is sandwiched between the first integrated circuit and the second integrated circuit.
Abstract:
A method of manufacturing a plurality of semiconductor chip packages and the resulting chip package assemblies. The method includes providing a circuitized substrate having terminals and leads. A first microelectronic element is arranged with the substrate and contacts on the microelectronic element are connected to the substrate. A conductive member is placed on top of the first microelectronic element and is used to support a second microelectronic element. The second microelectronic element is arranged with the conductive member in a top and bottom position. The second microelectronic element is then also connected by leads from contacts on the second microelectronic element to pads and terminals on the circuitized substrate. The conductive member is then connected to a third pad or set of pads on the substrate. An encapsulant material may be deposited so as to encapsulate the leads and at least one surface of the microelectronic elements. The encapsulant material is then cured thereby defining a composite of chip assemblies which may be singulated into individual chip packages.
Abstract:
A method is disclosed for making a microelectronic package. A material is applied to a first major surface of a microelectronic element to reduce the heights of protrusions projecting from the first major surface. The microelectronic element is assembled to a microelectronic component. A method of forming protrusions and an assembly incorporating the microelectronic element having protrusions is also disclosed.
Abstract:
A method of manufacturing a plurality of semiconductor chip packages and the resulting chip package assemblies. The method includes providing a circuitized substrate having terminals and leads. A first microelectronic element is arranged with the substrate and contacts on the microelectronic element are connected to the substrate. A conductive member is placed on top of the first microelectronic element and is used to support a second microelectronic element. The second microelectronic element is arranged with the conductive member in a top and bottom position. The second microelectronic element is then also connected by leads from contacts on the second microelectronic element to pads and terminals on the circuitized substrate. The conductive member is then connected to a third pad or set of pads on the substrate. An encapsulant material may be deposited so as to encapsulate the leads and at least one surface of the microelectronic elements. The encapsulant material is then cured thereby defining a composite of chip assemblies which may be singulated into individual chip packages.
Abstract:
A method 10, 110 for making multi-layer circuit boards having metallized apertures 38, 40, 130, 132 which may be selectively and electrically grounded and having at least one formed air-bridge 92, 178.
Abstract:
A method 10 for making multi-layer electronic circuit boards 148, 248 having aperture 146, 246 which may be selectively connected to an electrical ground potential.