公开(公告)号：US09484259B2

公开(公告)日：2016-11-01

申请号：US13239080

申请日：2011-09-21

申请人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang

发明人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang

IPC分类号： H01L21/44 ,  H01L21/768 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48

CPC分类号： H01L21/76898 ,  H01L21/481 ,  H01L21/486 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02372 ,  H01L2224/03002 ,  H01L2224/0347 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05657 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/48091 ,  H01L2224/73104 ,  H01L2224/73265 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01007 ,  H01L2924/01023 ,  H01L2924/014 ,  H01L2924/00012

摘要： A semiconductor device has a semiconductor wafer with a plurality of contact pads. A first insulating layer is formed over the semiconductor wafer and contact pads. A portion of the first insulating layer is removed, exposing a first portion of the contact pads, while leaving a second portion of the contact pads covered. An under bump metallization layer and a plurality of bumps is formed over the contact pads and the first insulating layer. A second insulating layer is formed over the first insulating layer, a sidewall of the under bump metallization layer, sidewall of the bumps, and upper surface of the bumps. A portion of the second insulating layer covering the upper surface of the bumps is removed, but the second insulating layer is maintained over the sidewall of the bumps and the sidewall of the under bump metallization layer.

公开(公告)号：US09202713B2

公开(公告)日：2015-12-01

申请号：US13181412

申请日：2011-07-12

申请人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang ,  Xia Feng

发明人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang ,  Xia Feng

IPC分类号： H01L23/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L21/561 ,  H01L23/3114 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/02311 ,  H01L2224/02321 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05558 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a semiconductor die with an active surface. A first conductive layer is formed over the active surface. A first insulating layer is formed over the active surface. A second insulating layer is formed over the first insulating layer and first conductive layer. A portion of the second insulating layer is removed over the first conductive layer so that no portion of the second insulating layer overlies the first conductive layer. A second conductive layer is formed over the first conductive layer and first and second insulating layers. The second conductive layer extends over the first conductive layer up to the first insulating layer. Alternatively, the second conductive layer extends across the first conductive layer up to the first insulating layer on opposite sides of the first conductive layer. A third insulating layer is formed over the second conductive layer and first and second insulating layers.

摘要翻译： 半导体器件具有具有活性表面的半导体管芯。 在活性表面上形成第一导电层。 在活性表面上形成第一绝缘层。 在第一绝缘层和第一导电层上形成第二绝缘层。 第二绝缘层的一部分被去除在第一导电层上，使得第二绝缘层的任何部分都不覆盖第一导电层。 在第一导电层和第一绝缘层和第二绝缘层上形成第二导电层。 第二导电层在第一导电层上延伸直到第一绝缘层。 或者，第二导电层在第一导电层的相对侧上横跨第一导电层延伸到第一绝缘层。 在第二导电层和第一绝缘层和第二绝缘层上形成第三绝缘层。

公开(公告)号：US09184103B2

公开(公告)日：2015-11-10

申请号：US13048771

申请日：2011-03-15

申请人： Yaojian Lin ,  Haijing Cao ,  Kang Chen ,  Jianmin Fang

发明人： Yaojian Lin ,  Haijing Cao ,  Kang Chen ,  Jianmin Fang

IPC分类号： H01L23/31 ,  H01L23/24 ,  H01L23/528 ,  H01L23/552 ,  H01L23/66 ,  H01L25/10 ,  H01L25/16 ,  H01L25/00 ,  H01L23/00

CPC分类号： H01L23/3135 ,  H01L23/24 ,  H01L23/31 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/5283 ,  H01L23/552 ,  H01L23/66 ,  H01L24/24 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes a first conductive layer and conductive pillars disposed over the first conductive layer and directly contacting the first conductive layer. The semiconductor device includes an Integrated Passive Device (IPD) mounted to the first conductive layer such that the IPD is disposed between the conductive pillars. The IPD is self-aligned to the first conductive layer, and includes a metal-insulator-metal capacitor disposed over a first substrate and a wound conductive layer forming an inductor disposed over the first substrate. The semiconductor device includes a discrete capacitor mounted over the first conductive layer. The discrete capacitor is electrically connected to one of the conductive pillars. The semiconductor device includes an encapsulant disposed around the IPD, discrete capacitor, and conductive pillars, a first insulation layer disposed over the encapsulant and conductive pillars, and a second conductive layer disposed over the first insulating layer. The second conductive layer is electrically connected to the conductive pillars.

摘要翻译： 半导体器件包括第一导电层和设置在第一导电层之上并直接接触第一导电层的导电柱。 半导体器件包括安装到第一导电层的集成无源器件（IPD），使得IPD设置在导电柱之间。 IPD与第一导电层自对准，并且包括设置在第一基板上的金属 - 绝缘体 - 金属电容器和形成设置在第一基板上的电感器的缠绕导电层。 半导体器件包括安装在第一导电层上的分立电容器。 分立电容器电连接到导电柱之一。 半导体器件包括围绕IPD设置的密封剂，分立电容器和导电柱，设置在密封剂和导电柱上的第一绝缘层，以及设置在第一绝缘层上的第二导电层。 第二导电层电连接到导电柱。

公开(公告)号：US08592311B2

公开(公告)日：2013-11-26

申请号：US13615308

申请日：2012-09-13

申请人： Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

发明人： Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

IPC分类号： H01L21/44

CPC分类号： H01L25/16 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/11 ,  H01L24/12 ,  H01L25/0652 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2224/05599

摘要： A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A conductive material is deposited in the TSV in electrical contact with the analog circuit. An under bump metallization layer is formed on a backside of the substrate in electrical contact with the TSV. A solder material is deposited on the UBM layer. The solder material is reflowed to form a solder bump. A wire bond is formed on a top surface of the substrate. A redistribution layer is formed between the TSV and UBM. The analog circuit electrically connects through the TSV to the solder bump on the back side of the substrate.

摘要翻译： 半导体晶片包含其上形成有多个有源器件的衬底。 在基板上形成模拟电路。 模拟电路可以是电感，金属 - 绝缘体 - 金属电容或电阻。 电感由铜制成。 在衬底中形成贯穿衬底通孔（TSV）。 导电材料沉积在与模拟电路电接触的TSV中。 在与TSV电接触的衬底的背面上形成凸起下金属化层。 焊料材料沉积在UBM层上。 焊料材料被回流以形成焊料凸块。 在基板的顶表面上形成引线接合。 在TSV和UBM之间形成再分配层。 模拟电路通过TSV电连接到衬底背面的焊料凸块。

公开(公告)号：US08456002B2

公开(公告)日：2013-06-04

申请号：US13333739

申请日：2011-12-21

申请人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

IPC分类号： H01L23/52

CPC分类号： H01L23/3114 ,  H01L21/31 ,  H01L21/56 ,  H01L21/568 ,  H01L21/768 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/522 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/214

摘要： A semiconductor device has a semiconductor die and conductive layer formed over a surface of the semiconductor die. A first channel can be formed in the semiconductor die. An encapsulant is deposited over the semiconductor die. A second channel can be formed in the encapsulant. A first insulating layer is formed over the semiconductor die and first conductive layer and into the first channel. The first insulating layer extends into the second channel. The first insulating layer has characteristics of tensile strength greater than 150 MPa, elongation between 35-150%, and thickness of 2-30 micrometers. A second insulating layer can be formed over the semiconductor die prior to forming the first insulating layer. An interconnect structure is formed over the semiconductor die and encapsulant. The interconnect structure is electrically connected to the first conductive layer. The first insulating layer provides stress relief during formation of the interconnect structure.

公开(公告)号：US08409970B2

公开(公告)日：2013-04-02

申请号：US11949255

申请日：2007-12-03

申请人： Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

发明人： Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

IPC分类号： H01L21/301 ,  H01L21/46 ,  H01L21/20 ,  H01L21/30

CPC分类号： H01L23/5389 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/16 ,  H01L24/48 ,  H01L27/1266 ,  H01L28/00 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has integrated passive circuit elements. A first substrate is formed on a backside of the semiconductor device. The passive circuit element is formed over the insulating layer. The passive circuit element can be an inductor, capacitor, or resistor. A passivation layer is formed over the passive circuit element. A carrier is attached to the passivation layer. The first substrate is removed. A non-silicon substrate is formed over the insulating layer on the backside of the semiconductor device. The non-silicon substrate is made with glass, molding compound, epoxy, polymer, or polymer composite. An adhesive layer is formed between the non-silicon substrate and insulating layer. A via is formed between the insulating layer and first passivation layer. The carrier is removed. An under bump metallization is formed over the passivation layer in electrical contact with the passive circuit element. A solder bump is formed on the under bump metallization.

摘要翻译： 半导体器件集成无源电路元件。 第一衬底形成在半导体器件的背面。 无源电路元件形成在绝缘层上。 无源电路元件可以是电感器，电容器或电阻器。 钝化层形成在无源电路元件上。 载体附着在钝化层上。 去除第一衬底。 在半导体器件的背面上的绝缘层上形成非硅衬底。 非硅衬底由玻璃，模塑料，环氧树脂，聚合物或聚合物复合材料制成。 在非硅衬底和绝缘层之间形成粘合剂层。 在绝缘层和第一钝化层之间形成通孔。 载体被移除。 在与无源电路元件电接触的钝化层上方形成凸起下金属化。 在凸块下方形成焊锡凸块。

公开(公告)号：US08193604B2

公开(公告)日：2012-06-05

申请号：US12950591

申请日：2010-11-19

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L27/08

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes an IPD structure, a first semiconductor die mounted to the IPD structure with a flipchip interconnect, and a plurality of first conductive posts that are disposed adjacent to the first semiconductor die. The semiconductor device further includes a first molding compound that is disposed over the first conductive posts and first semiconductor die, a core structure bonded to the first conductive posts over the first semiconductor die, and a plurality of conductive TSVs disposed in the core structure. The semiconductor device further includes a plurality of second conductive posts that are disposed over the core structure, a second semiconductor die mounted over the core structure, and a second molding compound disposed over the second conductive posts and the second semiconductor die. The second semiconductor die is electrically connected to the core structure.

摘要翻译： 半导体器件包括IPD结构，安装到具有倒装芯片互连的IPD结构的第一半导体管芯和与第一半导体管芯相邻设置的多个第一导电柱。 半导体器件还包括设置在第一导电柱和第一半导体管芯之上的第一模塑料，与第一半导体管芯上的第一导电柱结合的芯结构以及设置在芯结构中的多个导电TSV。 半导体器件还包括设置在芯结构上的多个第二导电柱，安装在芯结构上的第二半导体管芯，以及设置在第二导电柱和第二半导体管芯上的第二模塑料。 第二半导体管芯与芯结构电连接。

公开(公告)号：US20120074534A1

公开(公告)日：2012-03-29

申请号：US12891232

申请日：2010-09-27

申请人： Yaojian Lin ,  Xia Feng ,  Kang Chen ,  Jianmin Fang

发明人： Yaojian Lin ,  Xia Feng ,  Kang Chen ,  Jianmin Fang

IPC分类号： H01L23/58 ,  H01L21/78

CPC分类号： H01L23/562 ,  H01L23/3114 ,  H01L23/3157 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/02311 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05571 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. A contact pad is formed over an active surface of the semiconductor die. A protective pattern is formed over the active surface of the semiconductor die between the contact pad and saw street of the semiconductor die. The protective pattern includes a segmented metal layer or plurality of parallel segmented metal layers. An insulating layer is formed over the active surface, contact pad, and protective pattern. A portion of the insulating layer is removed to expose the contact pad. The protective pattern reduces erosion of the insulating layer between the contact pad and saw street of the semiconductor die. The protective pattern can be angled at corners of the semiconductor die or follow a contour of the contact pad. The protective pattern can be formed at corners of the semiconductor die.

摘要翻译： 半导体晶片包含由锯条分隔开的多个半导体管芯。 在半导体管芯的有效表面上形成接触焊盘。 在半导体管芯的接触焊盘和锯条之间的半导体管芯的有源表面上形成保护图案。 保护图案包括分段金属层或多个平行的分段金属层。 在有源表面，接触焊盘和保护图案之上形成绝缘层。 去除绝缘层的一部分以露出接触垫。 保护图案减少了半导体管芯的接触焊盘和锯
路之间的绝缘层的侵蚀。 保护图案可以在半导体管芯的拐角处成角度，或者遵循接触焊盘的轮廓。 保护图案可以形成在半导体管芯的拐角处。

公开(公告)号：US08110477B2

公开(公告)日：2012-02-07

申请号：US12826368

申请日：2010-06-29

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L21/20 ,  H01L21/4763 ,  H01L29/00 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L27/016 ,  H01L21/6835 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/552 ,  H01L24/11 ,  H01L24/13 ,  H01L27/14618 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device is made by providing an integrated passive device (IPD). Through-silicon vias (TSVs) are formed in the IPD. A capacitor is formed over a surface of the IPD by depositing a first metal layer over the IPD, depositing a resistive layer over the first metal layer, depositing a dielectric layer over the first metal layer, and depositing a second metal layer over the resistive and dielectric layers. The first metal layer and the resistive layer are electrically connected to form a resistor and the first metal layer forms a first inductor. A wafer supporter is mounted over the IPD using an adhesive material and a third metal layer is deposited over the IPD. The third metal layer forms a second inductor that is electrically connected to the capacitor and the resistor by the TSVs of the IPD. An interconnect structure is connected to the IPD.

摘要翻译： 通过提供集成无源器件（IPD）制造半导体器件。 在IPD中形成了硅通孔（TSV）。 通过在IPD上沉积第一金属层，在第一金属层上沉积电阻层，在第一金属层上沉积电介质层，并在第一金属层上沉积第二金属层，并在第一金属层的上方沉积第二金属层， 电介质层。 第一金属层和电阻层电连接以形成电阻器，并且第一金属层形成第一电感器。 使用粘合剂材料将晶片支撑件安装在IPD上，并且第三金属层沉积在IPD上。 第三金属层形成第二电感器，其通过IPD的TSV电连接到电容器和电阻器。 互连结构连接到IPD。

公开(公告)号：US07858441B2

公开(公告)日：2010-12-28

申请号：US12329778

申请日：2008-12-08

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) structure is formed over the temporary carrier. The IPD structure includes an inductor, resistor, and capacitor. Conductive posts are mounted to the IPD structure, and first semiconductor die is mounted to the IPD structure. A wafer molding compound is deposited over the conductive posts and the first semiconductor die. A core structure is mounted to the conductive posts over the first semiconductor die. The core structure includes a semiconductor material. Conductive through silicon vias (TSVs) are formed in the core structure. A redistribution layer (RDL) is formed over the core structure. A second semiconductor die is mounted over the semiconductor device. The second semiconductor die is electrically connected to the core structure.

摘要翻译： 通过提供用于支撑半导体器件的临时载体来制造半导体器件。 在临时载体上形成集成无源器件（IPD）结构。 IPD结构包括电感，电阻和电容。 导电柱安装在IPD结构上，第一个半导体管芯安装在IPD结构上。 晶片模塑料沉积在导电柱和第一半导体管芯上。 芯结构安装在第一半导体管芯上的导电柱上。 芯结构包括半导体材料。 在核心结构中形成通过硅通孔（TSV）的导电。 在核心结构上形成再分配层（RDL）。 第二半导体管芯安装在半导体器件上。 第二半导体管芯与芯结构电连接。