公开(公告)号：US07248931B2

公开(公告)日：2007-07-24

申请号：US10892697

申请日：2004-07-15

申请人： Ivo Raaijmakers

发明人： Ivo Raaijmakers

IPC分类号： G05B19/18 ,  G03B27/42

CPC分类号： H01L21/681

摘要： A method and apparatus is provided for determining substrate drift from its nominal or intended position. The apparatus includes at least two fixed reference points. The reference points can be fixed with respect to the processing tool, or with respect to the end effector. As a robotic arm moves the end effector and substrate along a path, a camera captures images of the edge of the substrate and the reference points. Two or more cameras can also be provided. A computer can then calculate positional drift of the substrate, relative to its expected or centered position on the end effector, based upon these readings, and this drift can be corrected in subsequent robotic arm movement.

摘要翻译： 提供了一种用于从其标称位置或预期位置确定衬底漂移的方法和装置。 该装置包括至少两个固定参考点。 参考点可以相对于加工工具固定，或相对于末端执行器固定。 当机器人手臂沿着路径移动末端执行器和基板时，相机捕获基板边缘和参考点的图像。 还可以提供两个或更多的相机。 计算机然后可以基于这些读数来计算衬底相对于末端执行器上的预期或居中位置的位置偏移，并且可以在随后的机器人手臂运动中校正该漂移。

公开(公告)号：US20070096321A1

公开(公告)日：2007-05-03

申请号：US11511877

申请日：2006-08-28

申请人： Ivo Raaijmakers ,  Suvi Haukka ,  Ville Saanila ,  Pekka Soininen ,  Kai-Erik Elers ,  Ernst Granneman

发明人： Ivo Raaijmakers ,  Suvi Haukka ,  Ville Saanila ,  Pekka Soininen ,  Kai-Erik Elers ,  Ernst Granneman

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： C23C16/45525 ,  C23C16/0272 ,  C23C16/045 ,  C23C16/08 ,  C23C16/14 ,  C23C16/32 ,  C23C16/34 ,  C23C16/44 ,  C23C16/45534 ,  C23C16/45536 ,  C30B25/02 ,  C30B29/02 ,  C30B29/36 ,  H01L21/28562 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76873 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Trenches and contact vias are formed in insulating layers. The trenches and vias are exposed to alternating chemistries to form monolayers of a desired lining material. Exemplary process flows include alternately pulsed metal halide and ammonia gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with nitrogen. Near perfect step coverage allows minimal thickness for a diffusion barrier function, thereby maximizing the volume of a subsequent filling metal for any given trench and via dimensions.

摘要翻译： 提供了集成电路中双镶嵌结构的保形衬里的方法和结构。 沟槽和接触通孔形成在绝缘层中。 沟槽和通孔暴露于交替的化学物质以形成所需衬里材料的单层。 示例性工艺流程包括交替脉冲的金属卤化物和注入恒定载流子的氨气。 自身端接的金属层因此与氮气反应。 接近完美的台阶覆盖允许扩散阻挡功能的最小厚度，从而使任何给定沟槽和通孔尺寸的后续填充金属的体积最大化。

公开(公告)号：US07105055B2

公开(公告)日：2006-09-12

申请号：US10841369

申请日：2004-05-06

申请人： Armand Ferro ,  Ivo Raaijmakers ,  Derrick Foster

发明人： Armand Ferro ,  Ivo Raaijmakers ,  Derrick Foster

IPC分类号： C30B23/00

CPC分类号： C30B29/06 ,  C23C16/4405 ,  C23C16/481 ,  C30B25/02 ,  C30B25/105 ,  C30B25/14 ,  C30B33/005 ,  C30B33/02 ,  C30B33/12 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/28017 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/31662 ,  H01L29/66651

摘要： A single-wafer, chemical vapor deposition reactor is provided with hydrogen and silicon source gas suitable for epitaxial silicon deposition, as well as a safe mixture of oxygen in a non-reactive gas. Methods are provided for forming oxide and silicon layers within the same chamber. In particular, a sacrificial oxidation is performed, followed by a hydrogen bake to sublime the oxide and leave a clean substrate. Epitaxial deposition can follow in situ. A protective oxide can also be formed over the epitaxial layer within the same chamber, preventing contamination of the critical epitaxial layer. Alternatively, the oxide layer can serve as the gate dielectric, and a polysilicon gate layer can be formed in situ over the oxide.

公开(公告)号：US07034397B2

公开(公告)日：2006-04-25

申请号：US10696244

申请日：2003-10-28

申请人： Ivo Raaijmakers ,  Pekka J. Soininen ,  Kai-Erik Elers

发明人： Ivo Raaijmakers ,  Pekka J. Soininen ,  Kai-Erik Elers

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L21/76846 ,  C23C16/0272 ,  H01L21/28562 ,  H01L21/32051 ,  H01L21/76856 ,  H01L21/76879 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is proposed for improving the adhesion between a diffusion barrier film and a metal film. Both the diffusion barrier film and the metal film can be deposited in either sequence onto a semiconductor substrate. A substrate comprising a first film, which is one of a diffusion barrier film or a metal film, with the first film being exposed at least at part of the surface area of the substrate, is exposed to an oxygen-containing reactant to create a surface termination of about one monolayer of oxygen-containing groups or oxygen atoms on the exposed parts of the first film. Then the second film, which is the other one of a diffusion barrier film and a metal film, is deposited onto the substrate. Furthermore, an oxygen bridge structure is proposed, the structure comprising a diffusion barrier film and a metal film having an interface with the diffusion barrier film, wherein the interface comprises a monolayer of oxygen atoms.

摘要翻译： 提出了改善扩散阻挡膜和金属膜之间的粘合性的方法。 扩散阻挡膜和金属膜都可以以任一顺序沉积到半导体衬底上。 包含第一膜，其是扩散阻挡膜或金属膜之一，其中第一膜至少部分地暴露于基底的表面区域，以暴露于含氧反应物以形成表面 在第一膜的暴露部分上终止约一个单层的含氧基团或氧原子。 然后将作为扩散阻挡膜和金属膜中的另一个的第二膜沉积在基板上。 此外，提出了氧桥结构，其结构包括扩散阻挡膜和与扩散阻挡膜具有界面的金属膜，其中界面包括单层氧原子。

公开(公告)号：US20050250302A1

公开(公告)日：2005-11-10

申请号：US11179256

申请日：2005-07-12

申请人： Michael Todd ,  Ivo Raaijmakers

发明人： Michael Todd ,  Ivo Raaijmakers

IPC分类号： C23C16/24 ,  C23C16/02 ,  C23C16/42 ,  C30B25/02 ,  H01L21/20 ,  H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/316 ,  H01L21/331 ,  H01L21/337 ,  H01L21/425 ,  H01L21/469 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/51 ,  H01L29/737 ,  H01L29/78 ,  H01L31/18 ,  H01L31/20 ,  H01L21/66 ,  G01R31/26 ,  H01L21/00 ,  H01L21/44 ,  H01L21/84

CPC分类号： C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

摘要： Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

摘要翻译： 通过使用含硅前体的沉积方法制备薄的，平滑的含硅膜。 在优选的实施方案中，该方法产生连续的并且具有约150或更小的厚度，约5μm或更小的表面粗糙度和约20％或更小的厚度不均匀性的含Si膜。 当与其它元素掺杂或合金化时，优选的含硅膜显示出高度的组成均匀性。 优选的沉积方法提供了改进的制造效率，并且可以用于制备各种有用的结构，例如润湿层，HSG硅，量子点，电介质层，抗反射涂层（ARC），栅电极和扩散源。

公开(公告)号：US06962859B2

公开(公告)日：2005-11-08

申请号：US10074564

申请日：2002-02-11

申请人： Michael A. Todd ,  Ivo Raaijmakers

发明人： Michael A. Todd ,  Ivo Raaijmakers

IPC分类号： C23C16/24 ,  C23C16/02 ,  C23C16/42 ,  C30B25/02 ,  H01L21/20 ,  H01L21/205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/316 ,  H01L21/331 ,  H01L21/337 ,  H01L21/425 ,  H01L21/469 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/51 ,  H01L29/737 ,  H01L29/78 ,  H01L31/18 ,  H01L31/20

CPC分类号： C23C16/0272 ,  B82Y10/00 ,  B82Y30/00 ,  C23C16/22 ,  C23C16/24 ,  C23C16/30 ,  C23C16/308 ,  C23C16/325 ,  C23C16/345 ,  C23C16/36 ,  C23C16/56 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/28194 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/3185 ,  H01L21/32055 ,  H01L28/84 ,  H01L29/127 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66181 ,  H01L29/66242 ,  H01L31/1804 ,  H01L31/182 ,  H01L31/202 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S438/933

摘要： Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon-containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 Å or less, a surface roughness of about 5 Å rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

摘要翻译： 通过使用含硅前体的沉积方法制备薄且平滑的含硅膜。 在优选的实施方案中，该方法产生连续的并且具有约150或更小的厚度，约5μm或更小的表面粗糙度和约20％或更小的厚度不均匀性的含Si膜。 当与其它元素掺杂或合金化时，优选的含硅膜显示出高度的组成均匀性。 优选的沉积方法提供了改进的制造效率，并且可以用于制备各种有用的结构，例如润湿层，HSG硅，量子点，电介质层，抗反射涂层（ARC），栅电极和扩散源。

公开(公告)号：US20050229855A1

公开(公告)日：2005-10-20

申请号：US11143335

申请日：2005-06-01

申请人： Ivo Raaijmakers

发明人： Ivo Raaijmakers

IPC分类号： C23C16/44 ,  C23C16/54 ,  C23C16/56 ,  C30B25/10 ,  H01L21/00 ,  H01L21/205 ,  C23C16/00

CPC分类号： H01L21/67109 ,  C23C16/54 ,  C23C16/56 ,  C30B25/10

摘要： Methods and apparatuses are provided for cooling semiconductor substrates prior to handling. In one embodiment, a substrate and support structure combination is lifted after high temperature processing to a cold wall of a thermal processing chamber, which acts as a heat sink. Conductive heat transfer across a small gap from the substrate to the heat sink speeds wafer cooling prior to handling the wafer (e.g., with a robot). In another embodiment, a separate plate is kept cool within a pocket during processing, and is moved close to the substrate and support after processing. In yet another embodiment, a cooling station between a processing chamber and a storage cassette includes two movable cold plates, which are movable to positions closely spaced on either side of the wafer.

公开(公告)号：US20050205010A1

公开(公告)日：2005-09-22

申请号：US11124329

申请日：2005-05-06

申请人： Armand Ferro ,  Ivo Raaijmakers ,  Derrick Foster

发明人： Armand Ferro ,  Ivo Raaijmakers ,  Derrick Foster

IPC分类号： C23C16/00 ,  C23C16/44 ,  C23C16/48 ,  C30B25/02 ,  C30B25/14 ,  C30B29/06 ,  H01L21/205 ,  H01L21/28 ,  H01L21/311 ,  H01L21/316 ,  H01L21/336

CPC分类号： C30B29/06 ,  C23C16/4405 ,  C23C16/481 ,  C30B25/02 ,  C30B25/105 ,  C30B25/14 ,  C30B33/005 ,  C30B33/02 ,  C30B33/12 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02301 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/28017 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/31662 ,  H01L29/66651

摘要： A single-wafer, chemical vapor deposition reactor is provided with hydrogen and silicon source gas suitable for epitaxial silicon deposition, as well as a safe mixture of oxygen in a non-reactive gas. Methods are provided for forming oxide and silicon layers within the same chamber. In particular, a sacrificial oxidation is performed, followed by a hydrogen bake to sublime the oxide and leave a clean substrate. Epitaxial deposition can follow in situ. A protective oxide can also be formed over the epitaxial layer within the same chamber, preventing contamination of the critical epitaxial layer. Alternatively, the oxide layer can serve as the gate dielectric, and a polysilicon gate layer can be formed in situ over the oxide.

摘要翻译： 单晶片化学气相沉积反应器具有适用于外延硅沉积的氢和硅源气体，以及非反应性气体中的氧的安全混合物。 提供了在相同的室内形成氧化物层和硅层的方法。 特别地，进行牺牲氧化，然后进行氢气烘烤以使氧化物升华并留下清洁的基材。 外延沉积可以原位追踪。 也可以在同一室内的外延层上形成保护性氧化物，防止关键外延层的污染。 或者，氧化物层可以用作栅极电介质，并且可以在氧化物上原位形成多晶硅栅极层。

公开(公告)号：US06933225B2

公开(公告)日：2005-08-23

申请号：US10253859

申请日：2002-09-23

申请人： Christiaan J. Werkhoven ,  Ivo Raaijmakers ,  Suvi P. Haukka

发明人： Christiaan J. Werkhoven ,  Ivo Raaijmakers ,  Suvi P. Haukka

IPC分类号： C23C16/30 ,  C23C16/02 ,  C23C16/34 ,  C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  C23C16/48 ,  C30B25/14 ,  H01L21/28 ,  H01L21/285 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L29/51 ,  H01L21/4763

CPC分类号： H01L21/28185 ,  C23C16/029 ,  C23C16/34 ,  C23C16/401 ,  C23C16/403 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45529 ,  C23C16/45531 ,  C23C16/45534 ,  C30B25/14 ,  H01L21/0214 ,  H01L21/02178 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28562 ,  H01L21/3141 ,  H01L21/3145 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/31641 ,  H01L21/3185 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76879 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L2221/1089 ,  H01L2924/0002 ,  Y10T428/24942 ,  Y10T428/2495 ,  H01L2924/00

摘要： Thin films are formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g., in separate pulses, and the copper source pulses can gradually increase in frequency, forming a graded transition region, until pure copper is formed at the upper surface. Advantageously, graded compositions in these and a variety of other contexts help to avoid such problems as etch rate control, electromigration and non-ohmic electrical contact that can occur at sharp material interfaces.

摘要翻译： 通过原子层沉积形成薄膜，由此膜的组成可以在包括自限制化学的交替脉冲的循环期间从单层变化到单层。 在所示实施例中，在循环过程中引入了不同量的杂质源。 因此，即使对于非常薄的层也提供了梯度栅极电介质。 薄的2nm的栅极电介质可以从纯氧化硅到氧氮化物变化为氮化硅。 类似地，栅极电介质可以从氧化铝到氧化铝和较高介电材料（例如ZrO 2）的混合物变化为纯高k材料并返回到氧化铝。 在另一个实施例中，金属氮化物（例如，WN）首先形成为用于衬里双镶嵌沟槽和通孔的屏障。 在交替沉积过程中，铜可以被引入，例如分开的脉冲，并且铜源脉冲可以逐渐增加频率，形成渐变过渡区，直到在上表面形成纯铜。 有利的是，这些和各种其他情况下的分级组合物有助于避免诸如在尖锐材料界面处可能发生的蚀刻速率控制，电迁移和非欧姆电接触等问题。

公开(公告)号：US06759325B2

公开(公告)日：2004-07-06

申请号：US10303293

申请日：2002-11-22

申请人： Ivo Raaijmakers ,  Pekka T. Soininen ,  Ernst Granneman ,  Suvi Haukka ,  Kai-Erik Elers ,  Marko Tuominen ,  Hessel Sprey ,  Herbert Terhorst ,  Menso Hendriks

发明人： Ivo Raaijmakers ,  Pekka T. Soininen ,  Ernst Granneman ,  Suvi Haukka ,  Kai-Erik Elers ,  Marko Tuominen ,  Hessel Sprey ,  Herbert Terhorst ,  Menso Hendriks

IPC分类号： H01L214763

CPC分类号： H01L21/76843 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76831 ,  H01L21/76844 ,  H01L21/76864 ,  H01L21/76873 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： Method and structures are provided for conformal lining of dual damascene structures in integrated circuits, and particularly of openings formed in porous materials. Trenches and contact vias are formed in insulating layers. The pores on the sidewalls of the trenches and vias are blocked, and then the structure is exposed to alternating chemistries to form monolayers of a desired lining material. In exemplary process flows chemical or physical vapor deposition (CVD or PVD) of a sealing layer blocks the pores due to imperfect conformality. An alternating process can also be arranged by selection of pulse separation and/or pulse duration to achieve reduced conformality relative to a self-saturating, self-limiting atomic layer deposition (ALD) process. In still another arrangement, layers with anisotropic pore structures can be sealed by selectively melting upper surfaces. Blocking is followed by a self-limiting, self-saturating atomic layer deposition (ALD) reactions without significantly filling the pores.

摘要翻译： 提供了用于集成电路中的双镶嵌结构的保形衬里的方法和结构，特别是在多孔材料中形成的开口。 沟槽和接触通孔形成在绝缘层中。 沟槽和通孔的侧壁上的孔堵塞，然后将结构暴露于交替的化学物质以形成所需衬里材料的单层。 在示例性工艺流程中，密封层的化学或物理气相沉积（CVD或PVD）由于不完美的共形性而堵塞孔。 也可以通过选择脉冲分离和/或脉冲持续时间来布置交替过程，以相对于自饱和的自限制性原子层沉积（ALD）工艺实现降低的共形。 在另一种布置中，可以通过选择性地熔化上表面来密封具有各向异性孔结构的层。 之后是自限制的，自饱和的原子层沉积（ALD）反应而没有显着填充孔隙。