Temporary package, system, and method for testing semiconductor dice and chip scale packages
    82.
    发明授权
    Temporary package, system, and method for testing semiconductor dice and chip scale packages 失效
    用于测试半导体芯片和芯片级封装的临时封装,系统和方法

    公开(公告)号:US06188232B1

    公开(公告)日:2001-02-13

    申请号:US09106688

    申请日:1998-06-29

    IPC分类号: G01R3102

    CPC分类号: G01R1/0483 G01R1/0735

    摘要: An improved interconnect for semiconductor dice, a method for testing dice using the interconnect, and a method for fabricating the interconnect are provided. The interconnect includes dense arrays of contact members configured to establish temporary electrical communication with contact locations on a die under test. In addition, the interconnect includes patterns of multi level conductors formed on different levels of the substrate and separated by insulating layers. The multi level conductors can be formed with a higher density and with less cross talk than planar conductors to permit high speed testing of dice having a large number of bond pads. The interconnect can be configured for use with a temporary package for housing a single die for burn-in or other testing. Electrical paths between terminal contacts on the package and the multi level conductors on the interconnect can be formed by microbump tape having low resistance microbumps bonded to the multi level conductors.

    摘要翻译: 提供了用于半导体晶片的改进的互连,用于使用互连测试骰子的方法以及制造互连的方法。 互连包括致密的接触构件阵列,其被配置为与被测试的管芯上的接触位置建立临时电连通。 此外,互连包括形成在衬底的不同层面上并由绝缘层分隔的多层导体的图案。 多层导体可以形成为具有比平面导体更高的密度和更少的串扰,以允许具有大量接合焊盘的骰子的高速测试。 互连可以配置为与用于容纳单个管芯的临时封装一起用于老化或其他测试。 封装上的端子触点与互连上的多层导体之间的电路可由具有低电阻微胶片的微型胶带形成,该胶带与多层导体结合。

    System for testing semiconductor components
    83.
    发明授权
    System for testing semiconductor components 失效
    半导体元件测试系统

    公开(公告)号:US6072326A

    公开(公告)日:2000-06-06

    申请号:US916434

    申请日:1997-08-22

    IPC分类号: G01R1/04 G01R31/02

    摘要: A system and method for testing semiconductor components are provided. The system includes: a test board, sockets mounted to the test board in electrical communication with test circuitry, and carriers mounted to the sockets for housing the components. The carriers include bases, and interconnects mounted thereon, having contact members configured to make temporary electrical connections with contacts on the components. In addition, the contact members on the interconnects can be shaped to perform an alignment function, and to prevent excessive deformation of the contacts on the components. The sockets include camming members and electrical connectors configured to electrically contact the carriers with a zero insertion force. During a test procedure, the bases and interconnects can remain mounted to the sockets on the test board, as the components are aligned and placed in electrical contact with the interconnects. However, different bases and interconnects can be mounted to the sockets for testing different types of components.

    摘要翻译: 提供了一种用于测试半导体部件的系统和方法。 该系统包括:测试板,安装在与测试电路电气通信的测试板上的插座,以及安装到插座以用于容纳部件的载体。 载体包括底座和安装在其上的互连件,其具有被配置为与部件上的触点进行临时电连接的接触构件。 此外,互连上的接触构件可以成形为执行对准功能,并且防止部件上的触点的过度变形。 插座包括凸轮构件和被配置为以零插入力电接触托架的电连接器。 在测试过程中,基板和互连件可以保持安装到测试板上的插座上,因为组件对齐并放置成与互连件电接触。 然而,可以将不同的基座和互连件安装到插座以测试不同类型的部件。

    Image sensor packages and frame structure thereof
    87.
    发明授权
    Image sensor packages and frame structure thereof 有权
    图像传感器封装及其框架结构

    公开(公告)号:US07791184B2

    公开(公告)日:2010-09-07

    申请号:US11411265

    申请日:2006-04-26

    IPC分类号: H01L23/02

    摘要: A semiconductor package such as an image sensor package. A frame structure includes an array of frames, each having an aperture therethrough, into which an image sensor die in combination with a cover glass, filter, lens or other components may be installed in precise mutual alignment. Singulated image sensor dice and other components may be picked and placed into each frame of the frame structure. Alternatively, the frame structure may be configured to be aligned with and joined to a wafer bearing a plurality of image sensor dice, wherein optional, downwardly protruding skirts along peripheries of the frames may be received into kerfs cut along streets between die locations on the wafer, followed by installation of other package components. In either instance, the frame structure in combination with singulated image sensor dice or a joined wafer is singulated into individual image sensor packages. Various external connection approaches may be used.

    摘要翻译: 诸如图像传感器封装的半导体封装。 框架结构包括每个具有穿过其中的孔的框架阵列,图像传感器与盖玻片,过滤器,透镜或其它部件组合的模具可以精确地相互对准地安装在该框架中。 单片图像传感器骰子和其他组件可以被拾取并放置在框架结构的每个帧中。 或者,框架结构可以被配置为与承载多个图像传感器骰子的晶片对准并且连接到其上,其中沿着框架的周边的任选的向下突出的裙边可以被接收到沿着晶片上的模具位置之间沿着街道切割的切口 ,然后安装其他包装组件。 在任一情况下,将帧结构与单独的图像传感器芯片或连接的晶片组合成单独的图像传感器封装。 可以使用各种外部连接方法。