HETEROGENEOUS TECHNOLOGY INTEGRATION
    69.
    发明申请
    HETEROGENEOUS TECHNOLOGY INTEGRATION 审中-公开
    异构技术整合

    公开(公告)号:WO2011119932A1

    公开(公告)日:2011-09-29

    申请号:PCT/US2011/029955

    申请日:2011-03-25

    IPC分类号: H01L25/065

    摘要: A heterogeneous integrated circuit having at least one tier made of multiple technologies and a method of making the heterogeneous integrated circuit. The heterogeneous integrated circuit includes a package substrate, a first die of a first technology, and a second die of a second technology, where the two dies are located in the same tier. One die can surround the other die. The heterogeneous integrated circuit can also include a wire-bond and/or horizontal micro-bump coupling the two dies. The heterogeneous integrated circuit can also include a wire bond or vertical micro-bump coupling one of the dies to the package substrate. The vertical micro-bump coupling can include a through-via. The two technologies can be any of various technologies including CMOS, glass, sapphire and quartz. One die can also be adjacent to the other die on the same tier and the two dies coupled using a horizontal micro-bump.

    摘要翻译: 具有由多种技术制成的至少一层的异质集成电路以及制造异质集成电路的方法。 异质集成电路包括封装衬底,第一技术的第一裸片和第二技术的第二裸片,其中两个裸片位于同一层。 一个模具可以围绕另一个模具。 异质集成电路还可以包括耦合两个管芯的引线接合和/或水平微凸块。 异质集成电路还可以包括引线接合或将一个管芯耦合到封装衬底的垂直微突起。 垂直微凸块耦合可以包括通孔。 这两种技术可以是包括CMOS,玻璃,蓝宝石和石英在内的各种技术。 一个管芯也可以在同一层上与另一个管芯相邻,并且两个管芯使用水平微型焊盘进行耦合。