摘要:
Methods for forming stud bumps and apparatuses for forming stud bumps are disclosed. According to an embodiment, a method includes clamping a wire with a clamp. The clamp includes at least two opposing plates, and at least one of the opposing plates includes a protruding feature that intersects the wire when the wire is clamped forming a first notch in the wire. The method further includes bonding the wire to a bonding surface, releasing the wire from the clamp, passing the wire a notch pitch distance through the clamp, clamping the wire with the clamp forming a second notch in the wire, and breaking the wire leaving a bonded portion of the wire on the bonding surface. The second notch is the notch pitch distance from the first notch along the wire.
摘要:
A copper pillar bump has a sidewall protection layer formed of an electrolytic metal layer. The electrolytic metal layer is an electrolytic nickel layer, an electrolytic gold layer, and electrolytic copper layer, or an electrolytic silver layer.
摘要:
A system and method for forming photoresists over semiconductor substrates is provided. An embodiment comprises a photoresist with a concentration gradient. The concentration gradient may be formed by using a series of dry film photoresists, wherein each separate dry film photoresist has a different concentration. The separate dry film photoresists may be formed separately and then placed onto the semiconductor substrate before being patterned. Once patterned, openings through the photoresist may have a tapered sidewall, allowing for a better coverage of the seed layer and a more uniform process to form conductive materials through the photoresist.
摘要:
A method includes forming a passivation layer over a metal pad, which is overlying a semiconductor substrate. A first opening is formed in the passivation layer, with a portion of the metal pad exposed through the first opening. A seed layer is formed over the passivation layer and to electrically coupled to the metal pad. The seed layer further includes a portion over the passivation layer. A first mask is formed over the seed layer, wherein the first mask has a second opening directly over at least a portion of the metal pad. A PPI is formed over the seed layer and in the second opening. A second mask is formed over the first mask, with a third opening formed in the second mask. A portion of a metal bump is formed in the third opening. After the step of forming the portion of the metal bump, the first and the second masks are removed.
摘要:
A copper post is formed in a passivation layer to electrically connect an underlying bond pad region, and extends to protrude from the passivation layer. A protection layer is formed on a sidewall surface or a top surface of the copper post in a self-aligned manner. The protection layer is a manganese-containing oxide layer, a manganese-containing nitride layer or a manganese-containing oxynitride layer.
摘要:
A method for forming a semiconductor structure includes forming a sacrificial layer over a substrate. A first dielectric layer is formed over the sacrificial layer. A plurality of conductive structures are formed within the sacrificial layer and the first dielectric layer. The sacrificial layer is treated through the first dielectric layer, at least partially removing the sacrificial layer and forming at least one air gap between two of the conductive structures. A surface of the first dielectric layer is treated, forming a second dielectric layer over the first dielectric layer, after the formation of the air gap. A third dielectric layer is formed over the second dielectric layer. At least one opening is formed within the third dielectric layer such that the second dielectric layer substantially protects the first dielectric layer from damage by the step of forming the opening.
摘要:
System and method for reducing contact resistance and improving barrier properties is provided. An embodiment includes a dielectric layer and contacts extending through the dielectric layer to connect to conductive regions. A contact barrier layer is formed between the conductive regions and the contacts by electroless plating the conductive regions after openings have been formed through the dielectric layer for the contact. The contact barrier layer is then treated to fill the grain boundary of the contact barrier layer, thereby improving the contact resistance. In another embodiment, the contact barrier layer is formed on the conductive regions by electroless plating prior to the formation of the dielectric layer.
摘要:
A method for fabricating an integrated circuit device is disclosed. An exemplary method comprises performing a gate replacement process to form a gate structure, wherein the gate replacement process includes an annealing process; after the annealing process, removing portions of a dielectric material layer to form a contact opening, wherein a portion of the substrate is exposed; forming a silicide feature on the exposed portion of the substrate through the contact opening; and filling the contact opening to form a contact to the exposed portion of the substrate.
摘要:
An integrated circuit device is disclosed. An exemplary integrated circuit device includes a first copper layer, a second copper layer, and an interface between the first and second copper layers. The interface includes a flat zone interface region and an intergrowth interface region, wherein the flat zone interface region is less than or equal to 50% of the interface.
摘要:
A system and method for forming a semiconductor die contact structure is disclosed. An embodiment comprises a top level metal contact, such as copper, with a thickness large enough to act as a buffer for underlying low-k, extremely low-k, or ultra low-k dielectric layers. A contact pad or post-passivation interconnect may be formed over the top level metal contact, and a copper pillar or solder bump may be formed to be in electrical connection with the top level metal contact.