公开(公告)号：US20160336282A1

公开(公告)日：2016-11-17

申请号：US15222119

申请日：2016-07-28

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Duixian Liu ,  Jean-Olivier Plouchart ,  Alberto Valdes-Garcia

IPC: H01L23/66 ,  H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01P5/08

CPC classification number: H01P5/107 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0655 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2924/10253 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/19031 ,  H01L2924/19032 ,  H01L2924/19033 ,  H01L2924/19039 ,  H01P3/08 ,  H01P3/121 ,  H01P3/16 ,  H01P5/02 ,  H01P5/08 ,  H01P5/087 ,  H01Q1/38 ,  H01Q1/48 ,  H01Q1/50 ,  H05K1/0243 ,  H05K2201/037 ,  H05K2201/10522

Abstract: Embodiments include package structures having integrated waveguides to enable high data rate communication between package components. For example, a package structure includes a package substrate having an integrated waveguide, and first and second integrated circuit chips mounted to the package substrate. The first integrated circuit chip is coupled to the integrated waveguide using a first transmission line to waveguide transition, and the second integrated circuit chip is coupled to the integrated waveguide using a second transmission line to waveguide transition. The first and second integrated circuit chips are configured to communicate by transmitting signals using the integrated waveguide within the package carrier.

公开(公告)号：US20160329233A1

公开(公告)日：2016-11-10

申请号：US15215658

申请日：2016-07-21

Applicant: International Business Machines Corporation

Inventor： Paul S. Andry ,  Russell A. Budd ,  Bing Dang ,  Li-Wen Hung ,  John U. Knickerbocker ,  Cornelia Kang-I Tsang

IPC: H01L21/683 ,  B32B43/00

CPC classification number: H01L21/6835 ,  B23K26/57 ,  B32B43/006 ,  B32B2457/14 ,  H01L21/67092 ,  H01L21/78 ,  H01L23/544 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2224/94 ,  H01L2924/10253 ,  H01L2924/14 ,  Y10S156/93 ,  Y10S156/941 ,  Y10T156/1158 ,  Y10T156/1917

Abstract: A bonded structure contains a substrate containing at least one feature, the substrate having a top surface; a first release layer overlying the top surface of the substrate, the first release layer being absorptive of light having a first wavelength for being decomposed by the light; an adhesive layer overlying the first release layer, and a second release layer overlying the adhesive layer. The second release layer is absorptive of light having a second wavelength for being decomposed by the light having the second wavelength. The bonded structure further contains a handle substrate that overlies the second release layer, where the handle substrate is substantially transparent to the light having the first wavelength and the second wavelength. Also disclosed is a debonding method to process the bonded structure to remove and reclaim the adhesive layer for re-use. In another embodiment a multi-step method optically cuts and debonds a bonded structure.

公开(公告)号：US09433101B2

公开(公告)日：2016-08-30

申请号：US14515567

申请日：2014-10-16

Applicant: International Business Machines Corporation

Inventor： Steven A. Cordes ,  Bing Dang ,  Sung K. Kang ,  Yu Luo ,  Peter J. Sorce

IPC: B05D5/12 ,  H05K3/00 ,  C23C18/16 ,  C25D5/02 ,  C25D7/00

CPC classification number: H05K3/0094 ,  C23C18/1603 ,  C23C18/1646 ,  C23C18/1653 ,  C23C18/1689 ,  C25D5/02 ,  C25D7/00 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/5384 ,  H05K3/388 ,  H05K3/424 ,  H05K2203/072 ,  H05K2203/0723 ,  H05K2203/308

Abstract: A method for filling vias with metal includes receiving a substrate having vias, forming a metal plating layer over the vias on a first side of the substrate, fill-plating the vias with a first metal beginning with the metal plating layer on the first side of the substrate and advancing to a second side of the substrate to provide filled vias. The metal plating layer may be subsequently patterned to provide selected circuit connections or chemically-mechanically polished to completely remove the metal plating layer. Forming a metal plating layer over the vias may include filling the vias with a sacrificial filler to enable formation of the metal plating layer and subsequently removing the sacrificial filler via an etching operation or the like. In other embodiments, forming the metal plating layer over the vias is accomplished by bonding a metallic layer onto the first side of the substrate.

Abstract translation: 用金属填充过孔的方法包括接收具有通孔的基板，在基板的第一侧上的通孔的上方形成金属镀层，用第一金属填充第一金属，第一金属从第一侧的金属镀层开始 衬底并且前进到衬底的第二侧以提供填充的通孔。 金属镀层可以随后被图案化以提供选择的电路连接或化学机械抛光以完全去除金属镀层。 在过孔上形成金属镀层可以包括用牺牲填料填充通孔，以使得能够形成金属镀层，并随后通过蚀刻操作等去除牺牲填料。 在其他实施例中，在通孔之上形成金属镀层通过将金属层粘合到基板的第一侧上来实现。

公开(公告)号：US09391040B2

公开(公告)日：2016-07-12

申请号：US14516963

申请日：2014-10-17

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  John U. Knickerbocker ,  Yang Liu ,  Yu Luo ,  Steven L. Wright

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L21/683 ,  H01L21/66

CPC classification number: H01L25/0657 ,  H01L21/563 ,  H01L21/6835 ,  H01L22/14 ,  H01L22/20 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3157 ,  H01L23/3178 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49894 ,  H01L23/50 ,  H01L24/11 ,  H01L24/17 ,  H01L24/81 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/11334 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/17104 ,  H01L2224/1712 ,  H01L2224/1751 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06565

Abstract: A structure includes an electrical interconnection between a first substrate including a plurality of protrusions and a second substrate including a plurality of solder bumps, the plurality of protrusions includes sharp tips that penetrate the plurality of solder bumps, and a permanent electrical interconnection is established by physical contact between the plurality of protrusions and the plurality of solder bumps including a metallurgical joint.

Abstract translation: 一种结构包括在包括多个突起的第一基板和包括多个焊料凸块的第二基板之间的电互连，所述多个突起包括穿透多个焊料凸块的尖锐尖端，并且通过物理建立永久电互连 所述多个突起与所述多个焊料凸块之间的接触包括冶金接头。

公开(公告)号：US20160113119A1

公开(公告)日：2016-04-21

申请号：US14515567

申请日：2014-10-16

Applicant: International Business Machines Corporation

Inventor： Steven A. Cordes ,  Bing Dang ,  Sung K. Kang ,  Yu Luo ,  Peter J. Sorce

IPC: H05K3/00 ,  C25D5/02 ,  C25D7/00 ,  C23C18/16

CPC classification number: H05K3/0094 ,  C23C18/1603 ,  C23C18/1646 ,  C23C18/1653 ,  C23C18/1689 ,  C25D5/02 ,  C25D7/00 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/5384 ,  H05K3/388 ,  H05K3/424 ,  H05K2203/072 ,  H05K2203/0723 ,  H05K2203/308

Abstract: A method for filling vias with metal includes receiving a substrate having vias, forming a metal plating layer over the vias on a first side of the substrate, fill-plating the vias with a first metal beginning with the metal plating layer on the first side of the substrate and advancing to a second side of the substrate to provide filled vias. The metal plating layer may be subsequently patterned to provide selected circuit connections or chemically-mechanically polished to completely remove the metal plating layer. Forming a metal plating layer over the vias may include filling the vias with a sacrificial filler to enable formation of the metal plating layer and subsequently removing the sacrificial filler via an etching operation or the like. In other embodiments, forming the metal plating layer over the vias is accomplished by bonding a metallic layer onto the first side of the substrate.

Abstract translation: 用金属填充过孔的方法包括接收具有通孔的基板，在基板的第一侧上的通孔的上方形成金属镀层，用第一金属填充第一金属，第一金属从第一侧的金属镀层开始 衬底并且前进到衬底的第二侧以提供填充的通孔。 金属镀层可以随后被图案化以提供选择的电路连接或化学机械抛光以完全去除金属镀层。 在过孔上形成金属镀层可以包括用牺牲填料填充通孔，以使得能够形成金属镀层，并随后通过蚀刻操作等去除牺牲填料。 在其他实施例中，在通孔之上形成金属镀层通过将金属层粘合到基板的第一侧上来实现。

公开(公告)号：US20150340765A1

公开(公告)日：2015-11-26

申请号：US14281951

申请日：2014-05-20

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Duixian Liu ,  Jean-Olivier Plouchart ,  Peter Jerome Sorce ,  Cornelia Kang-I Tsang

IPC: H01Q9/04 ,  H01Q21/00

CPC classification number: H01Q21/065 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2924/15192 ,  H01Q1/2208 ,  H01Q1/2283 ,  H01Q1/48 ,  H01Q21/0075

Abstract: Package structures are provided for integrally packaging antennas with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter-wave and terahertz frequency ranges. For example, a package structure includes an RFIC chip, and an antenna package bonded to the RFIC chip. The antenna package includes a glass substrate, at least one planar antenna element formed on a first surface of the glass substrate, a ground plane formed on a second surface of the glass substrate, opposite the first surface, and an antenna feed line formed through the glass substrate and connected to the at least one planar antenna element. The antenna package is bonded to a surface of the RFIC chip using a layer of adhesive material.

Abstract translation: 提供封装结构，用于将天线与半导体RFIC（射频集成电路）芯片整体封装，以形成在毫米波和太赫兹频率范围内工作的紧凑型集成无线电/无线通信系统。 例如，封装结构包括RFIC芯片和结合到RFIC芯片的天线封装。 天线封装包括玻璃基板，形成在玻璃基板的第一表面上的至少一个平面天线元件，形成在玻璃基板的与第一表面相对的第二表面上的接地平面和通过 玻璃基板并连接到所述至少一个平面天线元件。 使用一层粘合剂材料将天线封装结合到RFIC芯片的表面。

公开(公告)号：US20150318210A1

公开(公告)日：2015-11-05

申请号：US14265672

申请日：2014-04-30

Applicant: International Business Machines Corporation

Inventor： RUSSELL A. BUDD ,  Bing Dang ,  John U. Knickerbocker

IPC: H01L21/78 ,  B23K26/36 ,  H01L21/67 ,  H01L21/304 ,  H01L21/268 ,  H01L21/306

CPC classification number: B23K26/364 ,  B23K26/0624 ,  B23K26/0626 ,  B23K26/18 ,  B23K26/38 ,  B23K26/402 ,  B23K2101/40 ,  B23K2103/50 ,  B23K2103/56 ,  H01L21/304 ,  H01L21/306 ,  H01L21/67115 ,  H01L21/78

Abstract: A method includes cutting a semiconductor wafer on a substrate wafer using at least one laser. By setting the laser to a set of parameters that define a laser beam, the laser beam can avoid ablation of the substrate wafer. The laser beam is also set equal to, or within, an ablation threshold of the semiconductor wafer for selectively ablating the semiconductor wafer. The set of parameters includes wavelength, pulse width and pulse frequency.

Abstract translation: 一种方法包括使用至少一个激光切割衬底晶片上的半导体晶片。 通过将激光器设置为限定激光束的一组参数，激光束可以避免衬底晶片的烧蚀。 激光束也被设置为等于或在半导体晶片的消融阈值内，以选择性地烧蚀半导体晶片。 该组参数包括波长，脉冲宽度和脉冲频率。

公开(公告)号：US20150287960A1

公开(公告)日：2015-10-08

申请号：US14340253

申请日：2014-07-24

Applicant: International Business Machines Corporation

Inventor： Paul S. Andry ,  Joana Sofia Branquinho Teresa Maria ,  Bing Dang ,  Michael A. Gaynes ,  John U. Knickerbocker ,  Eric P. Lewandowski ,  Cornelia K. Tsang ,  Bucknell C. Webb

IPC: H01M2/02 ,  A61B5/145 ,  A61F9/00 ,  G02C7/08

CPC classification number: H01M2/0202 ,  A61B5/145 ,  A61B2562/028 ,  C25D1/04 ,  C25D1/22 ,  C25D3/22 ,  C25D3/54 ,  C25D3/56 ,  C25D3/565 ,  C25D5/02 ,  C25D5/10 ,  C25D5/50 ,  G02C7/083 ,  H01M4/139 ,  H01M4/38 ,  H01M4/42 ,  H01M4/48 ,  H01M4/50 ,  H01M4/661 ,  H01M4/664 ,  H01M10/0436 ,  H01M2002/0205 ,  H01M2004/027 ,  H01M2004/028 ,  Y10T29/49108 ,  Y10T29/49115

Abstract: A system comprising a first dielectric element and a second dielectric element each having a first surface, wherein the first surface of the first dielectric element and the first surface of the second dielectric element are joined. The system further comprises one or more enclosed voids within the joined first and second dielectric elements. The system further comprises a flexible battery in a first enclosed void of the one or more enclosed voids, the flexible battery having a thickness of less than about 150 microns.

Abstract translation: 一种包括第一介电元件和第二介电元件的系统，每个第一介质元件和第二介质元件均具有第一表面，其中第一介电元件的第一表面和第二介电元件的第一表面被接合。 该系统还包括在所接合的第一和第二介电元件内的一个或多个封闭的空隙。 该系统还包括在一个或多个封闭空隙的第一封闭空间中的柔性电池，柔性电池具有小于约150微米的厚度。

公开(公告)号：US09070586B1

公开(公告)日：2015-06-30

申请号：US14187237

申请日：2014-02-22

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  John Knickerbocker ,  Yang Liu ,  Maurice Mason ,  Lubomyr T Romankiw

IPC: H01L21/00 ,  H01L23/00

CPC classification number: G01R1/0735 ,  B23K35/00 ,  B81B3/00 ,  B81B2201/02 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81C1/00626 ,  G01R31/2607 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13663 ,  H01L2224/73207 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01104

Abstract: A method of forming surface protrusions on an article, and the article with the protrusions attached. The article may be an Integrated Circuit (IC) chip, a test probe for the IC chip or any suitable substrate or nanostructure. The surface protrusions are electroplated to a template or mold wafer, transferred to the article and easily separated from the template wafer. Thus, the attached protrusions may be, e.g., micro-bumps or micro pillars on an IC chip or substrate, test probes on a probe head, or one or more cantilevered membranes in a micro-machine or micro-sensor or other micro-electro-mechanical systems (MEMS) formed without undercutting the MEMS structure.

Abstract translation: 在物品上形成表面突起的方法，以及附着有突起物的物品。 该物品可以是集成电路（IC）芯片，用于IC芯片的测试探针或任何合适的衬底或纳米结构。 表面突起电镀到模板或模具晶片上，转移到制品上，并容易地与模板晶片分离。 因此，附着的突起可以是例如IC芯片或衬底上的微凸起或微柱，探针头上的测试探针或微机或微传感器中的一个或多个悬臂膜或其它微电子 机械系统（MEMS）形成，而不会削弱MEMS结构。

公开(公告)号：US20140145884A1

公开(公告)日：2014-05-29

申请号：US13686377

申请日：2012-11-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bing Dang ,  Duixian Liu ,  Loïc Marnat ,  Atif Shamim ,  Cornelia K.-I. Tsang

IPC: H01Q1/38

CPC classification number: H01Q1/38 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13025 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01Q1/2283 ,  H01Q1/36 ,  H01Q9/0407 ,  H01L2924/00014 ,  H01L2224/48227 ,  H01L2924/00012

Abstract: A radio frequency integrated circuit (RFIC) chip package is provided having an RFIC chip and an integrated antenna structure. The integrated antenna structure includes an on-chip antenna having one or more radiator elements formed as part of a back-end-of-line structure of the RFIC chip. The antenna structure further includes a superstrate structure disposed on the back-end-of-line structure of the RFIC chip. The superstrate structure includes at least one substrate layer and a focusing metal element. The focusing metal element has a structure that is complementary to the on-chip radiator elements and which is configured to focus electromagnetic radiation to and from the planar antenna structure. The superstrate structure improves the performance (e.g., antenna gain and bandwidth) of the on-chip antennas for millimeter-wave applications.

Abstract translation: 提供了具有RFIC芯片和集成天线结构的射频集成电路（RFIC）芯片封装。 集成天线结构包括具有形成为RFIC芯片的后端行结构的一部分的一个或多个散热器元件的片上天线。 天线结构还包括设置在RFIC芯片的后端行结构上的覆盖结构。 上覆结构包括至少一个基底层和聚焦金属元件。 聚焦金属元件具有与片上辐射器元件互补的结构，并且被配置为将电磁辐射聚焦到平面天线结构和从平面天线结构聚焦。 上覆结构提高了用于毫米波应用的片上天线的性能（例如，天线增益和带宽）。