公开(公告)号：US20180076278A1

公开(公告)日：2018-03-15

申请号：US15804847

申请日：2017-11-06

Applicant: INVENSAS CORPORATION

Inventor： Liang WANG ,  Hong SHEN ,  Rajesh KATKAR

IPC: H01L49/02 ,  H01L21/56 ,  H01L25/00 ,  H01L23/498 ,  H01L23/00 ,  H01L23/522 ,  H01L25/16 ,  H01L25/11 ,  H01L25/10

CPC classification number: H01L28/60 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5223 ,  H01L24/05 ,  H01L24/32 ,  H01L24/83 ,  H01L25/105 ,  H01L25/11 ,  H01L25/115 ,  H01L25/165 ,  H01L25/50 ,  H01L28/40 ,  H01L28/65 ,  H01L2224/05009 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/1205 ,  H01L2924/15311 ,  H01L2924/16153 ,  H01L2924/00

Abstract: A method for making an integrated circuit package includes providing a handle wafer having a first region defining a cavity. A capacitor is formed in the first region. The capacitor has a pair of electrodes, each coupled to one of a pair of conductive pads, at least one of which is disposed on a lower surface of the handle wafer. An interposer having an upper surface with a conductive pad and at least one semiconductor die disposed thereon is also provided. The die has an integrated circuit that is electroconductively coupled to a redistribution layer (RDL) of the interposer. The lower surface of the handle wafer is bonded to the upper surface of the interposer such that the die is disposed below or within the cavity and the electroconductive pad of the handle wafer is bonded to the electroconductive pad of the interposer in a metal-to-metal bond.

公开(公告)号：US20170125331A1

公开(公告)日：2017-05-04

申请号：US15403679

申请日：2017-01-11

Applicant: Invensas Corporation

Inventor： Hong SHEN ,  Liang WANG ,  Gabriel Z. GUEVARA ,  Rajesh KATKAR ,  Cyprian Emeka UZOH ,  Laura Wills MIRKARIMI

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/00 ,  H01L21/48 ,  H01L25/065

CPC classification number: H01L23/49822 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/85399

Abstract: An interposer (110) has contact pads at the top and/or bottom surfaces for connection to circuit modules (e.g. ICs 112). The interposer includes a substrate made of multiple layers (110.i). Each layer can be a substrate (110S), possibly a ceramic substrate, with circuitry. The substrates extend vertically. Multiple interposers are fabricated in a single structure (310) made of vertical layers (310.i) corresponding to the interposers' layers. The structure is diced along horizontal planes (314) to provide the interposers. An interposer's vertical conductive lines (similar to through-substrate vias) can be formed on the substrates' surfaces before dicing and before all the substrates are attached to each other. Thus, there is no need to make through-substrate holes for the vertical conductive lines. Non-vertical features can also be formed on the substrates' surfaces before the substrates are attached to each other. Other embodiments are also provided.

公开(公告)号：US20160322456A1

公开(公告)日：2016-11-03

申请号：US15207837

申请日：2016-07-12

Applicant: Invensas Corporation

Inventor： Liang WANG ,  Rajesh KATKAR ,  Hong SHEN ,  Cyprian Emeka UZOH

IPC: H01L49/02

CPC classification number: H01L28/65 ,  H01L28/90 ,  H01L28/92 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15153 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00012

Abstract: In one embodiment, a method for making a 3D Metal-Insulator-Metal (MIM) capacitor includes providing a substrate having a surface, forming an array of upstanding rods or ridges on the surface, depositing a first layer of an electroconductor on the surface and the array of rods or ridges, coating the first electroconductive layer with a layer of a dielectric, and depositing a second layer of an electroconductor on the dielectric layer. In some embodiments, the array of rods or ridges can be made of a photoresist material, and in others, can comprise bonded wires.

公开(公告)号：US20160192496A1

公开(公告)日：2016-06-30

申请号：US14942781

申请日：2015-11-16

Applicant: Invensas Corporation

Inventor： Liang WANG ,  Rajesh KATKAR ,  Hong SHEN ,  Cyprian Emeka UZOH

IPC: H05K1/18 ,  H05K3/34 ,  H05K3/40 ,  H05K1/11

CPC classification number: H05K3/4007 ,  H01L24/81 ,  H01L2224/81193 ,  H01L2924/3841 ,  H05K1/111 ,  H05K3/3431

Abstract: A contact pad includes a solder-wettable porous network (310) which wicks the molten solder (130) and thus restricts the lateral spread of the solder, thus preventing solder bridging between adjacent contact pads.

Abstract translation: 接触焊盘包括可钎焊熔融焊料（130）的焊料可润湿多孔网（310），从而限制焊料的横向扩展，从而防止相邻接触焊盘之间的焊料桥接。

公开(公告)号：US20150325543A1

公开(公告)日：2015-11-12

申请号：US14275514

申请日：2014-05-12

Applicant: Invensas Corporation

Inventor： Rajesh KATKAR ,  Cyprian Emeka UZOH

IPC: H01L23/00 ,  B23K26/32 ,  H05K1/14 ,  H05K3/34 ,  H05K1/11

CPC classification number: H01L24/14 ,  B23K1/0016 ,  B23K3/0623 ,  B23K35/0244 ,  B23K35/0266 ,  B23K2101/40 ,  H01L21/02225 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0391 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/051 ,  H01L2224/05567 ,  H01L2224/056 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1405 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/81825 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/115 ,  H05K1/144 ,  H05K3/341 ,  H05K2201/09572 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2224/81 ,  H01L2224/83

Abstract: In some embodiments, to increase the height-to-pitch ratio of a solder connection that connects different structures with one or more solder balls, only a portion of a solder ball's surface is melted when the connection is formed on one structure and/or when the connection is being attached to another structure. In some embodiments, non-solder balls are joined by an intermediate solder ball (140i). A solder connection may be surrounded by a solder locking layer (1210) and may be recessed in a hole (1230) in that layer. Other features are also provided.

Abstract translation: 在一些实施例中，为了增加将不同结构与一个或多个焊球连接的焊料连接的高度与间距比，当连接形成在一个结构上时和/或当 连接正在附加到另一个结构。 在一些实施例中，非焊球通过中间焊球（140i）连接。 焊料连接可以被焊料锁定层（1210）包围，并且可以凹陷在该层中的孔（1230）中。 还提供其他功能。

公开(公告)号：US20150255429A1

公开(公告)日：2015-09-10

申请号：US14201585

申请日：2014-03-07

Applicant: Invensas Corporation

Inventor： Rajesh KATKAR ,  Sitaram ARKALGUD ,  Cyprian Emeka UZOH

IPC: H01L25/065 ,  H01L23/522 ,  H01L23/367 ,  H01L25/00 ,  H01L23/48 ,  H01L21/306 ,  H01L21/308 ,  H01L21/311 ,  H01L23/538 ,  H01L21/768

CPC classification number: H01L25/0657 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/31105 ,  H01L21/76897 ,  H01L21/76898 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/42 ,  H01L23/481 ,  H01L23/5386 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00

Abstract: An apparatus relates generally to a three-dimensional stacked integrated circuit. In such an apparatus, the three-dimensional stacked integrated circuit has at least a first die and a second die interconnected to one another using die-to-die interconnects. A substrate of the first die has at least one thermal via structure extending from a lower surface of the substrate toward a well of the substrate without extending to the well and without extending through the substrate. A first end of the at least one thermal via structure is at least sufficiently proximate to the well of the substrate for conduction of heat away therefrom. The substrate has at least one through substrate via structure extending from the lower surface of the substrate to an upper surface of the substrate. A second end of the at least one thermal via structure is coupled to at least one through die via structure of the second die for thermal conductivity.

Abstract translation: 装置一般涉及三维堆叠集成电路。 在这种装置中，三维堆叠集成电路具有至少第一管芯和第二管芯，使用管芯到管芯互连彼此互连。 第一管芯的衬底具有至少一个热通孔结构，其从衬底的下表面朝向衬底的阱延伸，而不延伸到阱并且不延伸通过衬底。 所述至少一个热通孔结构的第一端至少足够靠近所述衬底的阱，用于将热量传导出来。 衬底具有从衬底的下表面延伸到衬底的上表面的至少一个穿过衬底通孔结构。 所述至少一个热通孔结构的第二端与所述第二管芯的至少一个通孔通孔结构耦合以进行导热。

公开(公告)号：US20170084539A1

公开(公告)日：2017-03-23

申请号：US15364534

申请日：2016-11-30

Applicant: Invensas Corporation

Inventor： Guilian GAO ,  Cyprian Emeka UZOH ,  Charles G. WOYCHIK ,  Hong SHEN ,  Arkalgud R. SITARAM ,  Liang WANG ,  Akash AGRAWAL ,  Rajesh KATKAR

IPC: H01L23/538 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/5385 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2224/0401 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/08225 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48105 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/49097 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Die (110) and/or undiced wafers and/or multichip modules (MCMs) are attached on top of an interposer (120) or some other structure (e.g. another integrated circuit) and are covered by an encapsulant (160). Then the interposer is thinned from below. Before encapsulation, a layer (410) more rigid than the encapsulant is formed on the interposer around the die to reduce or eliminate interposer dishing between the die when the interposer is thinned by a mechanical process (e.g. CMP). Other features are also provided.

公开(公告)号：US20170018510A1

公开(公告)日：2017-01-19

申请号：US15280175

申请日：2016-09-29

Applicant: Invensas Corporation

Inventor： Hong SHEN ,  Liang WANG ,  Rajesh KATKAR ,  Charles G. WOYCHIK ,  Guilian GAO

IPC: H01L23/00 ,  H01L23/053 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L21/48

CPC classification number: H01L23/562 ,  H01L21/481 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L23/053 ,  H01L23/145 ,  H01L23/147 ,  H01L23/15 ,  H01L23/295 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3675 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/16153 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/16315 ,  H01L2924/1632 ,  H01L2924/167 ,  H01L2924/16787 ,  H01L2924/16788 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/01029 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Die (110) are attached to an interposer (420), and the interposer/die assembly is placed into a lid cavity (510). The lid (210) is attached to the top of the assembly, possibly to the encapsulant (474) at the top. The lid's legs (520) surround the cavity and extend down below the top surface of the interposer's substrate (420S), possibly to the level of the bottom surface of the substrate or lower. The legs (520) may or may not be attached to the interposer/die assembly. In fabrication, the interposer wafer (420SW) has trenches (478) which receive the lid's legs during the lid placement. The interposer wafer is later thinned to remove the interposer wafer portion below the legs and to dice the interposer wafer. The thinning process also exposes, on the bottom, conductive vias (450) passing through the interposer substrate. Other features are also provided.

Abstract translation: 模具（110）附接到插入件（420），并且插入器/模具组件被放置在盖腔（510）中。 盖（210）附接到组件的顶部，可能附接到顶部的密封剂（474）。 盖的腿（520）围绕空腔并且向下延伸到插入器的衬底（420S）的顶表面下方，可能地到衬底的底表面的高度或更低。 腿（520）可以或可以不附接到插入件/模具组件。 在制造中，插入器晶片（420SW）具有在盖放置期间接收盖的腿的沟槽（478）。 中间层晶片稍后变薄以去除腿下方的插入片晶片部分并且切割插入片晶片。 薄化工艺还在底部暴露穿过内插衬底的导电通孔（450）。 还提供其他功能。

公开(公告)号：US20160336286A1

公开(公告)日：2016-11-17

申请号：US15221370

申请日：2016-07-27

Applicant: Invensas Corporation

Inventor： Rajesh KATKAR ,  Cyprian Emeka UZOH

IPC: H01L23/00 ,  H05K3/34 ,  H05K1/14 ,  H01L25/10 ,  H01L25/00

CPC classification number: H01L24/14 ,  B23K1/0016 ,  B23K3/0623 ,  B23K35/0244 ,  B23K35/0266 ,  B23K2101/40 ,  H01L21/02225 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0391 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/051 ,  H01L2224/05567 ,  H01L2224/056 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1405 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/81825 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/115 ,  H05K1/144 ,  H05K3/341 ,  H05K2201/09572 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2224/81 ,  H01L2224/83

Abstract: In some embodiments, to increase the height-to-pitch ratio of a solder connection that connects different structures with one or more solder balls, only a portion of a solder ball's surface is melted when the connection is formed on one structure and/or when the connection is being attached to another structure. In some embodiments, non-solder balls are joined by an intermediate solder ball (140i). A solder connection may be surrounded by a solder locking layer (1210) and may be recessed in a hole (1230) in that layer. Other features are also provided.

公开(公告)号：US20160079138A1

公开(公告)日：2016-03-17

申请号：US14852855

申请日：2015-09-14

Applicant: Invensas Corporation

Inventor： Cyprian UZOH ,  Rajesh KATKAR

IPC: H01L23/31 ,  H01L21/3213 ,  H01L21/822 ,  H01L23/29 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L24/97 ,  H01L21/32133 ,  H01L21/486 ,  H01L21/561 ,  H01L21/822 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/072 ,  H01L25/115 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/32013 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81007 ,  H01L2224/83007 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/07025 ,  H01L2924/15192 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Integrated circuits (ICs 110) are attached to a wafer (120W). A stabilization layer (404) is formed over the wafer to strengthen the structure for further processing. Unlike a conventional mold compound, the stabilization layer is separated from at least some wafer areas around the ICs by one or more gap regions (450) to reduce the thermo-mechanical stress on the wafer and hence the wafer warpage. Alternatively or in addition, the stabilization layer can be a porous material having a low horizontal elastic modulus to reduce the wafer warpage, but having a high flexural modulus to reduce warpage and otherwise strengthen the structure for further processing. Other features and advantages are also provided.

Abstract translation: 集成电路（IC 110）附接到晶片（120W）。 在晶片上形成稳定层（404），以加强用于进一步处理的结构。 与传统的模制化合物不同，通过一个或多个间隙区域（450）将稳定层与IC周围的至少一些晶片区域分离，以减少晶片上的热机械应力，从而降低晶片翘曲。 或者或另外，稳定层可以是具有低水平弹性模量的多孔材料，以减少晶片翘曲，但是具有高挠曲模量以减少翘曲，否则加强用于进一步加工的结构。 还提供了其他特点和优点。