公开(公告)号：US20050186690A1

公开(公告)日：2005-08-25

申请号：US10786807

申请日：2004-02-25

申请人： Hui-Mei Chen ,  Chien-Kang Chou ,  Jin-Yuan Lee ,  Hsien-Tsung Liu

发明人： Hui-Mei Chen ,  Chien-Kang Chou ,  Jin-Yuan Lee ,  Hsien-Tsung Liu

IPC分类号： G01R3/00 ,  H01L21/66

CPC分类号： G01R3/00

摘要： A method for improving the accuracy of electrical test results of semiconductor wafers is described. The method introduces a non-contacting physical cleaning process prior to testing. The cleaning process removes micro-contamination on circuit contact pads that has been introduced during semiconductor wafer processing. This results in more accurate electrical probing of the semiconductor wafers.

摘要翻译： 描述了一种用于提高半导体晶片的电气测试结果精度的方法。 该方法在测试之前引入了非接触式物理清洁过程。 清洁过程消除了在半导体晶片处理期间引入的电路接触焊盘上的微污染。 这导致半导体晶片的更准确的电探测。

公开(公告)号：US08890336B2

公开(公告)日：2014-11-18

申请号：US12132628

申请日：2008-06-04

申请人： Jin-Yuan Lee ,  Chien-Kang Chou ,  Shih-Hsiung Lin ,  Hsi-Shan Kuo

发明人： Jin-Yuan Lee ,  Chien-Kang Chou ,  Shih-Hsiung Lin ,  Hsi-Shan Kuo

IPC分类号： H01L23/48 ,  H01L25/00 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L24/11 ,  H01L24/13 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05684 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/11849 ,  H01L2224/11906 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13123 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13609 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/013

摘要： A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive cylinder and a solder block. The conductive cylinder is formed over the bonding pad of the silicon chip and the solder block is attached to the upper end of the conductive cylinder. The solder block has a melting point lower than the conductive cylinder. The solder block can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive cylinders and finally a solder block is attached to the end of each conductive cylinder.

摘要翻译： 圆柱形粘结结构及其制造方法。 在硅芯片的接合焊盘上形成圆柱形接合结构，并且在形成倒装芯片封装的过程中将芯片翻转以与衬底板连接。 圆柱形接合结构主要包括导电圆柱体和焊料块。 导电圆柱体形成在硅芯片的接合焊盘上，并且焊接块附接到导电圆柱体的上端。 焊料块的熔点低于导电圆柱体。 焊料块可以配置成圆柱形，球形或半球形。 为了制造圆柱形接合结构，在硅晶片上形成具有与位于晶片上的接合焊盘相对应的多个开口的图案化掩模层。 将导电材料沉积到开口中以形成导电圆柱体，最后在每个导电圆柱体的末端附着焊块。

公开(公告)号：US08723322B2

公开(公告)日：2014-05-13

申请号：US11364375

申请日：2006-02-28

申请人： Hsien-Tsung Liu ,  Chien-Kang Chou ,  Ching-San Lin

发明人： Hsien-Tsung Liu ,  Chien-Kang Chou ,  Ching-San Lin

IPC分类号： H01L23/48

CPC分类号： C23C14/564 ,  C23C14/022 ,  H01L21/0206 ,  H01L21/2855 ,  H01L21/316 ,  H01L21/32051 ,  H01L24/11 ,  H01L2224/02126 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A method of metal sputtering, comprising the following steps. A wafer holder and inner walls of a chamber are coated with a seasoning layer comprised of: a) a material etchable in a metal barrier layer etch process; or b) an insulating or non-conductive material. A wafer having two or more wafer conductive structures is placed upon the seasoning layer coated wafer holder. The wafer is cleaned wherein a portion of the seasoning layer is re-deposited upon the wafer over and between adjacent wafer conductive structures. A metal barrier layer is formed over the wafer. The wafer is removed from the chamber and at least two adjacent upper metal structures are formed over at least one portion of the metal barrier layer. The portions of the metal barrier layer not under the at least two adjacent upper metal structures are etched and removed from over the wafer exposing portions of the re-deposited seasoning layer portions using the metal barrier layer etch process which also removes any exposed portions of the re-deposited seasoning layer portions that are comprised of a material etchable in the metal barrier layer etch process.

摘要翻译： 一种金属溅射方法，包括以下步骤。 晶片保持器和室的内壁涂覆有调味层，调味层包括：a）可在金属阻挡层蚀刻工艺中蚀刻的材料; 或b）绝缘或非导电材料。 将具有两个或更多个晶片导电结构的晶片放置在调味层涂覆的晶片保持器上。 清洁晶片，其中一部分调味层在相邻的晶片导电结构之上和相邻的晶片导电结构之间重新沉积在晶片上。 在晶片上形成金属阻挡层。 将晶片从腔室中取出，并且在金属阻挡层的至少一部分上形成至少两个相邻的上部金属结构。 金属阻挡层不在至少两个相邻的上部金属结构之下的部分被蚀刻并从晶片的上方移除，使用金属阻挡层蚀刻工艺暴露部分再沉积的调节层部分，其也去除了 由金属阻挡层蚀刻工艺中可蚀刻的材料组成的再沉积的调味层部分。

公开(公告)号：US08674507B2

公开(公告)日：2014-03-18

申请号：US10855086

申请日：2004-05-27

申请人： Chien-Kang Chou ,  Chiu-Ming Chou ,  Li-Ren Lin ,  Chu-Fu Lin

发明人： Chien-Kang Chou ,  Chiu-Ming Chou ,  Li-Ren Lin ,  Chu-Fu Lin

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0231 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/731 ,  H01L2224/73207 ,  H01L2224/81411 ,  H01L2224/85444 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/01016 ,  H01L2224/13099 ,  H01L2224/45099

摘要： A chip structure comprising a substrate, a plurality of wire bonding pads and a plurality of solder pads is provided. Gold bumps or gold pads can be formed on the wire bonding pads while solder bumps can be formed on the solder pads concurrently. Alternatively, both wire bonding pads and solder pads can be formed of the same metal stack.

摘要翻译： 提供了包括基板，多个引线接合焊盘和多个焊盘的芯片结构。 可以在引线接合焊盘上形成金焊盘或金焊盘，同时可以在焊盘上形成焊料凸块。 或者，两个引线接合焊盘和焊盘可以由相同的金属堆叠形成。

公开(公告)号：US08558383B2

公开(公告)日：2013-10-15

申请号：US12264271

申请日：2008-11-04

申请人： Mou-Shiung Lin ,  Chien-Kang Chou ,  Ke-Hung Chen

发明人： Mou-Shiung Lin ,  Chien-Kang Chou ,  Ke-Hung Chen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/5227 ,  H01L21/2885 ,  H01L21/563 ,  H01L21/76801 ,  H01L21/76885 ,  H01L23/3114 ,  H01L23/5223 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05173 ,  H01L2224/05176 ,  H01L2224/05183 ,  H01L2224/05548 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/1147 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/45173 ,  H01L2224/45176 ,  H01L2224/45183 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2224/83851 ,  H01L2224/05552 ,  H01L2224/05599

摘要： A post passivation rerouting support structure comprises a relatively thin support layer above the passivation layer to support the RDL, and a relatively thick support layer for fine pitch interconnects extending from the RDL and terminating as contact structures at the surface of the thick support layer, for a next level packaging structure. The thick support layer is planarized before defining the contact structures. The thick support layer may be formed after the conducting posts have been formed, or the thick support layer is formed before forming the conducting posts in vias formed in the thick support layer. An encapsulating layer may be provided above the thick support layer, which top surface is planarized before defining the contact structures. The encapsulating layer and the further support layer may be the same layer.

摘要翻译： 后钝化重路由支持结构包括钝化层上方相对薄的支撑层以支撑RDL，以及用于从RDL延伸并作为接触结构终止于厚支撑层表面的细间距互连的相对较厚的支撑层，用于 下一级包装结构。 在限定接触结构之前，将厚支撑层平坦化。 可以在形成导电柱之后形成厚的支撑层，或者在形成在厚支撑层中的通孔中形成导电柱之前形成厚的支撑层。 可以在厚支撑层之上设置封装层，在限定接触结构之前该顶表面被平坦化。 封装层和另外的支撑层可以是相同的层。

公开(公告)号：US08399989B2

公开(公告)日：2013-03-19

申请号：US11461416

申请日：2006-07-31

申请人： Mou-Shiung Lin ,  Hsin-Jung Lo ,  Chiu-Ming Chou ,  Chien-Kang Chou ,  Ke-Hung Chen

发明人： Mou-Shiung Lin ,  Hsin-Jung Lo ,  Chiu-Ming Chou ,  Chien-Kang Chou ,  Ke-Hung Chen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/12 ,  H01L23/3157 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0231 ,  H01L2224/0345 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05006 ,  H01L2224/05022 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05683 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/11912 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48673 ,  H01L2224/48683 ,  H01L2224/73204 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A circuitry component comprising a semiconductor substrate, a pad over said semiconductor substrate, a tantalum-containing layer on a side wall and a bottom surface of said pad, a passivation layer over said semiconductor substrate, an opening in said passivation layer exposing said pad, a titanium-containing layer over said pad exposed by said opening, and a gold layer over said titanium-containing layer.

摘要翻译： 一种电路部件，包括半导体衬底，所述半导体衬底上的衬垫，在侧壁上的含钽层和所述焊盘的底表面，所述半导体衬底上的钝化层，所述钝化层中的露出所述衬垫的开口， 由所述开口暴露在所述垫上的含钛层，以及在所述含钛层上方的金层。

公开(公告)号：US20110215476A1

公开(公告)日：2011-09-08

申请号：US13108743

申请日：2011-05-16

申请人： Jin-Yuan Lee ,  Chien-Kang Chou ,  Shih-Hsiung Lin ,  Hsi-Shan Kuo

发明人： Jin-Yuan Lee ,  Chien-Kang Chou ,  Shih-Hsiung Lin ,  Hsi-Shan Kuo

IPC分类号： H01L23/488

CPC分类号： H01L25/0657 ,  H01L24/11 ,  H01L24/13 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05684 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/11849 ,  H01L2224/11906 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13123 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13609 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/013

摘要： A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive pillar and a solder cap. The conductive pillar is formed over the bonding pad of the silicon chip and the solder cap is attached to the upper end of the conductive pillar. The solder cap has a melting point lower than the conductive pillar. The solder cap can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive pillars and finally a solder cap is attached to the end of each conductive pillar.

摘要翻译： 圆柱形粘结结构及其制造方法。 在硅芯片的接合焊盘上形成圆柱形接合结构，并且在形成倒装芯片封装的过程中将芯片翻转以与衬底板连接。 圆柱形接合结构主要包括导电柱和焊帽。 导电柱形成在硅芯片的接合焊盘上，并且焊接帽附接到导电柱的上端。 焊锡帽的熔点低于导电柱。 焊帽可以被配置成圆柱形，球形或半球形。 为了制造圆柱形接合结构，在硅晶片上形成具有与位于晶片上的接合焊盘相对应的多个开口的图案化掩模层。 导电材料沉积到开口中以形成导电柱，最后在每个导电柱的末端附着焊帽。

公开(公告)号：US08004092B2

公开(公告)日：2011-08-23

申请号：US12132626

申请日：2008-06-04

申请人： Mou-Shiung Lin ,  Hsin-Jung Lo ,  Chien-Kang Chou ,  Chiu-Ming Chou ,  Ching-San Lin

发明人： Mou-Shiung Lin ,  Hsin-Jung Lo ,  Chien-Kang Chou ,  Chiu-Ming Chou ,  Ching-San Lin

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L24/73 ,  H01L23/5329 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05155 ,  H01L2224/05173 ,  H01L2224/05176 ,  H01L2224/05553 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/1147 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/13173 ,  H01L2224/13176 ,  H01L2224/48463 ,  H01L2224/48477 ,  H01L2224/4943 ,  H01L2224/85051 ,  H01L2224/85399 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01059 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2224/13099 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/4554

摘要： The invention provides a semiconductor chip comprising an interconnecting structure over said passivation layer. The interconnecting structure comprises a first contact pad connected to a second contact pad exposed by an opening in a passivation layer. A metal bump is on the first contact pad and over multiple semiconductor devices, wherein the metal bump has more than 50 percent by weight of gold and has a height of between 8 and 50 microns.

摘要翻译： 本发明提供一种包括在所述钝化层上的互连结构的半导体芯片。 互连结构包括连接到由钝化层中的开口暴露的第二接触焊盘的第一接触焊盘。 金属凸块位于第一接触焊盘上并在多个半导体器件上，其中金属凸块具有超过50重量％的金并且具有在8和50微米之间的高度。

公开(公告)号：US07990037B2

公开(公告)日：2011-08-02

申请号：US11563215

申请日：2006-11-27

申请人： Mou-Shiung Lin ,  Chien-Kang Chou ,  Hsin-Jung Lo

发明人： Mou-Shiung Lin ,  Chien-Kang Chou ,  Hsin-Jung Lo

IPC分类号： H01L23/52

CPC分类号： H01L23/53238 ,  H01L21/288 ,  H01L21/76838 ,  H01L23/5227 ,  H01L23/53223 ,  H01L23/53276 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/48 ,  H01L2221/1094 ,  H01L2224/02166 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05084 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05681 ,  H01L2224/05683 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/451 ,  H01L2224/45155 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099

摘要： The present invention proposes a circuit component structure, which comprises a semiconductor substrate, a fine-line metallization structure formed over the semiconductor substrate and having at least one metal pad, a passivation layer formed over the fine-line metallization structure with the metal pads exposed by the openings of the passivation layer, at least one carbon nanotube layer formed over the fine-line metallization structure and the passivation layer and connecting with the metal pads. The present invention is to provide a carbon nanotube circuit component structure and a method for fabricating the same, wherein the circuit of a semiconductor element is made of an electrically conductive carbon nanotube, and the circuit of the semiconductor element can thus be made finer and denser via the superior electric conductivity, flexibility and strength of the carbon nanotube.

摘要翻译： 本发明提出了一种电路部件结构，其包括半导体衬底，形成在半导体衬底上并具有至少一个金属焊盘的细线金属化结构，形成在细线金属化结构上的钝化层，金属焊盘暴露 通过钝化层的开口，形成在细线金属化结构上的至少一个碳纳米管层和钝化层并与金属焊盘连接。 本发明提供一种碳纳米管回路部件结构及其制造方法，其中，半导体元件的电路由导电性碳纳米管构成，能够使半导体元件的电路变得更细且更致密 通过优异的导电性，柔性和碳纳米管的强度。

公开(公告)号：US07582556B2

公开(公告)日：2009-09-01

申请号：US11426317

申请日：2006-06-26

申请人： Mou-Shiung Lin ,  Chien-Kang Chou ,  Ke-Hung Chen

发明人： Mou-Shiung Lin ,  Chien-Kang Chou ,  Ke-Hung Chen

IPC分类号： H01L21/4763

CPC分类号： H01L24/12 ,  H01L21/76801 ,  H01L23/3192 ,  H01L23/5227 ,  H01L23/53295 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/11 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16227 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/45173 ,  H01L2224/45176 ,  H01L2224/45183 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2224/05599

摘要： A circuit structure includes a semiconductor substrate, first and second metallic posts over the semiconductor substrate, an insulating layer over the semiconductor substrate and covering the first and second metallic posts, first and second bumps over the first and second metallic posts or over the insulating layer. The first and second metallic posts have a height of between 20 and 300 microns, with the ratio of the maximum horizontal dimension thereof to the height thereof being less than 4. The distance between the center of the first bump and the center of the second bump is between 10 and 250 microns.

摘要翻译： 电路结构包括半导体衬底，半导体衬底上的第一和第二金属柱，半导体衬底上的绝缘层，并覆盖第一和第二金属柱，第一和第二金属柱上的第一和第二凸块或绝缘层 。 第一和第二金属柱的高度为20至300微米，其最大水平尺寸与其高度之比小于4.第一凸起的中心与第二凸起的中心之间的距离 在10和250微米之间。