公开(公告)号：US20120043657A1

公开(公告)日：2012-02-23

申请号：US12860347

申请日：2010-08-20

Applicant: Tuung Luoh ,  Ming Da Cheng ,  Chin-Ta Su ,  Tahone Yang ,  Kuang-Chao Chen

Inventor： Tuung Luoh ,  Ming Da Cheng ,  Chin-Ta Su ,  Tahone Yang ,  Kuang-Chao Chen

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L21/76885 ,  H01L21/76852 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods for fabricating conductive metal lines of a semiconductor device are described herein. In one embodiment, such a method may comprise depositing a conductive material over a substrate, and depositing a first barrier layer on the conductive layer. Such a method may also comprise patterning a mask on the first barrier layer, the pattern comprising a layout of the conductive lines. Such an exemplary method may also comprise etching the conductive material and the first barrier layer using the patterned mask to form the conductive lines. In addition, a low temperature post-flow may be performed on the structure. The method may also include depositing a dielectric material over and between the patterned conductive lines.

Abstract translation: 本文描述了制造半导体器件的导电金属线的方法。 在一个实施例中，这种方法可以包括在衬底上沉积导电材料，以及在导电层上沉积第一阻挡层。 这种方法还可以包括在第一阻挡层上图案化掩模，该图案包括导线的布局。 这种示例性方法还可以包括使用图案化掩模蚀刻导电材料和第一阻挡层以形成导电线。 此外，可以对结构进行低温后流。 该方法还可以包括在图案化导电线之上和之间沉积电介质材料。

公开(公告)号：US20120021183A1

公开(公告)日：2012-01-26

申请号：US12841882

申请日：2010-07-22

Applicant: Kuei-Wei Huang ,  Wei-Hung Lin ,  Lin-Wei Wang ,  Bor-Ping Jang ,  Ming-Da Cheng ,  Chung-shi Liu

Inventor： Kuei-Wei Huang ,  Wei-Hung Lin ,  Lin-Wei Wang ,  Bor-Ping Jang ,  Ming-Da Cheng ,  Chung-shi Liu

IPC: B32B3/00 ,  B23K31/02

CPC classification number: B23K31/02 ,  B23K1/0016 ,  H01L21/563 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/13147 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/75252 ,  H01L2224/75302 ,  H01L2224/75824 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81947 ,  H01L2225/06513 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/144 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2203/082 ,  Y02P70/613 ,  Y10T428/24612 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of forming a bump structure includes providing a first work piece including a dielectric layer having a top surface; placing a second work piece facing the first work piece; placing a heating tool contacting the second work piece; and heating the second work piece using the heating tool to perform a reflow process. A first solder bump between the first and the second work pieces is melted to form a second solder bump. Before the second solder bump solidifies, pulling the second work piece away from the first work piece, until an angle formed between a tangent line of the second solder bump and the top surface of the dielectric layer is greater than about 50 degrees, wherein the tangent line is drawn at a point where the second solder bump joins the dielectric layer.

Abstract translation: 形成凸块结构的方法包括提供包括具有顶表面的电介质层的第一工件; 放置面向第一工件的第二工件; 放置与第二工件接触的加热工具; 并使用加热工具加热第二工件以进行回流处理。 在第一和第二工件之间的第一焊料凸块熔化以形成第二焊料凸点。 在第二焊料凸块固化之前，将第二工件拉离第一工件，直到在第二焊料凸块的切线与电介质层的顶表面之间形成的角度大于约50度，其中切线 线在第二焊料凸块连接电介质层的点处被拉伸。

公开(公告)号：US20110260317A1

公开(公告)日：2011-10-27

申请号：US12765250

申请日：2010-04-22

Applicant: Wen-Hsiung LU ,  Ming-Da CHENG ,  Chih-Wei LIN ,  Jacky CHANG ,  Chung-Shi LIU ,  Chen-Hua YU

Inventor： Wen-Hsiung LU ,  Ming-Da CHENG ,  Chih-Wei LIN ,  Jacky CHANG ,  Chung-Shi LIU ,  Chen-Hua YU

IPC: H01L23/50 ,  H01L21/768

CPC classification number: H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0346 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/11906 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/13455 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A copper pillar bump has a sidewall protection layer formed of an electrolytic metal layer. The electrolytic metal layer is an electrolytic nickel layer, an electrolytic gold layer, and electrolytic copper layer, or an electrolytic silver layer.

Abstract translation: 铜柱凸起具有由电解金属层形成的侧壁保护层。 电解金属层是电解镍层，电解金层，电解铜层或电解银层。

公开(公告)号：US10522452B2

公开(公告)日：2019-12-31

申请号：US13276143

申请日：2011-10-18

Applicant: Kuei-Wei Huang ,  Wei-Hung Lin ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng ,  Ching-Shi Liu

Inventor： Kuei-Wei Huang ,  Wei-Hung Lin ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng ,  Ching-Shi Liu

IPC: H01L21/00 ,  H01L23/498

Abstract: Packaging methods for semiconductor devices are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.

公开(公告)号：US09576830B2

公开(公告)日：2017-02-21

申请号：US13475790

申请日：2012-05-18

Applicant: Hui-Min Huang ,  Chih-Wei Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Hui-Min Huang ,  Chih-Wei Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L21/687 ,  H01L21/67 ,  H01L21/683

CPC classification number: H01L21/67288 ,  H01L21/6838

Abstract: A method for adjusting the warpage of a wafer, includes providing a wafer having a center portion and edge portions and providing a holding table having a holding area thereon for holding the wafer. The wafer is placed onto the holding table with the center portion higher than the edge portions and thereafter pressed onto the holding area such that the wafer is attracted to and held onto the holding table by self-suction force. The wafer is heated at a predetermined temperature and for a predetermined time in accordance with an amount of warpage of the wafer in order to achieve a substantially flat wafer or a predetermined wafer level.

Abstract translation: 一种用于调整晶片翘曲的方法，包括提供具有中心部分和边缘部分的晶片，并提供其上具有用于保持晶片的保持区域的保持台。 将晶片放置在保持台上，其中心部分高​​于边缘部分，然后按压到保持区域上，使得晶片通过自吸力被吸引并保持在保持台上。 根据晶片的翘曲量将晶片在预定温度下加热预定时间，以便实现基本上平坦的晶片或预定的晶片级。

公开(公告)号：US09219030B2

公开(公告)日：2015-12-22

申请号：US13526073

申请日：2012-06-18

Applicant: Chen-Hua Yu ,  Mirng-Ji Lii ,  Chung-Shi Liu ,  Meng-Tse Chen ,  Wei-Hung Lin ,  Ming-Da Cheng

Inventor： Chen-Hua Yu ,  Mirng-Ji Lii ,  Chung-Shi Liu ,  Meng-Tse Chen ,  Wei-Hung Lin ,  Ming-Da Cheng

IPC: H01L23/498 ,  H01L21/78 ,  H01L23/00 ,  H01L21/56 ,  H01L25/10 ,  H01L23/31 ,  H01L25/03 ,  H01L25/00

CPC classification number: H01L24/05 ,  B23K35/001 ,  B23K35/0222 ,  B23K35/22 ,  B23K35/262 ,  B23K35/3613 ,  H01L21/561 ,  H01L23/3135 ,  H01L23/3178 ,  H01L23/498 ,  H01L23/49816 ,  H01L24/08 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/06181 ,  H01L2224/08113 ,  H01L2224/1184 ,  H01L2224/13005 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/1355 ,  H01L2224/13561 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13666 ,  H01L2224/1412 ,  H01L2224/14181 ,  H01L2224/16104 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/013 ,  H01L2924/206 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: The described embodiments of mechanisms of forming a package on package (PoP) structure involve bonding with connectors with non-solder metal balls to a packaging substrate. The non-solder metal balls may include a solder coating layer. The connectors with non-solder metal balls can maintain substantially the shape of the connectors and control the height of the bonding structures between upper and lower packages. The connectors with non-solder metal balls are also less likely to result in bridging between connectors or disconnection (or cold joint) of bonded connectors. As a result, the pitch of the connectors with non-solder metal balls can be kept small.

Abstract translation: 形成封装封装（PoP）结构的机构的所述实施例包括将具有非焊料金属球的连接器与包装衬底结合。 非焊接金属球可以包括焊料涂层。 具有非焊接金属球的连接器可以基本保持连接器的形状并控制上部和下部封装之间的结合结构的高度。 具有非焊接金属球的连接器也不太可能导致连接器之间的桥接或接合连接器的断开（或冷接头）。 结果，可以将具有非焊接金属球的连接器的间距保持较小。

公开(公告)号：US09123763B2

公开(公告)日：2015-09-01

申请号：US13271952

申请日：2011-10-12

Applicant: Chen-Hua Yu ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Ming-Da Cheng ,  Chih-Wei Lin

Inventor： Chen-Hua Yu ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Ming-Da Cheng ,  Chih-Wei Lin

IPC: H01L23/48 ,  H01L21/683 ,  H01L23/538 ,  H01L21/56 ,  H01L25/10 ,  H01L21/36 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00 ,  H05K1/18 ,  H01L23/498

CPC classification number: H01L25/50 ,  H01L21/31051 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76802 ,  H01L21/76819 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5383 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/185 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2224/48

Abstract: A package-on-package (PoP) structure comprises a first package and a second package. The first package comprises a first die, a second die, and a core material. The core material has a first surface and a second surface. A first redistribution layer (RDL) is on the first surface, and a second RDL is on the second surface. The first die is disposed in the core material between the first surface and the second surface. The second die is coupled to one of the first RDL and the second RDL. The second package comprises a third die and an interposer. The interposer has a first side and a second side. The third die is coupled to the second side of the interposer. The first package is coupled to the second package by first electrical connectors coupled to the second side of the interposer and the first RDL.

Abstract translation: 封装封装（PoP）结构包括第一封装和第二封装。 第一包装包括第一模具，第二模具和芯材料。 芯材料具有第一表面和第二表面。 第一再分配层（RDL）位于第一表面上，第二RDL位于第二表面上。 第一模具设置在第一表面和第二表面之间的芯材料中。 第二管芯耦合到第一RDL和第二RDL之一。 第二包装包括第三管芯和插入件。 插入器具有第一侧和第二侧。 第三裸片耦合到插入器的第二侧。 第一封装通过耦合到插入件的第二侧和第一RDL的第一电连接器耦合到第二封装。

公开(公告)号：US09082776B2

公开(公告)日：2015-07-14

申请号：US13594544

申请日：2012-08-24

Applicant: Wen-Hsiung Lu ,  Ming-Da Cheng ,  Yi-Wen Wu ,  Yu-Peng Tsai ,  Chia-Wei Tu ,  Chung-Shi Liu

Inventor： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Yi-Wen Wu ,  Yu-Peng Tsai ,  Chia-Wei Tu ,  Chung-Shi Liu

IPC: H01L23/52 ,  H01L21/44 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L21/56 ,  H01L21/566 ,  H01L23/293 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05541 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05686 ,  H01L2224/10126 ,  H01L2224/11831 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/206 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A semiconductor package includes a semiconductor substrate, a contact pad overlying the semiconductor substrate, an interconnect layer overlying the contact pad, a passivation layer formed between the contact pad and the interconnect layer, a bump overlying the interconnect layer, and a protection layer overlying the interconnect layer and the passivation layer and covering a lower portion of the bump. The protection layer includes a curved surface region.

Abstract translation: 半导体封装包括半导体衬底，覆盖半导体衬底的接触焊盘，覆盖接触焊盘的互连层，形成在接触焊盘和互连层之间的钝化层，覆盖在互连层上的凸起以及覆盖在该互连层上的保护层 互连层和钝化层并覆盖凸块的下部。 保护层包括弯曲表面区域。

公开(公告)号：US09030022B2

公开(公告)日：2015-05-12

申请号：US13280157

申请日：2011-10-24

Applicant: Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/48 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10

CPC classification number: H01L25/50 ,  H01L21/31105 ,  H01L21/565 ,  H01L22/12 ,  H01L22/20 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/1131 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A device includes a package component having conductive features on a top surface, and a polymer region molded over the top surface of the first package component. A plurality of openings extends from a top surface of the polymer region into the polymer region, wherein each of the conductive features is exposed through one of the plurality of openings. The plurality of openings includes a first opening having a first horizontal size, and a second opening having a second horizontal size different from the first horizontal size.

Abstract translation: 一种器件包括在顶表面上具有导电特征的封装元件和模塑在第一封装元件的顶表面上的聚合物区域。 多个开口从聚合物区域的顶表面延伸到聚合物区域中，其中每个导电特征通过多个开口中的一个露出。 多个开口包括具有第一水平尺寸的第一开口和具有不同于第一水平尺寸的第二水平尺寸的第二开口。

公开(公告)号：US08846448B2

公开(公告)日：2014-09-30

申请号：US13571665

申请日：2012-08-10

Applicant: Meng-Tse Chen ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Tsai-Tsung Tsai ,  Ai-Tee Ang ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Meng-Tse Chen ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Tsai-Tsung Tsai ,  Ai-Tee Ang ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L21/00 ,  H01L21/67

CPC classification number: H01L21/67288 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/15311 ,  H05B6/6447 ,  H05B6/80 ,  H01L2924/0001

Abstract: The present disclosure relates to a tool arrangement and method to reduce warpage within a package-on-package semiconductor structure, while minimizing void formation within an electrically-insulating adhesive which couples the packages. A pressure generator and a variable frequency microwave source are coupled to a process chamber which encapsulates a package-on-package semiconductor structure. The package-on-package semiconductor structure is simultaneously heated by the variable frequency microwave source at variable frequency, variable temperature, and variable duration and exposed to an elevated pressure by the pressure generator. This combination for microwave heating and elevated pressure limits the amount of warpage introduced while preventing void formation within an electrically-insulating adhesive which couples the substrates of the package-on-package semiconductor structure.

Abstract translation: 本公开涉及一种减少封装封装半导体结构内的翘曲的工具布置和方法，同时最小化耦合封装的电绝缘粘合剂内的空隙形成。 压力发生器和可变频率微波源耦合到封装封装的封装半导体结构的处理室。 封装的封装半导体结构由可变频率，可变温度和可变持续时间的可变频率微波源同时加热，并通过压力发生器暴露于高压。 这种用于微波加热和升高压力的组合限制了引入的翘曲量，同时防止在封装封装半导体结构的衬底的电绝缘粘合剂中形成空隙。