公开(公告)号：US20150380394A1

公开(公告)日：2015-12-31

申请号：US14744031

申请日：2015-06-19

申请人： Hye-young JANG ,  Chang-Seong JEON ,  CHAJEA JO ,  Taeje CHO

发明人： Hye-young JANG ,  Chang-Seong JEON ,  CHAJEA JO ,  Taeje CHO

IPC分类号： H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/1412 ,  H01L2224/1413 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17104 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/321 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83379 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/014

摘要： A semiconductor package may include a first semiconductor chip including a first surface facing a package substrate, a second surface opposite to the first surface, and at least one through-electrode penetrating the first semiconductor chip, a molding layer molding the first semiconductor chip and exposing the second surface of the first semiconductor chip, a second semiconductor chip stacked on the second surface of the first semiconductor chip, and a non-conductive film provided between the first and second semiconductor chips. The second semiconductor chip includes an overhang portion extending past an edge of the first semiconductor chip. For example, a size of the second semiconductor chip may be greater than that of the first semiconductor chip, so the second semiconductor chip has an overhang. The second semiconductor chip includes at least one interconnecting terminal electrically connected to the at least one through-electrode.

摘要翻译： 半导体封装可以包括第一半导体芯片，其包括面向封装基板的第一表面，与第一表面相对的第二表面，以及穿透第一半导体芯片的至少一个贯通电极，模制第一半导体芯片的模制层和暴露 第一半导体芯片的第二表面，堆叠在第一半导体芯片的第二表面上的第二半导体芯片，以及设置在第一和第二半导体芯片之间的非导电膜。 第二半导体芯片包括延伸穿过第一半导体芯片的边缘的突出部分。 例如，第二半导体芯片的尺寸可以大于第一半导体芯片的尺寸，因此第二半导体芯片具有突出端。 第二半导体芯片包括电连接到至少一个通孔的至少一个互连端子。

公开(公告)号：US09177907B1

公开(公告)日：2015-11-03

申请号：US13438433

申请日：2012-04-03

申请人： Nathan P. Lower ,  Ross K. Wilcoxon ,  Nathaniel P. Wyckoff

发明人： Nathan P. Lower ,  Ross K. Wilcoxon ,  Nathaniel P. Wyckoff

IPC分类号： H01L21/50 ,  H01L23/522

CPC分类号： H01L21/50 ,  H01L23/13 ,  H01L23/522 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04026 ,  H01L2224/06183 ,  H01L2224/29011 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/321 ,  H01L2224/32104 ,  H01L2224/32111 ,  H01L2224/81801 ,  H01L2224/83002 ,  H01L2224/831 ,  H01L2224/83801 ,  H01L2224/83907 ,  H01L2224/92 ,  H01L2224/92242 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/81 ,  H01L21/304 ,  H01L2221/68381 ,  H01L2224/85 ,  H01L2221/68304 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A method of manufacturing an integrated circuit device includes providing a substrate; forming at least one cavity in the substrate; positioning a die within the at least one cavity of the substrate; and depositing a die attach material around the die within the at least one cavity to mechanically bond the die to the substrate.

摘要翻译： 一种制造集成电路器件的方法包括：提供衬底; 在所述基板中形成至少一个空腔; 将模具定位在所述衬底的所述至少一个空腔内; 以及在所述至少一个腔内在所述管芯附近沉积管芯附接材料以将所述管芯机械地结合到所述衬底。

公开(公告)号：US08943683B2

公开(公告)日：2015-02-03

申请号：US14052443

申请日：2013-10-11

申请人： Unimicron Technology Corp.

发明人： Tsung-Yuan Chen ,  Ming-Huang Ting

IPC分类号： H05K3/20 ,  H05K3/00 ,  H05K3/40 ,  H01L21/683 ,  H01L23/538 ,  H01L23/00 ,  H05K1/18 ,  H05K3/46

CPC分类号： H05K3/4007 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2221/68304 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/2919 ,  H01L2224/321 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81903 ,  H01L2224/83005 ,  H01L2224/83203 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4614 ,  H05K3/4647 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/49124 ,  Y10T29/49128 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/19 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A fabricating method of an embedded package structure includes following steps. First and second boards are combined to form an integrated panel. First and second circuit structures are respectively formed on the first and second boards that are then separated. An embedded element is electrically disposed on the first circuit structure. First and second conductive bumps are respectively formed on a conductive circuit substrate and the second circuit structure. First and second semi-cured films are provided; a laminating process is performed to laminate the first circuit structure on the first board, the first and second semi-cured films, the conductive circuit substrate, and the second circuit structure on the second board. The first and second semi-cured films encapsulate the embedded element. The first and second conductive bumps respectively pierce through the first and second semi-cured films and are electrically connected to the first circuit structure and the conductive circuit substrate, respectively.

摘要翻译： 嵌入式封装结构的制造方法包括以下步骤。 第一和第二板组合形成集成面板。 第一和第二电路结构分别形成在第一和第二板上，然后分离。 嵌入式元件电气地布置在第一电路结构上。 第一和第二导电凸块分别形成在导电电路基板和第二电路结构上。 提供第一和第二半固化膜; 执行层压工艺以将第一板上的第一电路结构，第二和第二半固化膜，导电电路基板和第二电路结构层叠在第二板上。 第一和第二半固化膜封装了嵌入元件。 第一和第二导电凸块分别穿过第一和第二半固化膜，并分别电连接到第一电路结构和导电电路基板。

公开(公告)号：US20140205851A1

公开(公告)日：2014-07-24

申请号：US13748489

申请日：2013-01-23

申请人： Ravindranath V. MAHAJAN ,  Aleksandar ALEKSOV ,  Debendra MALLIK ,  Ian A. YOUNG ,  Rajasekaran SWAMINATHAN ,  Sairam AGRAHARAM ,  John S. GUZEK

发明人： Ravindranath V. MAHAJAN ,  Aleksandar ALEKSOV ,  Debendra MALLIK ,  Ian A. YOUNG ,  Rajasekaran SWAMINATHAN ,  Sairam AGRAHARAM ,  John S. GUZEK

IPC分类号： B32B7/12 ,  B32B15/04 ,  H01F1/42

CPC分类号： B32B7/12 ,  B32B15/043 ,  C08K3/08 ,  C08K2201/01 ,  C09J9/02 ,  C09J11/04 ,  H01F1/083 ,  H01F1/28 ,  H01F7/0252 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/11332 ,  H01L2224/11436 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/1316 ,  H01L2224/13193 ,  H01L2224/13211 ,  H01L2224/1336 ,  H01L2224/13393 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/27334 ,  H01L2224/2741 ,  H01L2224/2929 ,  H01L2224/29318 ,  H01L2224/29324 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/2936 ,  H01L2224/29369 ,  H01L2224/29384 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/321 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75265 ,  H01L2224/75266 ,  H01L2224/81121 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/81903 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/9211 ,  H01L2924/12042 ,  H01R4/04 ,  H05K3/323 ,  H05K2201/0338 ,  H05K2201/083 ,  Y10T428/12028 ,  Y10T428/12069 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2924/01078 ,  H01L2924/01028 ,  H01L2924/01027 ,  H01L2924/01062 ,  H01L2924/0106 ,  H01L2924/01026 ,  H01L2924/01005 ,  H01L2924/01007 ,  H01L2924/014 ,  H01L2924/06 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

摘要： An interconnect structure for electrically joining two surfaces includes magnetic attachment structures and an anisotropic conductive adhesive (ACA). Magnetic attachment structures on a first surface are magnetically attracted to magnetic attachment structures on a second surface. Opposing magnetic attachment structures are joined via an ACA, which conducts electricity when compressed, and is electrically insulating when not compressed. The magnetic attraction between opposing magnetic attachment structures generates a sufficient force to maintain compression of the intervening ACA in order to sustain a desired level of electrical conductivity between the first surface and second surface. A method for joining two surfaces using the interconnect structure is disclosed. Additionally, a magnetic anisotropic conductive adhesive having magnetic conductive particles dispersed therein is disclosed.

摘要翻译： 用于电连接两个表面的互连结构包括磁性附着结构和各向异性导电粘合剂（ACA）。 在第一表面上的磁性附着结构被磁吸引到第二表面上的磁性附着结构上。 相反的磁性连接结构通过ACA连接，ACA在压缩时传导电力，并且在未压缩时电绝缘。 相对的磁性连接结构之间的磁吸引力产生足够的力以维持中间ACA的压缩，以便在第一表面和第二表面之间维持期望的电导率水平。 公开了一种使用互连结构连接两个表面的方法。 另外，公开了一种其中分散有导电颗粒的磁各向异性导电粘合剂。

公开(公告)号：US20140054795A1

公开(公告)日：2014-02-27

申请号：US13591719

申请日：2012-08-22

申请人： Matthew David Romig ,  Lance Cole Wright ,  Leslie Edward Stark ,  Frank Stepniak ,  Sreenivasan K. Koduri

发明人： Matthew David Romig ,  Lance Cole Wright ,  Leslie Edward Stark ,  Frank Stepniak ,  Sreenivasan K. Koduri

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/00 ,  B41M3/06 ,  H01L23/48 ,  H01L24/24 ,  H01L24/25 ,  H01L24/76 ,  H01L24/80 ,  H01L24/82 ,  H01L25/0657 ,  H01L2224/24145 ,  H01L2224/24227 ,  H01L2224/321 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/76155 ,  H01L2224/82102 ,  H05K1/092 ,  H05K1/181 ,  H05K3/125 ,  H05K3/32 ,  H05K2201/09272 ,  H05K2201/10151 ,  H05K2201/10454 ,  Y02P70/611

摘要： One method of making an electronic assembly includes mounting one electrical substrate on another electrical substrate with a face surface on the one substrate oriented transversely of a face surface of the other substrate. The method also includes inkjet printing on the face surfaces a conductive trace that connects an electrical contact on the one substrate with an electrical connector on the other substrate. An electronic assembly may include a first substrate having a generally flat surface with a first plurality of electrical contacts thereon; a second substrate having a generally flat surface with a second plurality of electrical contacts thereon, the surface of the second substrate extending transversely of the surface of said first substrate; and at least one continuous conductive ink trace electrically connecting at least one of the first plurality of electrical contacts with at least one of the second plurality of electrical contacts.

摘要翻译： 制造电子组件的一种方法包括将一个电气基板安装在另一个电气基板上，其中一个基板上的面表面横向于另一个基板的表面。 该方法还包括在表面上喷墨印刷导电迹线，导电迹线将一个基底上的电接触与另一基底上的电连接器连接。 电子组件可以包括具有大致平坦表面的第一基板，其上具有第一多个电触点; 第二基板，其具有大致平坦的表面，其上具有第二多个电触点，所述第二基板的表面横向于所述第一基板的表面延伸; 以及至少一个连续的导电油墨迹线将所述第一多个电触点中的至少一个与所述第二多个电触点中的至少一个电连接。

公开(公告)号：US20130264721A1

公开(公告)日：2013-10-10

申请号：US13440478

申请日：2012-04-05

申请人： Stefan Landau ,  Joachim Mahler ,  Khalil Hosseini ,  Ivan Nikitin ,  Thomas Wowra ,  Lukas Ossowski

发明人： Stefan Landau ,  Joachim Mahler ,  Khalil Hosseini ,  Ivan Nikitin ,  Thomas Wowra ,  Lukas Ossowski

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L23/3121 ,  H01L21/563 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49572 ,  H01L23/49575 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/27436 ,  H01L2224/2902 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/321 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/73253 ,  H01L2224/73269 ,  H01L2224/81191 ,  H01L2224/83191 ,  H01L2224/83801 ,  H01L2224/8485 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

摘要： The electronic module includes a first carrier and a first semiconductor chip arranged on the first carrier. A second semiconductor chip is arranged above the first semiconductor chip. A material layer adheres the second semiconductor chip to the first carrier and encapsulates the first semiconductor chip.

摘要翻译： 电子模块包括第一载体和布置在第一载体上的第一半导体芯片。 第二半导体芯片布置在第一半导体芯片的上方。 材料层将第二半导体芯片粘附到第一载体并封装第一半导体芯片。

公开(公告)号：US20120086127A1

公开(公告)日：2012-04-12

申请号：US13035607

申请日：2011-02-25

申请人： Chia-Pao SHU ,  Chun-wen CHENG ,  Kuei-Sung CHANG ,  Hsin-Ting HUANG ,  Shang-Ying TSAI ,  Jung-Huei PENG

发明人： Chia-Pao SHU ,  Chun-wen CHENG ,  Kuei-Sung CHANG ,  Hsin-Ting HUANG ,  Shang-Ying TSAI ,  Jung-Huei PENG

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L21/76838 ,  B81C1/00238 ,  B81C1/00269 ,  B81C2203/019 ,  H01L23/49838 ,  H01L23/528 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/0362 ,  H01L2224/04026 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05617 ,  H01L2224/05638 ,  H01L2224/061 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/26145 ,  H01L2224/29011 ,  H01L2224/29014 ,  H01L2224/29017 ,  H01L2224/2902 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29117 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29181 ,  H01L2224/301 ,  H01L2224/32058 ,  H01L2224/321 ,  H01L2224/32106 ,  H01L2224/32148 ,  H01L2224/83203 ,  H01L2224/83365 ,  H01L2224/83805 ,  H01L2225/06527 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/01014 ,  H01L2924/01037 ,  H01L2924/01032 ,  H01L2924/00 ,  H01L2924/0132 ,  H01L2924/00014

摘要： A package system includes a first substrate. A second substrate is electrically coupled with the first substrate. At least one electrical bonding material is disposed between the first substrate and the second substrate. The at least one electrical bonding material includes a eutectic bonding material. The eutectic bonding material includes a metallic material and a semiconductor material. The metallic material is disposed adjacent to a surface of the first substrate. The metallic material includes a first pad and at least one first guard ring around the first pad.

摘要翻译： 封装系统包括第一衬底。 第二衬底与第一衬底电耦合。 至少一个电接合材料设置在第一基板和第二基板之间。 所述至少一个电接合材料包括共晶接合材料。 共晶接合材料包括金属材料和半导体材料。 金属材料邻近第一基底的表面设置。 金属材料包括第一焊盘和围绕第一焊盘的至少一个第一保护环。

公开(公告)号：US20120086126A1

公开(公告)日：2012-04-12

申请号：US12900718

申请日：2010-10-08

申请人： Chia-Pao SHU ,  Chun-wen CHENG ,  Kuei-Sung CHANG

发明人： Chia-Pao SHU ,  Chun-wen CHENG ,  Kuei-Sung CHANG

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L24/83 ,  B81C1/00238 ,  B81C1/00269 ,  B81C2203/019 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/0362 ,  H01L2224/04026 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05617 ,  H01L2224/05638 ,  H01L2224/061 ,  H01L2224/26145 ,  H01L2224/29017 ,  H01L2224/2902 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29117 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29181 ,  H01L2224/29291 ,  H01L2224/32058 ,  H01L2224/321 ,  H01L2224/32106 ,  H01L2224/32148 ,  H01L2224/83203 ,  H01L2224/83365 ,  H01L2224/83805 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461

摘要： A package system includes a first substrate and a second substrate. The second substrate is electrically coupled with the first substrate. The second substrate includes at least one first opening. At least one electrical bonding material is disposed between the first substrate and the second substrate. A first portion of the at least one electrical bonding material is at least partially filled in the at least one first opening.

摘要翻译： 封装系统包括第一基板和第二基板。 第二基板与第一基板电耦合。 第二基板包括至少一个第一开口。 至少一个电接合材料设置在第一基板和第二基板之间。 所述至少一个电接合材料的第一部分至少部分地填充在所述至少一个第一开口中。

公开(公告)号：US20100314352A1

公开(公告)日：2010-12-16

申请号：US12555210

申请日：2009-09-08

申请人： Tsung-Yuan Chen ,  Ming-Huang Ting

发明人： Tsung-Yuan Chen ,  Ming-Huang Ting

IPC分类号： B32B38/10 ,  H01B13/00

CPC分类号： H05K3/4007 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2221/68304 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/2919 ,  H01L2224/321 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81903 ,  H01L2224/83005 ,  H01L2224/83203 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4614 ,  H05K3/4647 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/49124 ,  Y10T29/49128 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/19 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A fabricating method of an embedded package structure includes following steps. First, a first circuit structure and a second circuit structure are formed respectively on a first board and a second board which are combined to form an integrated panel. The first board and the second board are then separated. Next, an embedded element is electrically disposed on the first circuit structure. At least one conductive bump is formed on the second circuit structure. Thereafter, a semi-cured film is provided, and a laminating process is performed to laminate the first circuit structure on the first board, the semi-cured film, and the second circuit structure on the second board. The semi-cured film encapsulates the embedded element and the at least one conductive bump pierces through the semi-cured film and electrically connects the first circuit structure.

摘要翻译： 嵌入式封装结构的制造方法包括以下步骤。 首先，第一电路结构和第二电路结构分别形成在组合形成集成面板的第一板和第二板上。 然后将第一板和第二板分开。 接下来，嵌入式元件电气地布置在第一电路结构上。 在第二电路结构上形成至少一个导电凸块。 此后，提供半固化膜，并且进行层压工艺以将第一电路结构层压在第二板上的第一板，半固化膜和第二电路结构上。 半固化膜封装嵌入元件，并且至少一个导电凸块刺穿半固化膜并电连接第一电路结构。

公开(公告)号：US20080157352A1

公开(公告)日：2008-07-03

申请号：US11617640

申请日：2006-12-28

申请人： Shripad Gokhale ,  Kathy Wei Yan ,  Bijay S. Saha ,  Samir Pandey ,  Ngoc K. Dang ,  Munehiro Toyama

发明人： Shripad Gokhale ,  Kathy Wei Yan ,  Bijay S. Saha ,  Samir Pandey ,  Ngoc K. Dang ,  Munehiro Toyama

IPC分类号： H01L23/06 ,  H01L21/00

CPC分类号： H01L21/563 ,  H01L24/32 ,  H01L2224/26175 ,  H01L2224/321 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041

摘要： Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate with a die attach area, and forming a layer on the substrate outside of the die attach area. The layer may be formed from a fluoropolymer material. The method also includes coupling a die to the substrate in the die attach area, wherein a gap remains between the die and the die attach area. The method also includes placing an underfill material in the gap and adjacent to the layer on the substrate. Examples of fluoropolymer materials which may be used include polytetrafluoroethylene (PTFE) and perfluoroalkoxy polymer resin (PFA). Other embodiments are described and claimed.

摘要翻译： 描述了用于制造电子设备的电子设备和方法。 一种方法包括提供具有管芯附接区域的衬底，以及在衬底外部的管芯附着区域上形成层。 该层可以由含氟聚合物材料形成。 该方法还包括将管芯附接到管芯附着区域中的衬底，其中在管芯和管芯附着区域之间留有间隙。 该方法还包括将底部填充材料放置在间隙中并且与衬底上的层相邻。 可以使用的含氟聚合物材料的实例包括聚四氟乙烯（PTFE）和全氟烷氧基聚合物树脂（PFA）。 描述和要求保护其他实施例。