Isolation structure, non-volatile memory having the same, and method of fabricating the same
    63.
    发明授权
    Isolation structure, non-volatile memory having the same, and method of fabricating the same 有权
    隔离结构,具有相同的非易失性存储器及其制造方法

    公开(公告)号:US08067292B2

    公开(公告)日:2011-11-29

    申请号:US12343633

    申请日:2008-12-24

    IPC分类号: H01L21/76

    CPC分类号: H01L21/76229 H01L21/76205

    摘要: A method of forming an isolation structure, comprising: (a) providing a base having a recess; (b) forming a stop layer on the base and in the recess; (c) forming a dielectric material on the stop layer so as to allow the rest of the recess to be filled with the dielectric material; (d) removing the dielectric material over the base by performing a chemical mechanical polishing (CMP) process until a part of the stop layer is exposed so as to form a dielectric layer in the recess; and (e) removing a part of the stop layer, wherein the another part of the stop layer and the dielectric layer filled in the recess constitute the isolation structure.

    摘要翻译: 一种形成隔离结构的方法,包括:(a)提供具有凹部的基部; (b)在基座和凹槽中形成停止层; (c)在所述阻挡层上形成电介质材料,以允许所述凹部的其余部分填充所述电介质材料; (d)通过进行化学机械抛光(CMP)工艺在基底上去除电介质材料,直到一部分停止层被暴露以在凹槽中形成电介质层; 和(e)去除所述阻挡层的一部分,其中所述阻挡层的另一部分和填充在所述凹部中的所述电介质层构成所述隔离结构。

    ISOLATION STRUCTURE, NON-VOLATILE MEMORY HAVING THE SAME, AND METHOD OF FABRICATING THE SAME
    65.
    发明申请
    ISOLATION STRUCTURE, NON-VOLATILE MEMORY HAVING THE SAME, AND METHOD OF FABRICATING THE SAME 有权
    隔离结构,具有该隔离结构的非易失性存储器及其制造方法

    公开(公告)号:US20090184343A1

    公开(公告)日:2009-07-23

    申请号:US12343633

    申请日:2008-12-24

    CPC分类号: H01L21/76229 H01L21/76205

    摘要: A method of forming an isolation structure, comprising: (a) providing a base having a recess; (b) forming a stop layer on the base and in the recess; (c) forming a dielectric material on the stop layer so as to allow the rest of the recess to be filled with the dielectric material; (d) removing the dielectric material over the base by performing a chemical mechanical polishing (CMP) process until a part of the stop layer is exposed so as to form a dielectric layer in the recess; and (e) removing a part of the stop layer, wherein the another part of the stop layer and the dielectric layer filled in the recess constitute the isolation structure.

    摘要翻译: 一种形成隔离结构的方法,包括:(a)提供具有凹部的基部; (b)在基座和凹槽中形成停止层; (c)在所述阻挡层上形成电介质材料,以允许所述凹部的其余部分填充所述电介质材料; (d)通过进行化学机械抛光(CMP)工艺在基底上去除电介质材料,直到一部分停止层被暴露以在凹槽中形成电介质层; 和(e)去除所述阻挡层的一部分,其中所述阻挡层的另一部分和填充在所述凹部中的所述电介质层构成所述隔离结构。

    Apparatus and methods for molded underfills in flip chip packaging
    68.
    发明授权
    Apparatus and methods for molded underfills in flip chip packaging 有权
    倒装芯片封装中模制底层填料的设备和方法

    公开(公告)号:US09412717B2

    公开(公告)日:2016-08-09

    申请号:US13289719

    申请日:2011-11-04

    摘要: Methods and apparatus for a forming molded underfills. A method is disclosed including loading a flip chip substrate into a selected one of the upper mold chase and lower mold chase of a mold press at a first temperature; positioning a molded underfill material in the at least one of the upper and lower mold chases while maintaining the first temperature which is lower than a melting temperature of the molded underfill material; forming a sealed mold cavity and creating a vacuum in the mold cavity; raising the temperature of the molded underfill material to a second temperature greater than the melting point to cause the molded underfill material to flow over the flip chip substrate forming an underfill layer and forming an overmolded layer; and cooling the flip chip substrate to a third temperature substantially lower than the melting temperature of the molded underfill material. An apparatus is disclosed.

    摘要翻译: 用于成型模制底部填料的方法和装置。 公开了一种方法,其包括在第一温度下将倒装芯片衬底加载到模压机的上模追逐和下模追逐中的所选择的一个中; 将模制的底部填充材料定位在上模具和下模具中的至少一个中,同时保持低于模制的底部填充材料的熔融温度的第一温度; 形成密封的模腔并在模腔中产生真空; 将模制的底部填充材料的温度提高到大于熔点的第二温度,以使模制的底部填充材料在形成底部填充层的倒装芯片衬底上流动并形成包覆成型层; 并将所述倒装芯片基板冷却至基本上低于所述模制底部填充材料的熔融温度的第三温度。 公开了一种装置。