公开(公告)号：US20100289148A1

公开(公告)日：2010-11-18

申请号：US12843934

申请日：2010-07-27

申请人： Tasao SOGA ,  Daisuke Kawase ,  Kazuhiro Suzuki ,  Eiichi Morisaki ,  Katsuaki Saito ,  Hanae Shimokawa

发明人： Tasao SOGA ,  Daisuke Kawase ,  Kazuhiro Suzuki ,  Eiichi Morisaki ,  Katsuaki Saito ,  Hanae Shimokawa

IPC分类号： H01L23/15

CPC分类号： H01L23/24 ,  H01L23/3142 ,  H01L23/3185 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/0603 ,  H01L2224/26145 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48491 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/83951 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19107 ,  H01L2924/3511 ,  H01L2924/3651 ,  H05K1/0306 ,  H05K3/0061 ,  H05K3/284 ,  H05K3/341 ,  H05K3/3463 ,  H05K2201/10977 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/10155 ,  H01L2924/3512

摘要： Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.

摘要翻译： 由于环境问题，使用无铅焊料变得至关重要。 电源模块通过焊接大面积的基板形成。 已知在Sn-3Ag-0.5Cu中，相对于基板的翘曲变形很大而难以蠕变变形，相对于温度循环试验，寿命显着缩短，现有的模块结构在 难以确保高可靠性。 因此，本发明的目的是选择可以在低应变率下预期寿命增加的组合物。 在Sn焊料中，通过将In掺杂3〜7％，Ag增加2〜4.5％，发现在低应变速率下延迟裂纹扩展的效果，作为代表性组合物在高温下稳定，Sn-3Ag- 选择0.5Cu-5In。 此外，为了提高可靠性，示出了用树脂部分地涂覆焊料端部的方法。

公开(公告)号：US20100127046A1

公开(公告)日：2010-05-27

申请号：US12683633

申请日：2010-01-07

申请人： Vivek Mehrotra

发明人： Vivek Mehrotra

IPC分类号： B23K31/02 ,  H01L21/56

CPC分类号： H05K3/3463 ,  H01L23/3735 ,  H01L23/4924 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48739 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83455 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/15724 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3651 ,  H05K1/0306 ,  H05K2203/0278 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00012

摘要： A method of forming packages containing SiC or other semiconductor devices bonded to other components or conductive surfaces utilizing transient liquid phase (TLP) bonding to create high temperature melting point bonds using in situ formed ternary or quaternary mixtures of conductive metals and the devices created using TLP bonds of ternary or quaternary materials. The compositions meet the conflicting requirements of an interconnect or joint that can be exposed to high temperature, and is thermally and electrically conductive, void and creep resistant, corrosion resistant, and reliable upon temperature and power cycling.

摘要翻译： 一种形成包含SiC或其他半导体器件的封装的方法，其利用瞬态液相（TLP）接合结合到其它部件或导电表面，以使用导电金属的原位形成的三元或四元混合物和使用TLP产生的器件产生高温熔点键 三元或四元材料的键。 组合物满足互连或接头的相互冲突的要求，其可以暴露于高温下，并且在导热，导电，空隙和抗蠕变性，耐腐蚀性以及在温度和功率循环方面是可靠的。

公开(公告)号：US20100007012A1

公开(公告)日：2010-01-14

申请号：US12550327

申请日：2009-08-28

申请人： Peter C. Salmon

发明人： Peter C. Salmon

IPC分类号： H01L23/50 ,  H01L23/367

CPC分类号： H05K3/363 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/5386 ,  H01L23/5387 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/05573 ,  H01L2224/11332 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/81052 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3651 ,  H05K1/0289 ,  H05K1/115 ,  H05K3/007 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/4015 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0568 ,  Y02P70/613 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/05599

摘要： This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths as narrow as 5 microns or less. A glass panel manufacturing facility, similar to those employed for making liquid crystal display, LCD, panels is preferably used to fabricate the interconnection circuits. A multi-layer interconnection circuit is fabricated on the glass panel using a release layer. A special assembly layer is formed over the interconnection circuit comprising a thick dielectric layer with openings formed at input/output (I/O) pad locations. Solder paste is deposited in the openings using a squeegee to form wells filled with solder. IC chips are provided with gold stud bumps at I/O pad locations, and these bumps are inserted in the wells to form flip chip connections. The IC chips are tested and reworked. The same bump/well connections can be used to attach fine-pitch cables. Module packaging layers are provided for hermetic sealing and for electromagnetic shielding. A blade server or supercomputer embodiment is also described.

摘要翻译： 本说明书描述了用于制造电子系统模块的技术。 该模块包括具有窄至5微米或更小的迹线宽度的柔性多层互连电路。 与用于制造液晶显示器，LCD，面板的玻璃面板制造设备相似，优选地用于制造互连电路。 使用剥离层在玻璃面板上制造多层互连电路。 在互连电路上形成特殊的组装层，该电路包括在输入/输出（I / O）焊盘位置处形成有开口的厚电介质层。 使用刮刀将焊膏沉积在开口中以形成填充有焊料的孔。 IC芯片在I / O焊盘位置处设有金柱凸起，并且这些凸块插入孔中以形成倒装芯片连接。 IC芯片经过测试和返工。 相同的凹凸/连接可用于连接细间距电缆。 提供模块封装层用于密封和电磁屏蔽。 还描述了刀片服务器或超级计算机实施例。

公开(公告)号：US20080213996A1

公开(公告)日：2008-09-04

申请号：US11894627

申请日：2007-08-20

申请人： Valery M. Dubin ,  Sridhar Balakrishnan ,  Mark Bohr

发明人： Valery M. Dubin ,  Sridhar Balakrishnan ,  Mark Bohr

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L21/288 ,  H01L21/4853 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11614 ,  H01L2224/13026 ,  H01L2224/13084 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13166 ,  H01L2224/13564 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/29111 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/35121 ,  H01L2924/3651 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting layer may include a base layer metal. The base layer metal may include Cu. The exemplary implementation may also include a diffusion barrier in contact with the first conducting layer and a wetting layer on top of the diffusion barrier. A bump layer may reside on top of the wetting layer, in which the bump layer may include Sn, and Sn may be electroplated. The diffusion barrier may be electroless and may be adapted to prevent Cu and Sn from diffusing through the diffusion barrier. Furthermore, the diffusion barrier may be further adapted to suppress a whisker-type formation in the bump layer.

摘要翻译： 与模具包装相关的方法，技术和结构。 在一个示例性实施例中，管芯封装互连结构包括半导体衬底和与半导体衬底接触的第一导电层。 第一导电层可以包括基底层金属。 基底层金属可以包括Cu。 示例性实施方式还可以包括与第一导电层接触的扩散阻挡层和在扩散阻挡层顶部的润湿层。 凸起层可以驻留在润湿层的顶部，其中凸起层可以包括Sn，并且Sn可以被电镀。 扩散阻挡层可以是无电解的并且可以适于防止Cu和Sn扩散通过扩散阻挡层。 此外，扩散阻挡层可以进一步适于抑制凸块层中的晶须型形成。

公开(公告)号：US20080211104A1

公开(公告)日：2008-09-04

申请号：US12116916

申请日：2008-05-07

申请人： Vivek Mehrotra

发明人： Vivek Mehrotra

IPC分类号： H01L23/488 ,  H05K1/09

CPC分类号： H05K3/3463 ,  H01L23/3735 ,  H01L23/4924 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48739 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83455 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/15724 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3651 ,  H05K1/0306 ,  H05K2203/0278 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00012

摘要： A method of forming packages containing SiC or other semiconductor devices bonded to other components or conductive surfaces utilizing transient liquid phase (TLP) bonding to create high temperature melting point bonds using in situ formed ternary or quaternary mixtures of conductive metals and the devices created using TLP bonds of ternary or quaternary materials. The compositions meet the conflicting requirements of an interconnect or joint that can be exposed to high temperature, and is thermally and electrically conductive, void and creep resistant, corrosion resistant, and reliable upon temperature and power cycling.

摘要翻译： 一种形成包含SiC或其他半导体器件的封装的方法，其利用瞬态液相（TLP）接合结合到其它部件或导电表面，以使用导电金属的原位形成的三元或四元混合物和使用TLP产生的器件产生高温熔点键 三元或四元材料的键。 组合物满足互连或接头的相互冲突的要求，其可以暴露于高温下，并且在导热，导电，空隙和抗蠕变性，耐腐蚀性以及在温度和功率循环方面是可靠的。

公开(公告)号：US20080017987A1

公开(公告)日：2008-01-24

申请号：US11890965

申请日：2007-08-08

申请人： Sven Fuchs ,  Mark Pavier

发明人： Sven Fuchs ,  Mark Pavier

IPC分类号： H01L23/482

CPC分类号： H01L24/30 ,  H01L23/3107 ,  H01L23/498 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/2908 ,  H01L2224/29124 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/30505 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73153 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0483 ,  H01L2924/1203 ,  H01L2924/12042 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19043 ,  H01L2924/3651 ,  H01L2924/00

摘要： A semiconductor device that includes an electrode of one material and a conductive material of lower resistivity formed over the electrode and a process for fabricating the semiconductor device.

摘要翻译： 一种半导体器件，其包括在电极上形成的一种材料的电极和具有较低电阻率的导电材料，以及制造该半导体器件的工艺。

公开(公告)号：US07300819B2

公开(公告)日：2007-11-27

申请号：US11168549

申请日：2005-06-29

申请人： Takashi Noguchi

发明人： Takashi Noguchi

IPC分类号： H01L21/00

CPC分类号： H01L22/32 ,  H01L23/498 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/3651 ,  H05K3/225 ,  H05K3/3436 ,  H05K3/429 ,  H05K2201/0394 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09736 ,  H05K2201/10666 ,  H05K2203/0195 ,  Y02P70/613 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： A method for mounting a semiconductor device, which can decrease the occurrence rate of failures, a method for repairing a semiconductor device, which can easily repair defective solder joints, and a semiconductor device which makes those methods feasible.A substrate 1 has formed therein through-holes 7 lined on the internal walls with a wiring layer 9, and solder balls 6 are fusion-bonded to the substrate 1 in such a manner as to cover the through-holes 7. In the mounting process or in the repair process, heating probes 41 are passed through the through-holes 7 and thrust into the solder balls 6 to thereby melt the solder balls, and the heating probes are pulled out of the solder balls to let the solder balls cool down. In those processes, only the solder balls 6 can be heated, thereby averting adverse effects on the IC chip 3. In the repair process, the solder balls 6 can be restored to an initial condition free of intermetallic compounds.

摘要翻译： 一种可以降低故障发生率的半导体器件的安装方法，可以容易地修复有缺陷的焊点的半导体器件的修复方法以及使这些方法可行的半导体器件。 衬底1上形成有内衬在内壁上的布线层9的通孔7，并且焊球6以覆盖通孔7的方式熔合到衬底1上。 在安装过程或维修过程中，加热探针41穿过通孔7并推入焊球6，从而熔化焊球，并将加热探针从焊球中拉出，使焊料 球冷却下来。 在这些处理中，只能对焊球6进行加热，从而避免对IC芯片3的不利影响。 在修复过程中，焊球6可以恢复到没有金属间化合物的初始条件。

公开(公告)号：US07297572B2

公开(公告)日：2007-11-20

申请号：US10702235

申请日：2003-11-05

申请人： Peter C. Salmon

发明人： Peter C. Salmon

IPC分类号： H01I21/00

CPC分类号： H05K3/363 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/5386 ,  H01L23/5387 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/05573 ,  H01L2224/11332 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/81052 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3651 ,  H05K1/0289 ,  H05K1/115 ,  H05K3/007 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/4015 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0568 ,  Y02P70/613 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/05599

摘要： This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths as narrow as 5 microns or less. A glass panel manufacturing facility, similar to those employed for making liquid crystal display, LCD, panels is preferably used to fabricate the interconnection circuits. A multi-layer interconnection circuit is fabricated on the glass panel using a release layer. A special assembly layer is formed over the interconnection circuit comprising a thick dielectric layer with openings formed at input/output (I/O) pad locations. Solder paste is deposited in the openings using a squeegee to form wells filled with solder. IC chips are provided with gold stud bumps at I/O pad locations, and these bumps are inserted in the wells to form flip chip connections. The IC chips are tested and reworked. The same bump/well connections can be used to attach fine-pitch cables. Module packaging layers are provided for hermetic sealing and for electromagnetic shielding. A blade server or supercomputer embodiment is also described.

摘要翻译： 本说明书描述了用于制造电子系统模块的技术。 该模块包括具有窄至5微米或更小的迹线宽度的柔性多层互连电路。 与用于制造液晶显示器，LCD，面板的玻璃面板制造设备相似，优选地用于制造互连电路。 使用剥离层在玻璃面板上制造多层互连电路。 在互连电路上形成特殊的组装层，该电路包括在输入/输出（I / O）焊盘位置处形成有开口的厚电介质层。 使用刮刀将焊膏沉积在开口中以形成填充有焊料的孔。 IC芯片在I / O焊盘位置处设有金柱凸起，并且这些凸块插入孔中以形成倒装芯片连接。 IC芯片经过测试和返工。 相同的凹凸/连接可用于连接细间距电缆。 提供模块封装层用于密封和电磁屏蔽。 还描述了刀片服务器或超级计算机实施例。

公开(公告)号：US20070245554A1

公开(公告)日：2007-10-25

申请号：US11769321

申请日：2007-06-27

申请人： Peter Salmon

发明人： Peter Salmon

IPC分类号： H05K3/10

CPC分类号： H05K3/363 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/5386 ,  H01L23/5387 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/05573 ,  H01L2224/11332 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/81052 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3651 ,  H05K1/0289 ,  H05K1/115 ,  H05K3/007 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/4015 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0568 ,  Y02P70/613 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/05599

摘要： This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths as narrow as 5 microns or less. A glass panel manufacturing facility, similar to those employed for making liquid crystal display, LCD, panels is preferably used to fabricate the interconnection circuits. A multi-layer interconnection circuit is fabricated on the glass panel using a release layer. A special assembly layer is formed over the interconnection circuit comprising a thick dielectric layer with openings formed at input/output (I/O) pad locations. Solder paste is deposited in the openings using a squeegee to form wells filled with solder. IC chips are provided with gold stud bumps at I/O pad locations, and these bumps are inserted in the wells to form flip chip connections. The IC chips are tested and reworked. The same bump/well connections can be used to attach fine-pitch cables. Module packaging layers are provided for hermetic sealing and for electromagnetic shielding. A blade server or supercomputer embodiment is also described.

摘要翻译： 本说明书描述了用于制造电子系统模块的技术。 该模块包括具有窄至5微米或更小的迹线宽度的柔性多层互连电路。 与用于制造液晶显示器，LCD，面板的玻璃面板制造设备相似，优选地用于制造互连电路。 使用剥离层在玻璃面板上制造多层互连电路。 在互连电路上形成特殊的组装层，该电路包括在输入/输出（I / O）焊盘位置处形成有开口的厚电介质层。 使用刮刀将焊膏沉积在开口中以形成填充有焊料的孔。 IC芯片在I / O焊盘位置处设有金柱凸起，并且这些凸块插入孔中以形成倒装芯片连接。 IC芯片经过测试和返工。 相同的凹凸/连接可用于连接细间距电缆。 提供模块封装层用于密封和电磁屏蔽。 还描述了刀片服务器或超级计算机实施例。

公开(公告)号：US20070114352A1

公开(公告)日：2007-05-24

申请号：US11282967

申请日：2005-11-18

申请人： Erwin Victor R. Cruz ,  Elsie Cabahug ,  Ti Ching Shian ,  Venkat Iyer

发明人： Erwin Victor R. Cruz ,  Elsie Cabahug ,  Ti Ching Shian ,  Venkat Iyer

IPC分类号： A47G1/10

CPC分类号： H01L21/6835 ,  H01L21/561 ,  H01L21/568 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49562 ,  H01L24/33 ,  H01L24/37 ,  H01L24/39 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/73253 ,  H01L2224/83385 ,  H01L2224/83801 ,  H01L2224/8485 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12032 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3651 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A clip structure for a semiconductor package is disclosed. The clip structure includes a major portion, at least one pedestal extending from the major portion, a downset portion, and a lead portion. The downset portion is between the lead portion and the major portion. The clip structure can be used in a MLP (micro-leadframe package).

摘要翻译： 公开了一种用于半导体封装的夹子结构。 夹子结构包括主要部分，从主要部分延伸的至少一个基座，下降部分和引导部分。 凹陷部分在引导部分和主要部分之间。 夹子结构可用于MLP（微引线框封装）。