公开(公告)号：US08987879B2

公开(公告)日：2015-03-24

申请号：US13177110

申请日：2011-07-06

申请人： Ralf Otremba

发明人： Ralf Otremba

IPC分类号： H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L23/49562 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49524 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/34 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/2745 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/35831 ,  H01L2224/37011 ,  H01L2224/37147 ,  H01L2224/3716 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40247 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48599 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48671 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48771 ,  H01L2224/48799 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48869 ,  H01L2224/48871 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/77272 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/8382 ,  H01L2224/83986 ,  H01L2224/84801 ,  H01L2224/92147 ,  H01L2224/92157 ,  H01L2224/92165 ,  H01L2224/92166 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2224/27 ,  H01L2924/0105 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2224/85 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/01005

摘要： A semiconductor device includes a leadframe with a die pad and a first lead, a semiconductor chip with a first electrode, and a contact clip with a first contact area and a second contact area. The semiconductor chip is placed over the die pad. The first contact area is placed over the first lead and the second contact area is placed over the first electrode of the semiconductor chip. A plurality of protrusions extends from each of the first and second contact areas and each of the protrusions has a height of at least 5 μm.

摘要翻译： 半导体器件包括具有管芯焊盘和第一引线的引线框架，具有第一电极的半导体芯片以及具有第一接触区域和第二接触区域的接触夹。 将半导体芯片放置在管芯焊盘的上方。 第一接触区域放置在第一引线上，并且第二接触区域被放置在半导体芯片的第一电极之上。 多个突起从第一和第二接触区域中的每一个延伸，并且每个突起具有至少5μm的高度。

公开(公告)号：US08815649B2

公开(公告)日：2014-08-26

申请号：US13941629

申请日：2013-07-15

申请人： Alpha & Omega Semiconductor Incorporated

发明人： Jun Lu ,  Ming Sun ,  Yueh-Se Ho ,  Kai Liu ,  Lei Shi

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L21/56 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/37 ,  H01L24/38 ,  H01L24/40 ,  H01L24/41 ,  H01L24/83 ,  H01L24/84 ,  H01L24/97 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/371 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/40249 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/73263 ,  H01L2224/83 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/8485 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2224/84 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2924/00014

摘要： The present invention features a method for fabricating a lead-frame package, having a first, second, third and fourth electrically conductive structures with a pair of semiconductor dies disposed therebetween defining a stacked structure. The first and second structures are spaced-apart from and in superimposition with the first structure. A semiconductor die is disposed between the first and second structures. The semiconductor die has contacts electrically connected to the first and second structures. A part of the third structure lies in a common plane with a portion of the second structure. The third structure is coupled to the semiconductor die.

摘要翻译： 本发明的特征在于一种用于制造引线框架封装的方法，所述引线框封装具有第一，第二，第三和第四导电结构，其中设置在其间的一对半导体管芯限定堆叠结构。 第一和第二结构与第一结构隔开并与第一结构重叠。 半导体管芯设置在第一和第二结构之间。 半导体管芯具有电连接到第一和第二结构的触点。 第三结构的一部分位于具有第二结构的一部分的共同平面中。 第三结构耦合到半导体管芯。

公开(公告)号：US08723306B2

公开(公告)日：2014-05-13

申请号：US13811722

申请日：2011-07-25

申请人： Nobutake Tsuyuno ,  Hiroshi Hozoji ,  Toshiaki Ishii ,  Tokihito Suwa ,  Kinya Nakatsu ,  Takeshi Tokuyama ,  Junpei Kusukawa

发明人： Nobutake Tsuyuno ,  Hiroshi Hozoji ,  Toshiaki Ishii ,  Tokihito Suwa ,  Kinya Nakatsu ,  Takeshi Tokuyama ,  Junpei Kusukawa

IPC分类号： H01L23/495

CPC分类号： H01L23/49568 ,  B60L1/003 ,  B60L3/003 ,  B60L7/14 ,  B60L11/123 ,  B60L11/14 ,  B60L15/007 ,  B60L2210/40 ,  B60L2220/14 ,  B60L2240/12 ,  B60L2240/36 ,  B60L2240/525 ,  H01L21/56 ,  H01L21/565 ,  H01L23/473 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L25/072 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/33 ,  H01L2224/37011 ,  H01L2224/4007 ,  H01L2224/40137 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1203 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15151 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H02M7/003 ,  H05K7/20927 ,  Y02T10/6217 ,  Y02T10/645 ,  Y02T10/7077 ,  Y02T10/7241 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Heat radiation surfaces 7b and 8b of electrode lead frames 7 and 8 make thermal contact with heat radiation members 301 via insulation sheets 10 to dissipate heat from a power semiconductor element 5 to the heat radiation members (thick portions 301). Each of exposed areas of the heat radiation surfaces 7b and 8b and a surface 13b of a mold material (sealing material 13) adjacent to the exposed area produce an uneven step from which either one of the exposed area and the surface 13b adjacent to the exposed area projects. The step side surface formed between the convex surface and the concave surface of the uneven step has an inclined surface 7a or 13a so configured that an obtuse angle can be formed by the inclined surface and the convex surface and by the inclined surface and the concave surface for each.

摘要翻译： 电极引线框架7和8的散热表面7b和8b通过绝缘片10与热辐射部件301热接触，以将热量从功率半导体元件5散发到散热部件（厚部分301）。 辐射表面7b和8b的每个暴露区域和与暴露区域相邻的模具材料（密封材料13）的表面13b产生不均匀的步骤，露出区域和表面13b中的任一个与暴露的 区域项目。 在凹凸台面的凸面与凹面之间形成的台阶侧表面具有倾斜面7a，13a，该倾斜面7a，13a可以由倾斜面和凸面以及倾斜面和凹面形成钝角 为每一个。

公开(公告)号：US20130241047A1

公开(公告)日：2013-09-19

申请号：US13989932

申请日：2011-04-27

申请人： Katsuhiko Omae ,  Mamoru Watanabe ,  Tetsushi Watanabe ,  Yoshihito Asao

发明人： Katsuhiko Omae ,  Mamoru Watanabe ,  Tetsushi Watanabe ,  Yoshihito Asao

IPC分类号： H01L23/367

CPC分类号： H01L23/367 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L2224/29101 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/371 ,  H01L2224/3754 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40245 ,  H01L2224/73263 ,  H01L2224/8314 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84138 ,  H01L2224/84801 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A power semiconductor module includes: a plurality of first metal plates arranged in the same planar state; a power semiconductor chip mounted on the first metal plate; and an overbridge-shaped second metal plate which is composed of bridge frame sections and leg sections that support the bridge frame sections, the leg sections being for appropriately performing solder bonding between electrodes of the power semiconductor chips and between the electrode of the power semiconductor chip and the first metal plate, the power semiconductor module being configured by a resin package in which these members are sealed with electrically insulating resin. In the power semiconductor module, the solder bonding section of the leg section is formed in a planar shape by bending process and is provided at a position lower than the bridge frame section.

摘要翻译： 功率半导体模块包括：布置成相同平面状态的多个第一金属板; 安装在所述第一金属板上的功率半导体芯片; 以及跨桥状的第二金属板，其由支撑桥框架部的桥架部和支腿部构成，所述腿部用于适当地进行功率半导体芯片的电极之间和功率半导体芯片的电极之间的焊接 和第一金属板，功率半导体模块由树脂封装构成，其中这些构件用电绝缘树脂密封。 在功率半导体模块中，脚部的焊接部通过弯曲加工形成为平面状，并且设置在比桥框部低的位置。

公开(公告)号：US20130105985A1

公开(公告)日：2013-05-02

申请号：US13646074

申请日：2012-10-05

申请人： Junji TSURUOKA ,  Seiji YASUI ,  Osamu YAMATO ,  Takayuki MAEDA

发明人： Junji TSURUOKA ,  Seiji YASUI ,  Osamu YAMATO ,  Takayuki MAEDA

IPC分类号： H01L23/48

CPC分类号： B23K1/0016 ,  H01L23/36 ,  H01L23/492 ,  H01L24/37 ,  H01L24/40 ,  H01L25/072 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37011 ,  H01L2224/40095 ,  H01L2224/40101 ,  H01L2224/40139 ,  H01L2224/40151 ,  H01L2224/73263 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/37099

摘要： A semiconductor device includes a connection terminal. The connection terminal includes two legs bonded via a filler material to a bonding target object that is a substrate or one semiconductor element placed on the substrate; and a joining portion connected to the two legs, extending between the two legs, and separated from the bonding target object.

摘要翻译： 半导体器件包括连接端子。 连接端子包括通过填充材料连接到作为衬底的结合目标物体的两个腿或放置在衬底上的一个半导体元件; 以及连接到两个腿的连接部分，在两个腿之间延伸并且与结合目标物体分离。

公开(公告)号：US20130087826A1

公开(公告)日：2013-04-11

申请号：US13805666

申请日：2011-03-23

申请人： Jae Ku Kim

发明人： Jae Ku Kim

IPC分类号： H01L33/62 ,  H01L33/00

CPC分类号： H01L33/62 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49562 ,  H01L24/34 ,  H01L24/37 ,  H01L24/97 ,  H01L33/005 ,  H01L33/486 ,  H01L33/647 ,  H01L2224/37011 ,  H01L2224/37599 ,  H01L2224/84801 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1203 ,  H01L2924/12035 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01L2224/84 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

摘要： Disclosed is a diode package, wherein an upper lead wire and a lower lead wire are each formed in a long and flat plate and each have a first stage and a second stage, both stages being opposite from each other, the upper side of the diode chip is attached to the lower side of the first stage of the upper lead wire, the lower side of the diode chip is attached to the lower side of the first stage of the upper lead wire, and the second stage of the upper lead wire and the second stage of the lower lead wire are led out in the lateral direction of the molding compound. Furthermore, the first stage of the upper lead wire has a hemispherical contact groove which protrudes downward, and the hemispherical contact groove has a through hole in the center thereof.

摘要翻译： 公开了一种二极管封装，其中上引线和下引线各自形成在长平板中，并且每个具有第一级和第二级，两级彼此相对，二极管的上侧 芯片安装在上部引线的第一级的下侧，二极管芯片的下侧安装在上部引线的第一级的下侧，上部引线的第二级和 下引线的第二级在模塑料的横向被引出。 此外，上引线的第一级具有向下突出的半球形接触槽，并且半球形接触槽在其中心具有通孔。

公开(公告)号：US20130043576A1

公开(公告)日：2013-02-21

申请号：US13655446

申请日：2012-10-19

申请人： Renesas Electronics Corporation

发明人： Hiroyuki NAKAMURA ,  Atsushi FUJIKI ,  Tatsuhiro SEKI ,  Nobuya KOIKE ,  Yukihiro SATO ,  Kisho ASHIDA

IPC分类号： H01L23/495

CPC分类号： H01L27/07 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L29/66 ,  H01L2224/02166 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/371 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/40095 ,  H01L2224/40247 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/12036 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： To improve the performance and reliability of semiconductor devices. For the semiconductor chip CP1, power MOSFETs Q1 and Q2 for the switch, a diode DD1 for detecting the heat generation of the power MOSFET Q1, a diode DD2 for detecting the heat generation of the power MOSFET Q2, and plural pad electrodes PD are formed. The power MOSFET Q1 and the diode DD1 are arranged in a first MOSFET region RG1 on the side of a side SD1, and the power MOSFET Q2 and the diode DD2 are arranged in a second MOSFET region RG2 on the side of a side SD2. The diode DD1 is arranged along the side SD1, the diode DD2 is arranged along the side SD2, and all pad electrodes PD other than the pad electrodes PDS1 and PDS2 for the source are arranged along a side SD3 between the diodes DD1 and DD2.

摘要翻译： 提高半导体器件的性能和可靠性。 对于半导体芯片CP1，用于开关的功率MOSFET Q1和Q2，用于检测功率MOSFET Q1的发热的二极管DD1，用于检测功率MOSFET Q2的发热的二极管DD2和多个焊盘电极PD 。 功率MOSFET Q1和二极管DD1布置在侧面SD1侧的第一MOSFET区域RG1中，功率MOSFET Q2和二极管DD2布置在侧面SD2侧的第二MOSFET区RG2中。 二极管DD1沿着侧面SD1配置，二极管DD2沿着侧面SD2配置，除了用于源极的焊盘电极PDS1和PDS2以外的所有焊盘电极PD沿着二极管DD1和DD2之间的侧面SD3排列。

公开(公告)号：US20120187562A1

公开(公告)日：2012-07-26

申请号：US13436039

申请日：2012-03-30

申请人： Takashi Hisada ,  Katsuyuki Yonehara

发明人： Takashi Hisada ,  Katsuyuki Yonehara

IPC分类号： H01L23/498

CPC分类号： H01L23/49833 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/34 ,  H01L24/36 ,  H01L24/37 ,  H01L24/39 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/91 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05644 ,  H01L2224/06136 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/3754 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48644 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/838 ,  H01L2224/84203 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/85191 ,  H01L2224/92247 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

摘要： A semiconductor package includes a wiring substrate, a semiconductor chip, and a conductor plate in order to reduce a voltage drop at the central portion of a chip caused by wiring resistance from a peripheral connection pad disposed on the periphery of the chip. Central electrode pads for use in ground/power-supply are disposed on the central portion of the chip. The conductor plate for use in ground/power-supply is disposed on the chip such that an insulating layer is disposed therebetween. The central electrode pads on the chip and the conductor plate are connected together by wire bonding through an opening formed in the insulating layer and the conductor plate. An extraction portion of the conductor plate is connected to a power-supply wiring pad on the wiring substrate. Preferably, the conductor plate is composed of a multilayer structure, and each conductor plate is used in power-supply wiring or ground wiring.

摘要翻译： 半导体封装包括布线基板，半导体芯片和导体板，以便减少由设置在芯片周围的外围连接焊盘引起的布线电阻引起的芯片中心部分的电压降。 用于接地/供电的中央电极焊盘设置在芯片的中心部分。 用于接地/供电的导体板设置在芯片上，使得绝缘层位于它们之间。 芯片和导体板上的中心电极焊盘通过形成在绝缘层和导体板中的开口进行引线接合而连接在一起。 导体板的提取部分连接到布线基板上的电源布线焊盘。 优选地，导体板由多层结构构成，并且每个导体板用于电源布线或接地布线。

公开(公告)号：US08183662B2

公开(公告)日：2012-05-22

申请号：US13273546

申请日：2011-10-14

申请人： François Hébert ,  Kai Liu

发明人： François Hébert ,  Kai Liu

IPC分类号： H01L21/70 ,  H01L21/00

CPC分类号： H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49589 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L2224/37011 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099 ,  H01L2224/84

摘要： A top-side cooled compact semiconductor package with integrated bypass capacitor is disclosed. The top-side cooled compact semiconductor package includes a circuit substrate with terminal leads, numerous semiconductor dies bonded atop the circuit substrate, numerous elevation-adaptive interconnection plates for bonding and interconnecting top contact areas of the semiconductor dies with the circuit substrate, a first member of the elevation-adaptive interconnection plates has a first flat-top area and a second member of the elevation-adaptive interconnection plates has a second flat-top area in level with the first flat-top area, a bypass capacitor, having two capacitor terminals located at its ends, stacked atop the two interconnection plate members while being bonded thereto via the first flat-top area and the second flat-top area for a reduced interconnection parasitic impedance.

摘要翻译： 公开了具有集成旁路电容器的顶侧冷却紧凑型半导体封装。 顶侧冷却的紧凑型半导体封装包括具有端子引线的电路基板，接合在电路基板顶上的多个半导体管芯，用于将半导体管芯的顶部接触区域与电路基板接合和互连的许多仰角自适应互连板，第一构件 所述高度自适应互连板具有第一平顶区域，并且所述仰角自适应互连板的第二构件具有与所述第一平顶区域平齐的第二平顶区域，具有两个电容器端子的旁路电容器 位于其端部，并且通过第一平顶部区域和第二平顶部区域结合到两个互连板构件的顶部，以减少互连寄生阻抗。

公开(公告)号：US20120015483A1

公开(公告)日：2012-01-19

申请号：US13244375

申请日：2011-09-24

申请人： Juan Alejandro HERBSOMMER ,  Jonathon A. NOQUIL ,  Osvaldo J. LOPEZ

发明人： Juan Alejandro HERBSOMMER ,  Jonathon A. NOQUIL ,  Osvaldo J. LOPEZ

IPC分类号： H01L21/782

CPC分类号： H01L23/4334 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37147 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00012

摘要： A semiconductor die package includes: an assembly including a semiconductor die, a clip structure attached to an upper surface of the semiconductor die, and a heat sink attached to an upper surface of the clip structure; and a molding material partially encapsulating the assembly, wherein an upper surface of the heat sink is exposed through the molding material.

摘要翻译： 半导体管芯封装包括：包括半导体管芯，附接到半导体管芯的上表面的夹结构和附接到夹结构的上表面的散热器的组件; 以及部分地封装所述组件的模制材料，其中所述散热器的上表面通过所述模制材料暴露。