公开(公告)号：US08288201B2

公开(公告)日：2012-10-16

申请号：US12868334

申请日：2010-08-25

申请人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

发明人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC分类号： H01L21/44 ,  H01L21/50

CPC分类号： H01L21/561 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06181 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16265 ,  H01L2224/48227 ,  H01L2224/73209 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor die has first and second discrete semiconductor components mounted over a plurality of wettable contact pads formed on a carrier. Conductive pillars are formed over the wettable contact pads. A semiconductor die is mounted to the conductive pillars over the first discrete components. The conductive pillars provide vertical stand-off of the semiconductor die as headroom for the first discrete components. The second discrete components are disposed outside a footprint of the semiconductor die. Conductive TSV can be formed through the semiconductor die. An encapsulant is deposited over the semiconductor die and first and second discrete components. The wettable contact pads reduce die and discrete component shifting during encapsulation. A portion of a back surface of the semiconductor die is removed to reduce package thickness. An interconnect structure is formed over the encapsulant and semiconductor die. Third discrete semiconductor components can be mounted over the semiconductor die.

摘要翻译： 半导体管芯具有安装在形成在载体上的多个可湿性接触焊盘上的第一和第二分立半导体部件。 导电柱形成在可湿性接触垫上。 半导体管芯通过第一分立元件安装到导电柱上。 导电柱提供半导体管芯的垂直间隔作为第一分立元件的余量。 第二分立元件设置在半导体管芯的占位面之外。 可以通过半导体管芯形成导电TSV。 密封剂沉积在半导体管芯和第一和第二分立元件上。 可湿式接触垫在封装期间减少管芯和分立元件的移动。 去除半导体管芯的后表面的一部分以减小封装厚度。 在密封剂和半导体管芯上形成互连结构。 第三分立半导体部件可以安装在半导体管芯上。

公开(公告)号：US20120248596A1

公开(公告)日：2012-10-04

申请号：US13492687

申请日：2012-06-08

申请人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

发明人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC分类号： H01L23/36 ,  H01L21/56 ,  H01L21/60

CPC分类号： H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L23/552 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/48 ,  H01L24/97 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/21 ,  H01L2224/2105 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/24195 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/0203 ,  H05K1/186 ,  H05K2201/09772 ,  H01L2924/01014 ,  H01L2924/05432 ,  H01L2924/0542 ,  H01L2924/0503 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a thermally conductive layer with a plurality of openings formed over a temporary carrier. The thermally conductive layer includes electrically non-conductive material. A semiconductor die has a plurality of bumps formed over contact pads on the die. The semiconductor die is mounted over the thermally conductive layer so that the bumps are disposed at least partially within the openings in the thermally conductive layer. An encapsulant is deposited over the die and thermally conductive layer. The temporary carrier is removed to expose the bumps. A first interconnect structure is formed over the encapsulant, semiconductor die, and bumps. The bumps are electrically connected to the first interconnect structure. A heat sink or shielding layer can be formed over the semiconductor die. A second interconnect structure can be formed over the encapsulant and electrically connected to the first interconnect structure through conductive vias formed in the encapsulant.

摘要翻译： 半导体器件具有形成在临时载体上的多个开口的导热层。 导热层包括非导电材料。 半导体管芯具有形成在管芯上的接触焊盘上的多个凸块。 半导体管芯安装在导热层上，使得凸块至少部分地设置在导热层的开口内。 密封剂沉积在管芯和导热层上。 移除临时载体以暴露凸块。 在密封剂，半导体管芯和凸块之上形成第一互连结构。 凸块电连接到第一互连结构。 可以在半导体管芯上形成散热器或屏蔽层。 第二互连结构可以形成在密封剂之上并且通过形成在密封剂中的导电通孔电连接到第一互连结构。

公开(公告)号：US20120205813A1

公开(公告)日：2012-08-16

申请号：US13456145

申请日：2012-04-25

申请人： Yaojian Lin ,  Pandi Chelvam Marimuthu

发明人： Yaojian Lin ,  Pandi Chelvam Marimuthu

IPC分类号： H01L23/488 ,  H01L21/768

CPC分类号： H01L23/525 ,  H01L23/5227 ,  H01L23/53223 ,  H01L23/53238 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05181 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

摘要： An integrated circuit package system including: providing an integrated circuit die, forming a first layer over the integrated circuit die, forming a bridge on and in the first layer, forming a second layer on the first layer, and forming bump pads on and in the second layer, the bump pads connected to ends of the bridge.

摘要翻译： 一种集成电路封装系统，包括：提供集成电路管芯，在所述集成电路管芯上形成第一层，在所述第一层上并在所述第一层中形成桥，在所述第一层上形成第二层，以及在所述第一层上形成凸块 第二层，凸块连接到桥的端部。

公开(公告)号：US20120199965A1

公开(公告)日：2012-08-09

申请号：US13446664

申请日：2012-04-13

申请人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang ,  Xia Feng

发明人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang ,  Xia Feng

IPC分类号： H01L23/48

CPC分类号： H01L23/5389 ,  H01L21/31051 ,  H01L21/56 ,  H01L21/568 ,  H01L21/768 ,  H01L21/76802 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/49816 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2224/03

摘要： A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the semiconductor wafer. A protective layer is formed over the insulating layer including an edge of the semiconductor die along the saw street. The protective layer covers an entire surface of the semiconductor wafer. Alternatively, an opening is formed in the protective layer over the saw street. The insulating layer has a non-planar surface and the protective layer has a planar surface. The semiconductor wafer is singulated through the protective layer and saw street to separate the semiconductor die while protecting the edge of the semiconductor die. Leading with the protective layer, the semiconductor die is mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier and protective layer are removed. A build-up interconnect structure is formed over the semiconductor die and encapsulant.

摘要翻译： 半导体晶片包含由锯条分隔开的多个半导体管芯。 在半导体晶片上形成绝缘层。 在绝缘层上形成保护层，该保护层包括沿着锯条的半导体管芯的边缘。 保护层覆盖半导体晶片的整个表面。 或者，在锯路上的保护层中形成开口。 绝缘层具有非平面表面，保护层具有平坦表面。 通过保护层和锯条将半导体晶片分离，以分离半导体管芯，同时保护半导体管芯的边缘。 与保护层一起，将半导体管芯安装到载体上。 密封剂沉积在半导体管芯和载体上。 去除载体和保护层。 在半导体管芯和密封剂上形成积层互连结构。

公开(公告)号：US20120175784A1

公开(公告)日：2012-07-12

申请号：US13424484

申请日：2012-03-20

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L23/538

CPC分类号： H01L23/147 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  Y10S438/977 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via.

摘要翻译： 半导体器件由通过衬底的顶侧形成的导电通孔制成。 导电通孔垂直延伸穿过小于衬底的厚度。 集成无源器件（IPD）形成在衬底上。 在第一IPD上形成多个第一导电柱。 第一半导体管芯安装在衬底上。 围绕第一导电柱和第一半导体管芯形成密封剂。 在密封剂上形成第二个IPD。 在第二IPD上形成互连结构。 互连结构作为散热器工作。 去除衬底的背面的一部分以露出第一导电通孔。 第二半导体管芯安装到衬底的背面。 第二半导体管芯通过导电通孔电连接到第一IPD和第一半导体管芯。

公开(公告)号：US20120175732A1

公开(公告)日：2012-07-12

申请号：US13423739

申请日：2012-03-19

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L27/06 ,  H01L21/56

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes an IPD structure, a first semiconductor die mounted to the IPD structure with a flipchip interconnect, and a plurality of first conductive posts that are disposed adjacent to the first semiconductor die. The semiconductor device further includes a first molding compound that is disposed over the first conductive posts and first semiconductor die, a core structure bonded to the first conductive posts over the first semiconductor die, and a plurality of conductive TSVs disposed in the core structure. The semiconductor device further includes a plurality of second conductive posts that are disposed over the core structure, a second semiconductor die mounted over the core structure, and a second molding compound disposed over the second conductive posts and the second semiconductor die. The second semiconductor die is electrically connected to the core structure.

摘要翻译： 半导体器件包括IPD结构，安装到具有倒装芯片互连的IPD结构的第一半导体管芯和与第一半导体管芯相邻设置的多个第一导电柱。 半导体器件还包括设置在第一导电柱和第一半导体管芯之上的第一模塑料，与第一半导体管芯上的第一导电柱结合的芯结构以及设置在芯结构中的多个导电TSV。 半导体器件还包括设置在芯结构上的多个第二导电柱，安装在芯结构上的第二半导体管芯，以及设置在第二导电柱和第二半导体管芯上的第二模塑料。 第二半导体管芯与芯结构电连接。

公开(公告)号：US20120168963A1

公开(公告)日：2012-07-05

申请号：US13421770

申请日：2012-03-15

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L23/48 ,  H01L21/50 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5389 ,  H01L23/642 ,  H01L24/24 ,  H01L24/48 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/6677 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes conductive pillars disposed vertically over a seed layer, a conformal insulating layer formed over the conductive pillars, and a conformal conductive layer formed over the conformal insulating layer. A first conductive pillar, the conformal insulating layer, and the conformal conductive layer constitute a vertically oriented integrated capacitor. The semiconductor device further includes a semiconductor die or component mounted over the seed layer, an encapsulant deposited over the semiconductor die or component and around the conformal conductive layer, and a first interconnect structure formed over a first side of the encapsulant. The first interconnect structure is electrically connected to a second conductive pillar, and includes an integrated passive device. The semiconductor device further includes a second interconnect structure formed over a second side of the encapsulant opposite the first side of the encapsulant.

摘要翻译： 半导体器件包括垂直设置在种子层上的导电柱，形成在导电柱上的保形绝缘层，以及形成在保形绝缘层上的共形导电层。 第一导电柱，保形绝缘层和共形导电层构成垂直取向的集成电容器。 半导体器件还包括安装在种子层上的半导体管芯或部件，沉积在半导体管芯或部件上并围绕保形导电层的密封剂，以及形成在密封剂的第一侧上的第一互连结构。 第一互连结构电连接到第二导电柱，并且包括集成的无源器件。 所述半导体器件还包括形成在所述密封剂的与密封剂的第一侧相对的第二侧上的第二互连结构。

公开(公告)号：US20120146236A1

公开(公告)日：2012-06-14

申请号：US12964823

申请日：2010-12-10

申请人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang

发明人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang

IPC分类号： H01L23/52 ,  H01L21/52 ,  H01L21/56

CPC分类号： H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/2101 ,  H01L2224/215 ,  H01L2224/221 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device has a semiconductor die mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is removed. A first insulating layer is formed over a portion of the encapsulant within an interconnect site outside a footprint of the semiconductor die. An opening is formed through the first insulating layer within the interconnect site to expose the encapsulant. The opening can be ring-shaped or vias around the interconnect site and within a central region of the interconnect site to expose the encapsulant. A first conductive layer is formed over the first insulating layer to follow a contour of the first insulating layer. A second conductive layer is formed over the first conductive layer and exposed encapsulant. A second insulating layer is formed over the second conductive layer. A bump is formed over the second conductive layer in the interconnect site.

摘要翻译： 半导体器件具有安装到载体上的半导体管芯。 密封剂沉积在半导体管芯和载体上。 载体被移除。 第一绝缘层形成在半导体管芯的覆盖区之外的互连部位内的密封剂的一部分上。 通过互连部位内的第一绝缘层形成开口以露出密封剂。 开口可以是互连位置周围的环形或通孔，并且在互连位置的中心区域内以露出密封剂。 在第一绝缘层上形成第一导电层以遵循第一绝缘层的轮廓。 在第一导电层和暴露的密封剂上形成第二导电层。 第二绝缘层形成在第二导电层上。 在互连部位的第二导电层上形成凸点。

公开(公告)号：US20120126369A1

公开(公告)日：2012-05-24

申请号：US13365097

申请日：2012-02-02

申请人： Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Robert C. Frye

发明人： Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Robert C. Frye

IPC分类号： H01L27/06 ,  H01L21/02

CPC分类号： H01L27/0794 ,  H01G4/228 ,  H01G4/33 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L27/016 ,  H01L28/40 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/73207 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2224/05552

摘要： A flip chip semiconductor device has a substrate with a plurality of active devices formed thereon. A passive device is formed on the substrate by depositing a first conductive layer over the substrate, depositing an insulating layer over the first conductive layer, and depositing a second conductive layer over the insulating layer. The passive device is a metal-insulator-metal capacitor. The deposition of the insulating layer and first and second conductive layers is performed without photolithography. An under bump metallization (UBM) layer is formed on the substrate in electrical contact with the plurality of active devices. A solder bump is formed over the UBM layer. The passive device can also be a resistor by depositing a resistive layer over the first conductive layer and depositing a third conductive layer over the resistive layer. The passive device electrically contacts the solder bump.

摘要翻译： 倒装芯片半导体器件具有在其上形成有多个有源器件的衬底。 通过在衬底上沉积第一导电层，在第一导电层上沉积绝缘层，以及在绝缘层上沉积第二导电层，在衬底上形成无源器件。 无源器件是金属 - 绝缘体 - 金属电容器。 绝缘层和第一和第二导电层的沉积在没有光刻的情况下进行。 在与多个有源器件电接触的衬底上形成凸块下金属化（UBM）层。 在UBM层上形成焊料凸块。 无源器件还可以是通过在第一导电层上沉积电阻层并在电阻层上沉积第三导电层的电阻器。 无源器件与焊料凸块电接触。

公开(公告)号：US08183095B2

公开(公告)日：2012-05-22

申请号：US13029936

申请日：2011-02-17

申请人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang ,  Xia Feng

发明人： Yaojian Lin ,  Kang Chen ,  Jianmin Fang ,  Xia Feng

IPC分类号： H01L21/00

CPC分类号： H01L23/5389 ,  H01L21/31051 ,  H01L21/56 ,  H01L21/568 ,  H01L21/768 ,  H01L21/76802 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/49816 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2224/03

摘要： A semiconductor wafer contains a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the semiconductor wafer. A protective layer is formed over the insulating layer including an edge of the semiconductor die along the saw street. The protective layer covers an entire surface of the semiconductor wafer. Alternatively, an opening is formed in the protective layer over the saw street. The insulating layer has a non-planar surface and the protective layer has a planar surface. The semiconductor wafer is singulated through the protective layer and saw street to separate the semiconductor die while protecting the edge of the semiconductor die. Leading with the protective layer, the semiconductor die is mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier and protective layer are removed. A build-up interconnect structure is formed over the semiconductor die and encapsulant.

摘要翻译： 半导体晶片包含由锯条分隔开的多个半导体管芯。 在半导体晶片上形成绝缘层。 在绝缘层上形成保护层，该保护层包括沿着锯条的半导体管芯的边缘。 保护层覆盖半导体晶片的整个表面。 或者，在锯路上的保护层中形成开口。 绝缘层具有非平面表面，保护层具有平坦表面。 通过保护层和锯条将半导体晶片分离，以分离半导体管芯，同时保护半导体管芯的边缘。 与保护层一起，将半导体管芯安装到载体上。 密封剂沉积在半导体管芯和载体上。 去除载体和保护层。 在半导体管芯和密封剂上形成积层互连结构。