公开(公告)号：US08765497B2

公开(公告)日：2014-07-01

申请号：US13225113

申请日：2011-09-02

申请人： Hao-Juin Liu ,  Chita Chuang ,  Ching-Wen Hsiao ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Chih-Hua Chen

发明人： Hao-Juin Liu ,  Chita Chuang ,  Ching-Wen Hsiao ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Chih-Hua Chen

IPC分类号： H01L21/66 ,  H01L23/00 ,  H01L23/48

CPC分类号： H01L22/20 ,  H01L22/14 ,  H01L23/3128 ,  H01L23/48 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method includes placing a plurality of bottom units onto a jig, wherein the plurality of bottom units is not sawed apart and forms an integrated component. Each of the plurality of bottom units includes a package substrate and a die bonded to the package substrate. A plurality of upper component stacks is placed onto the plurality of bottom units, wherein solder balls are located between the plurality of upper component and the plurality of bottom units. A reflow is performed to join the plurality of upper component stacks with respective ones of the plurality of bottom units through the solder balls.

摘要翻译： 一种方法包括将多个底部单元放置在夹具上，其中多个底部单元没有锯切并形成一个集成部件。 多个底部单元中的每一个包括封装基板和结合到封装基板的管芯。 多个上部组件堆放在多个底部单元上，其中焊球位于多个上部组件和多个底部单元之间。 执行回流以通过焊球将多个上部部件堆叠与多个底部单元中的相应的底部单元接合。

公开(公告)号：US08598030B2

公开(公告)日：2013-12-03

申请号：US12855360

申请日：2010-08-12

申请人： Chen-Cheng Kuo ,  Chen-Shien Chen

发明人： Chen-Cheng Kuo ,  Chen-Shien Chen

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/11849 ,  H01L2224/11902 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

摘要： A process for making a copper post with footing profile employs dual photoresist films of different photosensitivities and thicknesses on an under-bump-metallurgy (UBM) layer. After an exposure lithography process, a first opening with a substantially vertical sidewall is formed in a first photoresist film, and a second opening with a sloped sidewall is formed in a second photoresist film. The second opening has a top diameter and a bottom diameter greater than the top diameter, and the bottom diameter is greater than the diameter of the first opening. A conductive layer is then formed in the first opening and the second opening followed by removing the dual photoresist films.

摘要翻译： 用于制造具有基脚轮廓的铜柱的方法使用在凸块下 - 冶金（UBM）层上具有不同光敏度和厚度的双光致抗蚀剂膜。 在曝光光刻工艺之后，在第一光致抗蚀剂膜中形成具有基本上垂直的侧壁的第一开口，并且在第二光致抗蚀剂膜中形成具有倾斜侧壁的第二开口。 第二开口具有大于顶部直径的顶部直径和底部直径，并且底部直径大于第一开口的直径。 然后在第一开口和第二开口中形成导电层，随后除去双光致抗蚀剂膜。

公开(公告)号：US20130134563A1

公开(公告)日：2013-05-30

申请号：US13308249

申请日：2011-11-30

申请人： Yao-Chun Chuang ,  Chang-Chia Huang ,  Tsung-Shu Lin ,  Chen-Cheng Kuo ,  Chen-Shien Chen

发明人： Yao-Chun Chuang ,  Chang-Chia Huang ,  Tsung-Shu Lin ,  Chen-Cheng Kuo ,  Chen-Shien Chen

IPC分类号： H01L23/58 ,  H01L21/28 ,  H01L23/48

CPC分类号： H01L24/11 ,  H01L23/293 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05022 ,  H01L2224/05086 ,  H01L2224/05091 ,  H01L2224/05124 ,  H01L2224/05541 ,  H01L2224/05572 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/206 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/05552

摘要： A structure comprises a top metal connector formed underneath a bond pad. The bond pad is enclosed by a first passivation layer and a second passivation layer. A polymer layer is further formed on the second passivation layer. The dimension of an opening in the first passivation layer is less than the dimension of the top metal connector. The dimension of the top metal connector is less than the dimensions of an opening in the second passivation layer and an opening in the polymer layer.

摘要翻译： 结构包括形成在接合焊盘下方的顶部金属连接器。 接合焊盘由第一钝化层和第二钝化层包围。 聚合物层进一步形成在第二钝化层上。 第一钝化层中的开口的尺寸小于顶部金属连接器的尺寸。 顶部金属连接器的尺寸小于第二钝化层中的开口的尺寸和聚合物层中的开口的尺寸。

公开(公告)号：US20130093075A1

公开(公告)日：2013-04-18

申请号：US13271766

申请日：2011-10-12

申请人： Hao-Juin Liu ,  Chita Chuang ,  Chen-Cheng Kuo ,  Chen-Shien Chen

发明人： Hao-Juin Liu ,  Chita Chuang ,  Chen-Cheng Kuo ,  Chen-Shien Chen

IPC分类号： H01L23/34 ,  H01L21/58

CPC分类号： H01L23/3114 ,  H01L21/563 ,  H01L23/3142 ,  H01L23/36 ,  H01L23/42 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/83191 ,  H01L2224/83385 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/27 ,  H01L2924/0665 ,  H01L2924/01047 ,  H01L2924/01029

摘要： An embodiment is a structure. The structure comprises a substrate, a chip, and a reinforcement component. The substrate has a first surface, and the first surface comprises depressions. The chip is over and attached to the first surface of the substrate. The reinforcement component is over a first area of the first surface of the substrate. The first area is not under the chip. The reinforcement component has a portion disposed in at least some of the depressions in the first area.

摘要翻译： 一个实施例是一种结构。 该结构包括基底，芯片和增强部件。 衬底具有第一表面，并且第一表面包括凹陷。 芯片结束并附着到基板的第一表面。 加强部件在基板的第一表面的第一区域之上。 第一个区域不在芯片之下。 加强部件具有设置在第一区域中的至少一些凹部中的部分。

公开(公告)号：US08227924B2

公开(公告)日：2012-07-24

申请号：US12835458

申请日：2010-07-13

申请人： Cheng Hung Shen ,  Tin-Hao Kuo ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Yao-Chun Chuang

发明人： Cheng Hung Shen ,  Tin-Hao Kuo ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Yao-Chun Chuang

IPC分类号： H01L23/48

CPC分类号： H01L23/3171 ,  H01L23/3192 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14179 ,  H01L2224/14515 ,  H01L2224/14517 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/17517 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83193 ,  H01L2225/06513 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/01007 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Substrate stand-offs for use with semiconductor devices are provided. Active pillars and dummy pillars are formed on a first substrate such that the dummy pillars may have a height greater than a height of the active pillars. The dummy pillars act as stand-offs when joining the first substrate to a second substrate, thereby creating greater uniformity. In an embodiment, the dummy pillars may be formed simultaneously as the active pillars by forming a patterned mask having openings with a smaller width for the dummy pillars than for the active pillars. When an electro-plating process of the like is used to form the dummy and active pillars, the smaller width of the dummy pillar openings in the patterned mask causes the dummy pillars to have a greater height than the active pillars.

摘要翻译： 提供了与半导体器件一起使用的衬底对位。 活动柱和虚拟柱形成在第一基板上，使得虚拟柱可具有高于活动柱的高度的高度。 当将第一衬底连接到第二衬底时，虚拟柱作为支座，从而产生更大的均匀性。 在一个实施例中，虚拟柱可以通过形成具有用于虚拟柱的较小宽度的开口的图案化掩模而不是活性柱而同时形成为活性柱。 当使用电镀方法形成虚拟和活动柱时，图案化掩模中的虚拟柱形开口的较小宽度使虚拟柱具有比活动柱更大的高度。

公开(公告)号：US08202800B2

公开(公告)日：2012-06-19

申请号：US13112347

申请日：2011-05-20

申请人： Chih-Hua Chen ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Wen-Wei Shen

发明人： Chih-Hua Chen ,  Chen-Shien Chen ,  Chen-Cheng Kuo ,  Wen-Wei Shen

IPC分类号： H01L21/44

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a through silicon via (TSV) structure includes forming an interconnect pad over a substrate. An under layer is formed over the interconnect pad. A vertical conductive post is formed at least partially through the substrate. At least one dummy structure is formed at least partially through the under layer. A top pad is formed over the dummy structure and the vertical conductive post. The top pad covers a wider area than a cross section of the vertical conductive post. The interconnect pad is electrically connected to the top pad. The dummy structure connects the top pad and the under layer thereby fastening the top pad and the interconnect pad.

摘要翻译： 形成贯穿硅通孔（TSV）结构的方法包括在衬底上形成互连焊盘。 在互连焊盘上形成下层。 至少部分地穿过衬底形成垂直导电柱。 至少部分地通过底层形成至少一个虚拟结构。 顶部衬垫形成在虚拟结构和垂直导电柱上。 顶部焊盘覆盖比垂直导电柱的横截面更宽的区域。 互连焊盘电连接到顶部焊盘。 虚拟结构连接顶部焊盘和下层，从而紧固顶部焊盘和互连焊盘。

公开(公告)号：US20120012985A1

公开(公告)日：2012-01-19

申请号：US12835458

申请日：2010-07-13

申请人： Cheng Hung Shen ,  Tin-Hao Kuo ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Yao-Chun Chuang

发明人： Cheng Hung Shen ,  Tin-Hao Kuo ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Yao-Chun Chuang

IPC分类号： H01L29/30 ,  H01L21/30

CPC分类号： H01L23/3171 ,  H01L23/3192 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14179 ,  H01L2224/14515 ,  H01L2224/14517 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/17517 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83193 ,  H01L2225/06513 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/01007 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Substrate stand-offs for use with semiconductor devices are provided. Active pillars and dummy pillars are formed on a first substrate such that the dummy pillars may have a height greater than a height of the active pillars. The dummy pillars act as stand-offs when joining the first substrate to a second substrate, thereby creating greater uniformity. In an embodiment, the dummy pillars may be formed simultaneously as the active pillars by forming a patterned mask having openings with a smaller width for the dummy pillars than for the active pillars. When an electro-plating process of the like is used to form the dummy and active pillars, the smaller width of the dummy pillar openings in the patterned mask causes the dummy pillars to have a greater height than the active pillars.

摘要翻译： 提供了与半导体器件一起使用的衬底对位。 活动柱和虚拟柱形成在第一基板上，使得虚拟柱可具有高于活动柱的高度的高度。 当将第一衬底连接到第二衬底时，虚拟柱作为支座，从而产生更大的均匀性。 在一个实施例中，虚拟柱可以通过形成具有用于虚拟柱的较小宽度的开口的图案化掩模而不是活性柱而同时形成为活性柱。 当使用电镀方法形成虚拟和活动柱时，图案化掩模中的虚拟柱形开口的较小宽度使虚拟柱具有比活动柱更大的高度。

公开(公告)号：US20110285013A1

公开(公告)日：2011-11-24

申请号：US12784335

申请日：2010-05-20

申请人： Yao-Chun Chuang ,  Chen-Cheng Kuo ,  Chen-Shien Chen

发明人： Yao-Chun Chuang ,  Chen-Cheng Kuo ,  Chen-Shien Chen

IPC分类号： H01L23/488

CPC分类号： H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/1146 ,  H01L2224/11464 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/13005 ,  H01L2224/13022 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13575 ,  H01L2224/13611 ,  H01L2224/13616 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/1601 ,  H01L2224/16111 ,  H01L2224/16112 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16507 ,  H01L2224/81138 ,  H01L2224/81193 ,  H01L2924/00011 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/3841 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/81805 ,  H01L2924/206

摘要： A device includes a first work piece bonded to a second work piece. The first work piece includes a solder resist at a surface of the first work piece, wherein the solder resist includes a solder resist opening, and a bond pad in the solder resist opening. The second work piece includes a non-reflowable metal bump at a surface of the second work piece. A solder bump bonds the non-reflowable metal bump to the bond pad, with at least a portion of the solder bump located in the solder resist opening and adjoining the non-reflowable metal bump and the bond pad. A thickness of the solder resist is greater than about 50 percent a height of the solder bump, wherein the height equals a distance between the non-reflowable metal bump and the bond pad.

摘要翻译： 一种装置包括结合到第二工件的第一工件。 第一工件包括在第一工件的表面处的阻焊剂，其中阻焊剂包括阻焊剂开口，以及阻焊剂开口中的接合焊盘。 第二工件在第二工件的表面上包括不可回流的金属凸块。 焊料凸块将不可回流的金属凸块接合到接合焊盘，其中焊料凸块的至少一部分位于阻焊剂开口中并且邻接不可回流的金属凸块和接合焊盘。 阻焊剂的厚度大于焊料凸块的高度的约50％，其中高度等于不可回流金属凸块和接合垫之间的距离。

公开(公告)号：US20110186986A1

公开(公告)日：2011-08-04

申请号：US12697008

申请日：2010-01-29

申请人： Yao-Chun Chuang ,  Chen-Cheng Kuo ,  Ching-Wen Hsiao ,  Chen-Shien Chen

发明人： Yao-Chun Chuang ,  Chen-Cheng Kuo ,  Ching-Wen Hsiao ,  Chen-Shien Chen

IPC分类号： H01L23/498 ,  H01L21/768 ,  H01L21/50

CPC分类号： H01L21/50 ,  H01L21/768 ,  H01L23/498 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/16503 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A T-shaped post for semiconductor devices is provided. The T-shaped post has an under-bump metallization (UBM) section and a pillar section extending from the UBM section. The UBM section and the pillar section may be formed of a same material or different materials. In an embodiment, a substrate, such as a die, wafer, printed circuit board, packaging substrate, or the like, having T-shaped posts is attached to a contact of another substrate, such as a die, wafer, printed circuit board, packaging substrate, or the like. The T-shaped posts may have a solder material pre-formed on the pillar section such that the pillar section is exposed or such that the pillar section is covered by the solder material. In another embodiment, the T-shaped posts may be formed on one substrate and the solder material formed on the other substrate.

摘要翻译： 提供了一种用于半导体器件的T形柱。 T形柱具有凸起下金属化（UBM）部分和从UBM部分延伸的柱部分。 UBM部分和支柱部分可以由相同的材料或不同的材料形成。 在一个实施例中，具有T形柱的衬底（例如管芯，晶片，印刷电路板，封装衬底等）被附接到另一个衬底（例如管芯，晶片，印刷电路板， 包装衬底等。 T形柱可以具有预先形成在柱部上的焊料材料，使得柱部分暴露或者使得柱部分被焊料材料覆盖。 在另一个实施例中，T形柱可以形成在一个基底上，并且焊料材料形成在另一个基底上。

公开(公告)号：US20100090304A1

公开(公告)日：2010-04-15

申请号：US12626296

申请日：2009-11-25

申请人： Jen-Cheng Liu ,  Dun-Nian Yaung ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Shou-Gwo Wuu

发明人： Jen-Cheng Liu ,  Dun-Nian Yaung ,  Chen-Cheng Kuo ,  Chen-Shien Chen ,  Shou-Gwo Wuu

IPC分类号： H01L31/0232 ,  H01L31/18 ,  H01L21/60

CPC分类号： H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L24/12 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05548 ,  H01L2224/0557 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： The present disclosure provides a method of making an integrated circuit (IC). The method includes forming an electric device on a front side of a substrate; forming a top metal pad on the front side of the substrate, the top metal pad being coupled to the electric device; forming a passivation layer on the front side of the substrate, the top metal pad being embedded in the passivation layer; forming an opening in the passivation layer, exposing the top metal pad; forming a deep trench in the substrate; filling a conductive material in the deep trench and the opening, resulting in a though-wafer via (TWV) feature in the deep trench and a pad-TWV feature in the opening, where the top metal pad being connected to the TWV feature through the pad-TWV feature; and applying a polishing process to remove excessive conductive material, forming a substantially planar surface.

摘要翻译： 本公开提供了制造集成电路（IC）的方法。 该方法包括在基板的正面上形成电子装置; 在所述基板的前侧形成顶部金属焊盘，所述顶部金属焊盘联接到所述电气装置; 在所述基板的正面上形成钝化层，所述顶部金属焊盘嵌入所述钝化层中; 在钝化层中形成开口，暴露顶部金属垫; 在衬底中形成深沟槽; 在深沟槽和开口中填充导电材料，导致深沟槽中的贯穿晶片通孔（TWV）特征和开口中的焊盘TWV特征，其中顶部金属焊盘通过该沟槽连接到TWV特征 pad-TWV功能; 以及施加抛光工艺以去除过量的导电材料，形成基本平坦的表面。