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    Vias in porous substrates
    2.
    发明授权
    Vias in porous substrates 有权
    多孔基材中的通孔

    公开(公告)号：US08975751B2

    公开(公告)日：2015-03-10

    申请号：US13092495

    申请日：2011-04-22

    申请人： Ilyas Mohammed ,  Belgacem Haba ,  Cyprian Uzoh ,  Piyush Savalia

    发明人： Ilyas Mohammed ,  Belgacem Haba ,  Cyprian Uzoh ,  Piyush Savalia

    IPC分类号： H01L23/52 ,  H01L21/768 ,  H01L21/48 ,  H01L23/14 ,  H01L23/15 ,  H01L23/48 ,  H01L23/498

    CPC分类号： H01L21/76877 ,  H01L21/486 ,  H01L21/76837 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/15 ,  H01L23/481 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

    摘要： A microelectronic unit can include a substrate having front and rear surfaces and active semiconductor devices therein, the substrate having a plurality of openings arranged in a symmetric or asymmetric distribution across an area of the rear surface, first and second conductive vias connected to first and second pads exposed at the front surface, pluralities of first and second conductive interconnects extending within respective ones of the openings, and first and second conductive contacts exposed for interconnection with an external element. The plurality of first conductive interconnects can be separated from the plurality of second conductive interconnects by at least one of the plurality of openings, the at least one opening at least partially filled with an insulating material. The distribution of the openings can include at least m openings spaced apart in a first direction and n openings spaced apart in a second direction transverse to the first direction.

    摘要翻译： 微电子单元可以包括其中具有前表面和后表面的基板和其中的有源半导体器件，所述基板具有布置成在后表面的区域上的对称或不对称分布的多个开口，连接到第一和第二导电通孔的第一和第二导电通孔 在前表面暴露的焊盘，在相应的一个开口内延伸的多个第一和第二导电互连，以及暴露以与外部元件互连的第一和第二导电触点。 多个第一导电互连可以通过所述多个开口中的至少一个与所述多个第二导电互连部分开，所述至少一个开口至少部分地填充有绝缘材料。 开口的分布可以包括在第一方向上间隔开的至少m个开口和在横向于第一方向的第二方向上间隔开的n个开口。

    VIAS IN POROUS SUBSTRATES
    3.
    发明申请
    VIAS IN POROUS SUBSTRATES 有权
    多孔基材中的VIAS

    公开(公告)号：US20120267789A1

    公开(公告)日：2012-10-25

    申请号：US13092495

    申请日：2011-04-22

    申请人： Ilyas Mohammed ,  Belgacem Haba ,  Cyprian Uzoh ,  Piyush Savalia

    发明人： Ilyas Mohammed ,  Belgacem Haba ,  Cyprian Uzoh ,  Piyush Savalia

    IPC分类号： H01L23/48 ,  H01L21/28

    CPC分类号： H01L21/76877 ,  H01L21/486 ,  H01L21/76837 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/15 ,  H01L23/481 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

    摘要： A microelectronic unit can include a substrate having front and rear surfaces and active semiconductor devices therein, the substrate having a plurality of openings arranged in a symmetric or asymmetric distribution across an area of the rear surface, first and second conductive vias connected to first and second pads exposed at the front surface, pluralities of first and second conductive interconnects extending within respective ones of the openings, and first and second conductive contacts exposed for interconnection with an external element. The plurality of first conductive interconnects can be separated from the plurality of second conductive interconnects by at least one of the plurality of openings, the at least one opening at least partially filled with an insulating material. The distribution of the openings can include at least m openings spaced apart in a first direction and n openings spaced apart in a second direction transverse to the first direction.

    摘要翻译： 微电子单元可以包括其中具有前表面和后表面的基板和其中的有源半导体器件，所述基板具有布置成在后表面的区域上的对称或不对称分布的多个开口，连接到第一和第二导电通孔的第一和第二导电通孔 在前表面暴露的焊盘，在相应的一个开口内延伸的多个第一和第二导电互连，以及暴露以与外部元件互连的第一和第二导电触点。 多个第一导电互连可以通过所述多个开口中的至少一个与所述多个第二导电互连部分开，所述至少一个开口至少部分地填充有绝缘材料。 开口的分布可以包括在第一方向上间隔开的至少m个开口和在横向于第一方向的第二方向上间隔开的n个开口。

    HIGH DENSITY THREE-DIMENSIONAL INTEGRATED CAPACITORS
    4.
    发明申请
    HIGH DENSITY THREE-DIMENSIONAL INTEGRATED CAPACITORS 有权
    高密度三维集成电容器

    公开(公告)号：US20120181658A1

    公开(公告)日：2012-07-19

    申请号：US13182890

    申请日：2011-07-14

    申请人： Ilyas Mohammed ,  Belgacem Haba ,  Cyprian Uzoh ,  Piyush Savalia ,  Vage Oganesian

    发明人： Ilyas Mohammed ,  Belgacem Haba ,  Cyprian Uzoh ,  Piyush Savalia ,  Vage Oganesian

    IPC分类号： H01L29/92 ,  H01L21/02

    CPC分类号： H01L23/642 ,  H01G4/06 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L25/0657 ,  H01L25/16 ,  H01L28/40 ,  H01L28/91 ,  H01L28/92 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A capacitor can include a substrate having a first surface, a second surface remote from the first surface, and a through opening extending between the first and second surfaces, first and second metal elements, and a capacitor dielectric layer separating and insulating the first and second metal elements from one another at least within the through opening. The first metal element can be exposed at the first surface and can extend into the through opening. The second metal element can be exposed at the second surface and can extend into the through opening. The first and second metal elements can be electrically connectable to first and second electric potentials. The capacitor dielectric layer can have an undulating shape.

    摘要翻译： 电容器可以包括具有第一表面的基板，远离第一表面的第二表面，以及在第一和第二表面之间延伸的通孔，第一和第二金属元件以及将第一和第二表面分离和绝缘的电容器介电层 至少在通孔内的金属元​​件彼此之间。 第一金属元件可以在第一表面暴露并且可以延伸到通孔中。 第二金属元件可以在第二表面处露出并且可以延伸到通孔中。 第一和第二金属元件可以电连接到第一和第二电位。 电容器介电层可以具有起伏的形状。