公开(公告)号：US07888257B2

公开(公告)日：2011-02-15

申请号：US11973859

申请日：2007-10-10

Applicant: Joze Eura Antol ,  John William Osenbach ,  Ronald James Weachock

Inventor： Joze Eura Antol ,  John William Osenbach ,  Ronald James Weachock

IPC: H01L21/44

CPC classification number: H01L24/85 ,  H01L24/05 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/83 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05073 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/2919 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48451 ,  H01L2224/48463 ,  H01L2224/48482 ,  H01L2224/48624 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/83 ,  H01L2224/85051 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85375 ,  H01L2224/859 ,  H01L2224/8592 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0106 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01202 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2224/48465 ,  H01L2924/0665 ,  H01L2924/00

Abstract: It has been found that integrated packages having dies with at least 10 bonding pads separated by a pitch of 65 μm or less are susceptible to corrosion upon wire bonding to these pads and subsequent encapsulation in a passivating material. In particular, crevices are potentially formed between the bonding wire and bonding pad that are not passivated and that promote corrosion. Avoidance of crevice formation through, for example, appropriately choosing the bonding pad and wire configuration substantially avoids such corrosion.

Abstract translation: 已经发现，具有至少10个接合焊盘分离的间距为65μm或更小的管芯的集成封装在引线接合到这些焊盘并随后在钝化材料中封装时易于腐蚀。 特别地，在不被钝化并促进腐蚀的接合线和接合焊盘之间潜在地形成缝隙。 例如通过适当地选择接合焊盘和电线配置来避免缝隙形成基本上避免了这种腐蚀。

公开(公告)号：US20110024745A1

公开(公告)日：2011-02-03

申请号：US12904314

申请日：2010-10-14

Applicant: David R. Hembree ,  Alan G. Wood

Inventor： David R. Hembree ,  Alan G. Wood

IPC: H01L23/00 ,  H01L23/522

CPC classification number: H01L24/16 ,  G01R1/06716 ,  G01R1/07307 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/76877 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02125 ,  H01L2224/0233 ,  H01L2224/02333 ,  H01L2224/02335 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/0333 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/1134 ,  H01L2224/13009 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45116 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45655 ,  H01L2224/45684 ,  H01L2224/45698 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4899 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10155 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45164 ,  H01L2924/013 ,  H01L2924/00013

Abstract: A method for fabricating a semiconductor component with an encapsulated through wire interconnect includes the steps of providing a substrate having a first side, a second side and a substrate contact; forming a via in the substrate contact and the substrate to the second side; placing a wire in the via; forming a first contact on the wire proximate to the first side and a second contact on the wire proximate to the second side; and forming a polymer layer on the first side leaving the first contact exposed. The polymer layer can be formed using a film assisted molding process including the steps of: forming a mold film on tip portions of the bonding members, molding the polymer layer, and then removing the mold film to expose the tip portions of the bonding members. The through wire interconnect provides a multi level interconnect having contacts on opposing sides of the semiconductor substrate.

Abstract translation: 一种用封装的直通线互连制造半导体部件的方法包括以下步骤：提供具有第一面，第二面和基板接触的基板; 在基板接触中形成通孔，将基板形成到第二面; 将电线放在通孔中; 在靠近第一侧的导线上形成第一触点，并且在靠近第二侧的导线上形成第二触点; 并在第一侧上形成聚合物层，留下暴露的第一接触。 聚合物层可以使用薄膜辅助成型方法形成，包括以下步骤：在粘合部件的顶端部分上形成模具膜，模制聚合物层，然后移除模具膜以暴露粘合部件的末端部分。 通线互连提供了在半导体衬底的相对侧上具有触点的多电平互连。

公开(公告)号：US07846829B2

公开(公告)日：2010-12-07

申请号：US12196210

申请日：2008-08-21

Applicant: Junji Tanaka ,  Masahiko Harayama ,  Masanori Onodera

Inventor： Junji Tanaka ,  Masahiko Harayama ,  Masanori Onodera

IPC: H01L21/44 ,  H01L23/52 ,  H01L23/48 ,  H01L29/40 ,  H01L23/485 ,  H01L23/498

CPC classification number: H05K3/38 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2225/06568 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/20752 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/1025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device is provided that includes a semiconductor chip, a plurality of solder bumps that electrically couple the semiconductor chip to the outside, and a metal bump being provided on the surface of each first solder bump which is at least a part of the plurality of solder bumps and being made of a metal having a melting point higher than that of the first solder bump. The wettability of the first solder bump is improved as each metal bump serves as a core when the corresponding first solder bump melts. Thus, the connection reliability of the first solder bump can be improved.

Abstract translation: 提供了一种半导体器件，其包括半导体芯片，将半导体芯片电耦合到外部的多个焊料凸块以及设置在每个第一焊料凸块的表面上的金属凸块，该第一焊料凸块是至少部分多个 焊料凸起并且由熔点高于第一焊料凸点的金属制成。 当相应的第一焊料凸块熔化时，每个金属凸块用作芯时，第一焊料凸块的润湿性得到改善。 因此，可以提高第一焊料凸块的连接可靠性。

公开(公告)号：US20100294435A1

公开(公告)日：2010-11-25

申请号：US12794911

申请日：2010-06-07

Applicant: Toru MAEDA ,  Tetsuya UTANO ,  Akinobu TERAMOTO

Inventor： Toru MAEDA ,  Tetsuya UTANO ,  Akinobu TERAMOTO

IPC: H01L21/44

CPC classification number: H01L24/85 ,  B23K20/007 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/78268 ,  H01L2224/78301 ,  H01L2224/7865 ,  H01L2224/85009 ,  H01L2224/85013 ,  H01L2224/85045 ,  H01L2224/85065 ,  H01L2224/85075 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/00014 ,  H01L2924/01001 ,  H01L2924/00

Abstract: A bonding apparatus including a chamber for maintaining an inert gas atmosphere; a first plasma torch for performing a surface treatment on pads and electrodes, the first plasma torch being attached in the chamber, to apply gas plasma to a substrate and a semiconductor chip that is placed inside the chamber; a second plasma torch for performing a surface treatment on an initial ball and/or wire at a tip end of a capillary that is positioned inside the chamber, the second plasma torch being attached in the chamber, to apply gas plasma to the initial ball and/or wire; and a bonding unit for bonding the surface-treated initial ball and/or wire to the surface-treated pads and electrodes in the chamber, thereby cleaning of the surface of the electrodes and pads as well as the wire can be effectively performed.

Abstract translation: 一种接合装置，包括用于维持惰性气体气氛的室; 用于对焊盘和电极执行表面处理的第一等离子体焰炬，第一等离子体焰炬附接在腔室中，以将气体等离子体施加到衬底和放置在腔室内的半导体芯片; 第二等离子体焰炬，用于对位于所述腔室内的毛细管的前端处的初始球和/或线进行表面处理，所述第二等离子体焰炬附接在所述腔室中，以将气体等离子体施加到所述初始球体;以及 /或电线; 以及用于将表面处理的初始球和/或线结合到腔室中的表面处理的垫和电极的接合单元，从而可以有效地执行电极和垫的表面以及线的清洁。

公开(公告)号：US20100230809A1

公开(公告)日：2010-09-16

申请号：US12375238

申请日：2008-01-30

Applicant: Dodgie Reigh M. Calpito ,  O Dal Kwon

Inventor： Dodgie Reigh M. Calpito ,  O Dal Kwon

IPC: H01L23/49 ,  B23K31/02

CPC classification number: H01L24/85 ,  H01L21/6835 ,  H01L23/4952 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/4809 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48455 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48511 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78302 ,  H01L2224/78901 ,  H01L2224/85001 ,  H01L2224/85045 ,  H01L2224/85047 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2224/85947 ,  H01L2224/85986 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2224/4554

Abstract: A method of forming a wire loop is provided. The method includes: (1) forming a first fold of wire; (2) bonding the first fold of wire to a first bonding location to form a first bond; (3) extending a length of wire, continuous with the first bond, between (a) the first bond and (b) a second bonding location; and (4) bonding a portion of the wire to the second bonding location to form a second bond.

Abstract translation: 提供一种形成线环的方法。 该方法包括：（1）形成线的第一折叠; （2）将所述第一折叠线接合到第一接合位置以形成第一接合; （3）在（a）第一键和（b）第二结合位置之间延伸一段与第一键连续的线的长度; 和（4）将所述导线的一部分接合到所述第二接合位置以形成第二接合。

公开(公告)号：US20100230161A1

公开(公告)日：2010-09-16

申请号：US12225293

申请日：2007-03-28

Applicant: Katsuji Hoshi

Inventor： Katsuji Hoshi

IPC: H01R4/02 ,  B23K1/00 ,  B23K11/00 ,  B23K31/02 ,  H01R4/62

CPC classification number: H01L24/48 ,  H01L23/49855 ,  H01L24/05 ,  H01L24/45 ,  H01L24/80 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48458 ,  H01L2224/48471 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48739 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/7825 ,  H01L2224/78282 ,  H01L2224/78313 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L2224/85238 ,  H01L2924/00011 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01204 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/19042 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/2075 ,  H01L2924/20754 ,  H01L2924/069 ,  H01L2924/01049 ,  H01L2924/01006

Abstract: The present invention aims to provide such a joint structure of a wound coil 1 and an IC chip 2 for a noncontact RFID device that is able to yield electrically and mechanically excellent connection, employing the wound coil 1, which is made by winding copper electric wire, with small variance of the electric resistance as an antenna coil for the noncontact RFID device, also by making use of such IC chips that their joint terminals 3 are covered with such metallization of the gold outermost layer 3a that is not liable to degradation during storage; and aims to provide such a method of joining the wound coil 1 and the IC chip 2 for the noncontact RFID device that is able to make said joint structure with ease and certainty, through selecting a direct joining process low in production cost as the joining method of the two, also through improving the process.

Abstract translation: 本发明的目的是提供一种用于非接触式RFID器件的绕线线圈1和IC芯片2的接合结构，该非接触式RFID器件能够通过缠绕铜电线 ，作为非接触式RFID器件的天线线圈的电阻变化小，也通过利用这样的IC芯片，使得它们的接合端子3被金存储的金最外层3a覆盖，该金最外层3a在存储期间不易劣化 ; 并且旨在提供这样的方法：通过选择生产成本低的直接接合方法作为接合方法，能够容易地和确定地接合用于非接触RFID装置的绕线线圈1和IC芯片2 的两个，也通过改进过程。

公开(公告)号：US20100133323A1

公开(公告)日：2010-06-03

申请号：US12702203

申请日：2010-02-08

Applicant: Kia Silverbrook ,  Laval Chung-Long-Shan ,  Kiangkai Tankongchumruskul

Inventor： Kia Silverbrook ,  Laval Chung-Long-Shan ,  Kiangkai Tankongchumruskul

IPC: B23K31/02 ,  B23K1/20

CPC classification number: B23K20/004 ,  B23K20/10 ,  B23K2101/42 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/45015 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48455 ,  H01L2224/48472 ,  H01L2224/4899 ,  H01L2224/78313 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/859 ,  H01L2224/8592 ,  H01L2224/8593 ,  H01L2224/85947 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A method of profiling a series of wire bonds between a line of contact pads on a die, and a corresponding set of conductors on a supporting structure. The method involves electrically connecting each of the contact pads on the die to a corresponding conductor on the supporting structure with a respective wire bond, each of the wire bonds extending in an arc from the contact pad to the conductor and, pushing on each of the wire bonds individually to collapse the arc and plastically deform the wire bond such that the plastic deformation maintains the wire bond in a flatter profile shape. The support structure has a chip mounting area for supporting the die. The die has a back surface in contact with the chip mounting area and an active surface opposing the back surface, the active surface having the contact pads, and the chip mounting area being raised relative to the remainder of the support structure such that the contact pads are raised relative to the conductors.

Abstract translation: 在模具上的接触焊盘线与支撑结构上的相应导体组之间绘制一系列引线接合的方法。 该方法包括通过相应的引线接合将管芯上的每个接触焊盘电连接到支撑结构上的相应导体上，每个引线接合件从接触焊盘延伸到导体，并且每个引线 单独的线接合以使电弧塌缩并塑性变形导线接合，使得塑性变形使线接合保持平坦的轮廓形状。 支撑结构具有用于支撑模具的芯片安装区域。 模具具有与芯片安装区域接触的后表面和与后表面相对的活动表面，活动表面具有接触垫，并且芯片安装区域相对于支撑结构的其余部分升高，使得接触垫 相对于导体而升高。

公开(公告)号：US20100117243A1

公开(公告)日：2010-05-13

申请号：US12269798

申请日：2008-11-12

Applicant: James Zaccardi

Inventor： James Zaccardi

IPC: H01L23/49 ,  H01L21/58

CPC classification number: H01L25/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06136 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/45599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48611 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/8385 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/07025 ,  H01L2924/0635 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor package has a substrate with a plurality of contact pads. A first semiconductor die is mounted to the substrate. First wire bonds are formed between each of the center-row contact pads of the first semiconductor die and the substrate contact pads. The first wire bonds include an electrically insulative coating formed over the shaft that covers a portion of a surface of a bumped end of the first wire bonds. An epoxy material is deposited over the first semiconductor die. A second semiconductor die is mounted to the epoxy material. Second wire bonds are formed between each of the center-row contact pads of the second semiconductor die and the substrate contact pads. The second wire bonds include an electrically insulative coating formed over the shaft of the second wire bonds that covers a portion of a surface of a bumped end of the second wire bonds.

Abstract translation: 半导体封装具有带有多个接触焊盘的衬底。 第一半导体管芯安装在基板上。 在第一半导体管芯的每个中心排接触焊盘和衬底接触焊盘之间形成第一引线接合。 第一线接合包括形成在轴上的电绝缘涂层，其覆盖第一引线接合的凸起端的表面的一部分。 环氧树脂材料沉积在第一半导体管芯上。 第二半导体管芯安装在环氧树脂材料上。 第二引线键形成在第二半导体管芯的每个中心排接触焊盘和衬底接触焊盘之间。 第二线接合包括形成在第二线接合的轴上的电绝缘涂层，其覆盖第二线接合的凸起端的一部分表面。

公开(公告)号：US07682962B2

公开(公告)日：2010-03-23

申请号：US11743636

申请日：2007-05-02

Applicant: David R. Hembree

Inventor： David R. Hembree

IPC: H01L21/44

CPC classification number: H01L25/0657 ,  B23K20/004 ,  B23K20/005 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/53213 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact. The semiconductor component can be used to form chip scale components, wafer scale components, stacked components, or interconnect components for electrically engaging or testing other semiconductor components.

Abstract translation: 用于通过导线互连制造半导体部件的方法包括提供具有电路侧，背面和通孔的基板的步骤。 该方法还包括以下步骤：将导线穿过通孔，在背面的导线上形成接触，在电路侧的导线上形成接合接触，然后将线从接合接触件断开。 通线互连包括通孔中的导线，背侧的触点和电路侧的接合触点。 背面的触点和电路侧的接合触点允许多个部件与相邻部件之间的电连接层叠。 用于执行该方法的系统包括具有通孔的基板和具有接合毛细管的引线接合器，所述接合毛细管被配置为使线穿过通孔，并形成接触和接合接触。 半导体部件可用于形成用于电接合或测试其它半导体部件的芯片级部件，晶片级部件，堆叠部件或互连部件。

公开(公告)号：US07677432B2

公开(公告)日：2010-03-16

申请号：US11120773

申请日：2005-05-03

Applicant: Norihiro Kawakami ,  Yoshikatsu Umeda ,  Sohichi Kadoguchi

Inventor： Norihiro Kawakami ,  Yoshikatsu Umeda ,  Sohichi Kadoguchi

IPC: B23K31/02 ,  B23K37/00

CPC classification number: B23K20/007 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/78301 ,  H01L2224/78302 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: Methods and systems are disclosed for forming secure wirebonds between electrical contacts in electronic device assemblies. Representative embodiments of the invention are described for forming a wirebond including system components and method steps for generating electromagnetic energy from a heat source and transmitting heat to a ball formed on a bondwire. Subsequently, pressure applied to the ball at the bonding site is used in the formation of a wirebond.

Abstract translation: 公开了用于在电子设备组件中的电触点之间形成牢固的引线键的方法和系统。 描述了用于形成引线键的本发明的代表性实施例，其包括用于从热源产生电磁能并将热量传递到形成在接合线上的球的系统部件和方法步骤。 随后，在引线接合的形成中使用在接合部位施加到球的压力。