公开(公告)号：US08970035B2

公开(公告)日：2015-03-03

申请号：US13624356

申请日：2012-09-21

Applicant: Jing-Cheng Lin ,  Po-Hao Tsai

Inventor： Jing-Cheng Lin ,  Po-Hao Tsai

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L24/11 ,  H01L21/563 ,  H01L23/3192 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2224/06102 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11612 ,  H01L2224/11614 ,  H01L2224/1182 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/1403 ,  H01L2224/1411 ,  H01L2224/14155 ,  H01L2224/14156 ,  H01L2224/14177 ,  H01L2224/14515 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16168 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/1703 ,  H01L2224/17517 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/01108 ,  H01L2224/11 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01082 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/00

Abstract: A package structure includes a first substrate bonded to a second substrate by Connecting metal pillars on the first substrate to connectors on the second substrate. A first metal pillar is formed overlying and electrically connected to a metal pad on a first region of the first substrate, and a second metal pillar is formed overlying a passivation layer in a second region of the first substrate. A first solder joint region is formed between metal pillar and the first connector, and a second solder joint region is formed between the second metal pillar and the second connector. The thickness of the first metal pillar is greater than the thickness of the second metal pillar.

Abstract translation: 封装结构包括通过将第一基板上的金属柱连接到第二基板上的连接器而将第一基板接合到第二基板。 第一金属柱形成在第一衬底的第一区域上并覆盖并电连接到金属焊盘，第二金属柱形成在第一衬底的第二区域中的钝化层上。 在金属柱和第一连接器之间形成第一焊接区域，在第二金属柱和第二连接器之间形成第二焊点区域。 第一金属柱的厚度大于第二金属柱的厚度。

公开(公告)号：US08953336B2

公开(公告)日：2015-02-10

申请号：US13412958

申请日：2012-03-06

Applicant: Chin-Fu Kao ,  Wen-Chih Chiou ,  Jing-Cheng Lin ,  Cheng-Lin Huang ,  Po-Hao Tsai

Inventor： Chin-Fu Kao ,  Wen-Chih Chiou ,  Jing-Cheng Lin ,  Cheng-Lin Huang ,  Po-Hao Tsai

IPC: H05K7/10

CPC classification number: H01L24/14 ,  H01L22/32 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/14515 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014

Abstract: A surface metal wiring structure for a substrate includes one or more functional μbumps formed of a first metal and an electrical test pad formed of a second metal for receiving an electrical test probe and electrically connected to the one or more functional μbumps. The surface metal wiring structure also includes a plurality of sacrificial μbumps formed of the first metal that are electrically connected to the electrical test pads, where the sacrificial μbumps are positioned closer to the electrical test pad than the one or more functional μbumps.

Abstract translation: 用于基板的表面金属布线结构包括由第一金属形成的一个或多个功能性μ凸块和由用于接收电测试探针并电连接到所述一个或多个功能性μ凸起的第二金属形成的电测试垫。 表面金属布线结构还包括由第一金属形成的多个牺牲μ凸块，其电连接到电测试焊盘，其中牺牲μ凸块位于比一个或多个功能性μ凸块更靠近电测试垫的位置。

公开(公告)号：US09219016B2

公开(公告)日：2015-12-22

申请号：US13247659

申请日：2011-09-28

Applicant: Jing-Cheng Lin ,  Po-Hao Tsai

Inventor： Jing-Cheng Lin ,  Po-Hao Tsai

IPC: H05K7/00 ,  H01L21/66 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L22/32 ,  H01L23/3192 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/11823 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/13565 ,  H01L2224/13566 ,  H01L2224/13578 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/1369 ,  H01L2224/16148 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/01029 ,  H01L2224/81 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A work piece includes a first copper-containing pillar having a top surface and sidewalls, and a first protection layer on the sidewalls, and not over the top surface, of the first copper-containing pillar. A test pad includes a second copper-containing pillar having a top surface and sidewalls. The test pad is electrically coupled to the first copper-containing pillar. A second protection layer is disposed on the sidewalls, and not over the top surface, of the second copper-containing pillar. The first and the second protection layers include a compound of copper and a polymer, and are dielectric layers.

Abstract translation: 工件包括具有顶表面和侧壁的第一含铜柱，以及第一含铜柱的侧壁而不是顶表面上的第一保护层。 测试垫包括具有顶表面和侧壁的第二含铜柱。 测试垫电耦合到第一含铜柱。 第二保护层设置在第二含铜柱的侧壁上，而不是在顶表面上。 第一和第二保护层包括铜和聚合物的化合物，并且是电介质层。

公开(公告)号：US08922004B2

公开(公告)日：2014-12-30

申请号：US12846260

申请日：2010-07-29

Applicant: Jing-Cheng Lin ,  Ya-Hsi Hwung ,  Hsin-Yu Chen ,  Po-Hao Tsai ,  Yan-Fu Lin ,  Cheng-Lin Huang ,  Fang Wen Tsai ,  Wen-Chih Chiou

Inventor： Jing-Cheng Lin ,  Ya-Hsi Hwung ,  Hsin-Yu Chen ,  Po-Hao Tsai ,  Yan-Fu Lin ,  Cheng-Lin Huang ,  Fang Wen Tsai ,  Wen-Chih Chiou

IPC: H01L23/48 ,  H01L23/488 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L24/11 ,  H01L23/488 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05099 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/1182 ,  H01L2224/11823 ,  H01L2224/1191 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/13564 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13578 ,  H01L2224/13583 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/1369 ,  H01L2224/16058 ,  H01L2224/16148 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/0002 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/37001 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/16145 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2224/05552 ,  H01L2224/81805

Abstract: A work piece includes a copper bump having a top surface and sidewalls. A protection layer is formed on the sidewalls, and not on the top surface, of the copper bump. The protection layer includes a compound of copper and a polymer, and is a dielectric layer.

Abstract translation: 工件包括具有顶表面和侧壁的铜凸块。 在铜凸块的侧壁而不是顶表面上形成保护层。 保护层包括铜和聚合物的化合物，并且是介电层。

公开(公告)号：US08653658B2

公开(公告)日：2014-02-18

申请号：US13308162

申请日：2011-11-30

Applicant: Jing-Cheng Lin ,  Po-Hao Tsai

Inventor： Jing-Cheng Lin ,  Po-Hao Tsai

IPC: H01L23/498 ,  H01L21/50 ,  H01L21/768

CPC classification number: H01L24/11 ,  H01L21/486 ,  H01L21/563 ,  H01L23/147 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/119 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1401 ,  H01L2224/1403 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/351 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2224/05552 ,  H01L2924/00

Abstract: The mechanisms for forming bump structures reduce variation of standoffs between chips and package substrates. By planarizing the solder layer on bump structures on chips and/or substrates after plating, the heights of bump structures are controlled to minimize variation due to within die and within wafer locations, pattern density, die size, and process variation. As a result, the standoffs between chips and substrates are controlled to be more uniform. Consequently, underfill quality is improved.

Abstract translation: 用于形成凸块结构的机构减少了芯片和封装衬底之间的间隙的变化。 通过在电镀后对芯片和/或基板上的凸块结构上的焊料层进行平坦化，可以控制凸块结构的高度，以最小化晶片内部以及晶片位置，图案密度，晶粒尺寸和工艺变化中的变化。 结果，芯片和基板之间的间隔被控制得更均匀。 因此，底部填充质量得到改善。

公开(公告)号：US20130233601A1

公开(公告)日：2013-09-12

申请号：US13412958

申请日：2012-03-06

Applicant: Chin-Fu KAO ,  Wen-Chih Chiou ,  Jing-Cheng Lin ,  Cheng-Lin Huang ,  Po-Hao Tsai

Inventor： Chin-Fu KAO ,  Wen-Chih Chiou ,  Jing-Cheng Lin ,  Cheng-Lin Huang ,  Po-Hao Tsai

IPC: H05K1/09 ,  H05K1/00

CPC classification number: H01L24/14 ,  H01L22/32 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/14515 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014

Abstract: A surface metal wiring structure for a substrate includes one or more functional μbumps formed of a first metal and an electrical test pad formed of a second metal for receiving an electrical test probe and electrically connected to the one or more functional μbumps. The surface metal wiring structure also includes a plurality of sacrificial μbumps formed of the first metal that are electrically connected to the electrical test pads, where the sacrificial μbumps are positioned closer to the electrical test pad than the one or more functional μbumps.

Abstract translation: 用于基板的表面金属布线结构包括由第一金属形成的一个或多个功能性微片和由用于接收电测试探针的第二金属形成的电测试焊盘，并电连接到所述一个或多个功能性微波。 表面金属布线结构还包括多个由第一金属形成的牺牲片，其电连接到电测试焊盘，其中牺牲微片比一个或多个功能性微片更靠近电测试垫定位。

公开(公告)号：US08455995B2

公开(公告)日：2013-06-04

申请号：US12762085

申请日：2010-04-16

Applicant: Po-Hao Tsai ,  Jing-Cheng Lin ,  Chen-Hua Yu

Inventor： Po-Hao Tsai ,  Jing-Cheng Lin ,  Chen-Hua Yu

IPC: H01L23/04

CPC classification number: H01L23/3121 ,  H01L21/486 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/73204 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/00 ,  H01L2224/81805

Abstract: A device includes an interposer including a substrate having a top surface and a bottom surface. A plurality of through-substrate vias (TSVs) penetrates through the substrate. The plurality of TSVs includes a first TSV having a first length and a first horizontal dimension, and a second TSV having a second length different from the first length, and a second horizontal dimension different from the first horizontal dimension. An interconnect structure is formed overlying the top surface of the substrate and electrically coupled to the plurality of TSVs.

Abstract translation: 一种器件包括具有顶表面和底表面的衬底的插入器。 多个穿通基板通孔（TSV）穿过基板。 多个TSV包括具有第一长度和第一水平尺寸的第一TSV和具有不同于第一长度的第二长度的第二TSV和与第一水平尺寸不同的第二水平尺寸。 互连结构形成在衬底的顶表面上并电耦合到多个TSV。

公开(公告)号：US20130077272A1

公开(公告)日：2013-03-28

申请号：US13247659

申请日：2011-09-28

Applicant: Jing-Cheng Lin ,  Po-Hao Tsai

Inventor： Jing-Cheng Lin ,  Po-Hao Tsai

IPC: H05K7/02 ,  H05K1/09

CPC classification number: H01L22/32 ,  H01L23/3192 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/11823 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/13565 ,  H01L2224/13566 ,  H01L2224/13578 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/1369 ,  H01L2224/16148 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/01029 ,  H01L2224/81 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A work piece includes a first copper-containing pillar having a top surface and sidewalls, and a first protection layer on the sidewalls, and not over the top surface, of the first copper-containing pillar. A test pad includes a second copper-containing pillar having a top surface and sidewalls. The test pad is electrically coupled to the first copper-containing pillar. A second protection layer is disposed on the sidewalls, and not over the top surface, of the second copper-containing pillar. The first and the second protection layers include a compound of copper and a polymer, and are dielectric layers.

Abstract translation: 工件包括具有顶表面和侧壁的第一含铜柱，以及第一含铜柱的侧壁而不是顶表面上的第一保护层。 测试垫包括具有顶表面和侧壁的第二含铜柱。 测试垫电耦合到第一含铜柱。 第二保护层设置在第二含铜柱的侧壁上，而不是在顶表面上。 第一和第二保护层包括铜和聚合物的化合物，并且是电介质层。

公开(公告)号：US09691706B2

公开(公告)日：2017-06-27

申请号：US13452140

申请日：2012-04-20

Applicant: Chen-Hua Yu ,  Jing-Cheng Lin ,  Jui-Pin Hung

Inventor： Chen-Hua Yu ,  Jing-Cheng Lin ,  Jui-Pin Hung

IPC: H01L23/48 ,  H01L23/538 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L23/544 ,  H01L21/683 ,  H01L23/31

CPC classification number: H01L25/0655 ,  H01L21/31053 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/742 ,  H01L24/82 ,  H01L24/92 ,  H01L24/94 ,  H01L24/96 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2223/54426 ,  H01L2224/02311 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/11002 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1184 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24101 ,  H01L2224/24137 ,  H01L2224/244 ,  H01L2224/24991 ,  H01L2224/82005 ,  H01L2224/82106 ,  H01L2224/8213 ,  H01L2224/82132 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2224/11 ,  H01L2224/19 ,  H01L2924/00

Abstract: A package includes a die having a conductive pad at a top surface of the die, a stud bump over and connected to the conductive pad, and a redistribution line over and connected to the stud bump. An electrical connector is over and electrically coupled to the redistribution line.

公开(公告)号：US09662812B2

公开(公告)日：2017-05-30

申请号：US13485307

申请日：2012-05-31

Applicant: Chih-Hao Chen ,  Hsien-Wen Liu ,  Yi-Lin Tsai ,  Jui-Pin Hung ,  Jing-Cheng Lin

Inventor： Chih-Hao Chen ,  Hsien-Wen Liu ,  Yi-Lin Tsai ,  Jui-Pin Hung ,  Jing-Cheng Lin

IPC: B29C43/18 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC classification number: B29C43/18 ,  H01L21/565 ,  H01L23/3121 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/94 ,  H01L2924/1531 ,  H01L2924/157 ,  H01L2924/00012 ,  H01L2224/81

Abstract: A method includes molding a polymer onto a package component. The step of molding includes a first molding stage performed at a first temperature, and a second molding stage performed at a second temperature different from the first temperature.