公开(公告)号：US20100139088A1

公开(公告)日：2010-06-10

申请号：US12702865

申请日：2010-02-09

申请人： Kiyoshi SHIBATA ,  Ryosuke Usui ,  Yasunori Inoue

发明人： Kiyoshi SHIBATA ,  Ryosuke Usui ,  Yasunori Inoue

IPC分类号： H05K3/10 ,  H05K3/30

CPC分类号： H05K3/445 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H05K1/056 ,  H05K3/0047 ,  H05K3/44 ,  H05K2201/0382 ,  H05K2201/09054 ,  H05K2201/09609 ,  H05K2201/0969 ,  H05K2203/0323 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49165

摘要： A circuit board and a circuit apparatus using the same which can prevent displacement and film exfoliation ascribable to thermal expansion, and suppress a drop in reliability at increasing temperatures. The circuit board of the circuit apparatus includes a metal substrate having pierced holes as a core member. Protrusions are formed on the top ends of the pierced holes, and depressions are formed in the bottom ends of the pierced holes. Wiring pattern layers are formed on both sides of this metal substrate via respective insulating layers. In order to establish electrical connection between the wiring pattern layers, a conductor layer which connects the wiring pattern layers is formed through the metal substrate via the pierced holes. The conductor layer thereby establishes electrical conduction between the wiring pattern layers. Furthermore, a semiconductor chip is directly connected to the surface side of the circuit board via solder balls.

摘要翻译： 一种电路板和使用该电路板的电路装置，其可以防止由于热膨胀而引起的位移和膜剥落，并且抑制在升高的温度下的可靠性降低。 电路装置的电路板包括具有穿孔作为芯构件的金属基板。 在穿孔的顶端形成突起，在穿孔的底端形成凹部。 接线图案层通过各自的绝缘层形成在该金属基板的两侧上。 为了建立布线图案层之间的电连接，通过穿孔穿过金属基板形成连接布线图案层的导体层。 导体层由此在布线图案层之间建立导电。 此外，半导体芯片通过焊球直接连接到电路板的表面侧。

公开(公告)号：US20100122843A1

公开(公告)日：2010-05-20

申请号：US12271519

申请日：2008-11-14

申请人： Kishio YOKOUCHI ,  Hideaki YOSHIMURA ,  Katsuya FUKASE

发明人： Kishio YOKOUCHI ,  Hideaki YOSHIMURA ,  Katsuya FUKASE

IPC分类号： H01R12/04 ,  H01K3/10

CPC分类号： H01L23/49822 ,  H01L23/145 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/056 ,  H05K3/426 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/0347 ,  H05K2201/0959 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/12035 ,  H01L2224/0401

摘要： A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as strength and thermal expansion coefficient. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs formed by disposing carbon fibers so as to produce openings at positions where plated through holes will pass through and impregnating the carbon fibers with resin; a step of forming through holes that pass inside the openings at positions of the openings in the core portion; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the carbon fibers and thereby produce a core substrate.

摘要翻译： 电路板具有以细间距布置的电镀通孔，并且满足与强度和热膨胀系数等特性有关的要求。 一种电路板的制造方法，其特征在于，包括：通过热压缩形成芯部的步骤，通过设置碳纤维形成的预浸料，以在电镀通孔穿过的位置处产生开口，并用树脂浸渍碳纤维; 在芯部的开口部的位置形成贯通孔内的通孔的工序; 以及在通孔的内表面上形成导电层的步骤，在不干扰碳纤维的位置处形成电镀通孔，从而制造芯基板。

公开(公告)号：US20100012357A1

公开(公告)日：2010-01-21

申请号：US12548933

申请日：2009-08-27

申请人： Alan E. Wang ,  Kevin C. Olson

发明人： Alan E. Wang ,  Kevin C. Olson

IPC分类号： H05K1/03 ,  H05K1/11

CPC分类号： H05K3/445 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/426 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0129 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/09154 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09554 ,  H05K2201/09645 ,  H05K2201/09827 ,  H05K2203/1105 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A circuit board includes an electrically conductive sheet having an insulative coating surrounding the conductive sheet, with a surface of the insulative coating around an edge of the conductive sheet having an arcuate or rounded shape. At least one electrical conductor is conformally deposited on at least the rounded insulative coating around the edge of the conductive sheet and defined via photolithographic and metallization techniques. Each electrical conductor on the insulative coating thereon around the edge of the conductive sheet conforms to the arcuate or rounded shape of the insulative coating and, therefore, has an arcuate or rounded shape.

摘要翻译： 电路板包括具有围绕导电片的绝缘涂层的导电片，绝缘涂层的表面围绕导电片的边缘具有弓形或圆形形状。 至少一个电导体被共形沉积在导电片的边缘周围的至少圆形绝缘涂层上，并通过光刻和金属化技术限定。 导电片边缘周围的绝缘涂层上的每个电导体符合绝缘涂层的弧形或圆形形状，因此具有弓形或圆形形状。

公开(公告)号：US20090308651A1

公开(公告)日：2009-12-17

申请号：US12331113

申请日：2008-12-09

申请人： Tomoyuki ABE ,  Kazumasa SAITO ,  Shin HIRANO ,  Kenji IlDA

发明人： Tomoyuki ABE ,  Kazumasa SAITO ,  Shin HIRANO ,  Kenji IlDA

IPC分类号： H05K1/11 ,  H05K3/10

CPC分类号： H05K3/445 ,  H05K3/42 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/0347 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2203/135 ,  Y10T29/49165

摘要： A wiring substrate includes a core substrate having a first main surface and a mutually opposing second main surface, the second main surface having a conductive property. A first through hole penetrates a core substrate. A first conductive layer extends from the first main surface to the second main surface via the first through hole. An insulating layer is formed on the first conductive layer. A second through hole has the insulating layer as an interior wall. And a second conductive layer is formed inside the second through hole.

摘要翻译： 布线基板包括具有第一主表面和相互相对的第二主表面的芯基板，第二主表面具有导电性能。 第一通孔穿透芯基板。 第一导电层经由第一通孔从第一主表面延伸到第二主表面。 绝缘层形成在第一导电层上。 第二通孔具有作为内壁的绝缘层。 并且第二导电层形成在第二通孔的内部。

公开(公告)号：US20090242248A1

公开(公告)日：2009-10-01

申请号：US12318275

申请日：2008-12-23

申请人： Keungjin Sohn ,  Nobuyuki Ikeguchi ,  Joung-Gul Ryu ,  Ho-Sik Park ,  Sang-Youp Lee ,  Joon-Sik Shin ,  Jung-Hwan Park

发明人： Keungjin Sohn ,  Nobuyuki Ikeguchi ,  Joung-Gul Ryu ,  Ho-Sik Park ,  Sang-Youp Lee ,  Joon-Sik Shin ,  Jung-Hwan Park

IPC分类号： H05K1/02 ,  B29C65/44 ,  B29C70/06 ,  B32B15/08 ,  B32B38/04

CPC分类号： B32B37/185 ,  B29C65/02 ,  B29C66/001 ,  B29C66/1122 ,  B29C66/342 ,  B29C66/45 ,  B29C66/472 ,  B29C66/71 ,  B29C66/7212 ,  B29C66/723 ,  B29C66/72321 ,  B29C66/73111 ,  B29C66/73115 ,  B29C66/73116 ,  B29C66/73161 ,  B29C66/7392 ,  B29C66/742 ,  B29C66/82661 ,  B29C66/9141 ,  B29C66/91933 ,  B29C66/929 ,  B29K2067/00 ,  B29K2101/12 ,  B29K2105/0079 ,  B29K2105/06 ,  B29K2267/00 ,  B29K2277/00 ,  B29K2305/00 ,  B29K2305/02 ,  B29K2305/10 ,  B29K2305/12 ,  B29L2009/00 ,  B29L2009/003 ,  B29L2031/3425 ,  B32B3/266 ,  B32B5/022 ,  B32B5/024 ,  B32B5/147 ,  B32B5/26 ,  B32B7/02 ,  B32B15/08 ,  B32B15/14 ,  B32B15/18 ,  B32B15/20 ,  B32B27/08 ,  B32B27/12 ,  B32B27/18 ,  B32B27/20 ,  B32B27/28 ,  B32B27/36 ,  B32B27/40 ,  B32B38/0008 ,  B32B2255/02 ,  B32B2255/10 ,  B32B2255/26 ,  B32B2260/021 ,  B32B2260/046 ,  B32B2262/02 ,  B32B2262/0269 ,  B32B2262/0276 ,  B32B2262/10 ,  B32B2262/101 ,  B32B2305/08 ,  B32B2307/30 ,  B32B2307/538 ,  B32B2307/734 ,  B32B2310/14 ,  B32B2367/00 ,  B32B2457/08 ,  H01L2224/16227 ,  H01L2924/15311 ,  H05K1/0366 ,  H05K1/056 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0129 ,  H05K2201/0141 ,  H05K2201/068 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T156/10 ,  Y10T156/1056 ,  Y10T428/24331 ,  Y10T428/31504 ,  Y10T428/31786 ,  B29K2309/08

摘要： A method of manufacturing an insulating sheet can include: providing a reinforcement material on which a thermoplastic resin layer is stacked, stacking the thermoplastic resin layer stacked on the reinforcement material over a core substrate, and hot pressing the reinforcement material and the thermoplastic resin layer onto the core substrate. This method can be used to produce an insulation board that has a coefficient of thermal expansion close to that of the semiconductor chip, and thereby prevent bending or warpage in the printed circuit board using the insulation board. Furthermore, the stress in the connecting material can be reduced, so that cracking or delamination in the connecting material may be avoided, while heat-releasing performance may also be improved.

摘要翻译： 制造绝缘片的方法可以包括：提供层叠有热塑性树脂层的增强材料，将堆叠在强化材料上的热塑性树脂层堆叠在芯基板上，将加强材料和热塑性树脂层热压到 核心基板。 该方法可以用于制造具有接近半导体芯片的热膨胀系数的绝缘板，从而防止使用绝缘板的印刷电路板的弯曲或翘曲。 此外，可以减少连接材料中的应力，从而可以避免连接材料的开裂或分层，同时还可以提高散热性能。

公开(公告)号：US20090205852A1

公开(公告)日：2009-08-20

申请号：US12193460

申请日：2008-08-18

申请人： Chun-Chien Chen ,  Tsung-Yuan Chen

发明人： Chun-Chien Chen ,  Tsung-Yuan Chen

IPC分类号： H05K1/00 ,  H05K3/02

CPC分类号： H05K3/44 ,  H05K3/20 ,  H05K3/423 ,  H05K3/427 ,  H05K3/428 ,  H05K3/445 ,  H05K2201/0355 ,  H05K2201/0376 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2203/0369 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24273 ,  Y10T428/24917

摘要： A manufacturing method of a circuit board is provided. A metal core is provided. A conductive layer is formed on each of some carriers. The carriers and dielectric layers are laminated at both sides of the metal core to form a stacked structure. Each of the dielectric layers is located between the corresponding carrier and the metal core, and a portion of the conductive layer is embedded in the corresponding dielectric layer. Then, the carriers are removed. A blind via and/or a through via are/is formed in the stacked structure to connect the corresponding conductive layer and the metal core and/or connect the conductive layers at both sides of the metal core, wherein the through via penetrates the metal core. The conductive layer on a surface of the dielectric layer is removed.

摘要翻译： 提供电路板的制造方法。 提供金属芯。 在一些载体的每一个上形成导电层。 载体和电介质层被层叠在金属芯的两侧以形成堆叠结构。 每个电介质层位于相应的载体和金属芯之间，并且导电层的一部分嵌入相应的介电层中。 然后，移除载体。 在堆叠结构中形成盲通孔和/或通孔，以将相应的导电层和金属芯连接和/或连接金属芯两侧的导电层，其中通孔穿过金属芯 。 去除介电层表面上的导电层。

公开(公告)号：US20090115045A1

公开(公告)日：2009-05-07

申请号：US12289647

申请日：2008-10-31

申请人： Shih-Ping Hsu ,  Chia-Wei Chang

发明人： Shih-Ping Hsu ,  Chia-Wei Chang

IPC分类号： H01L23/02

CPC分类号： H05K1/144 ,  H01L23/3128 ,  H01L2224/48091 ,  H01L2224/73204 ,  H05K1/053 ,  H05K3/4053 ,  H05K3/445 ,  H05K2201/10378 ,  H01L2924/00014

摘要： The present invention relates to a stacked package module and a method for fabricating the same. The stacked package module comprises: a first package structure, a second package structure, a ceramic-surfaced aluminum plate, and a metal paste. Herein, the ceramic-surfaced aluminum plate has a plurality of through holes filled with the metal paste to correspond with and electrically connect the first conductive pads of the first package structure and the second conductive pads of the second package structure; and the ceramic-surfaced aluminum plate further has a first cavity to receive a chip. Besides, the present invention provides a stacked package module, which can avoid warpage, omit the process for soldering, favor the shrinkage of size and pitch of the conductive pads, and also can reduce the height of the package.

摘要翻译： 本发明涉及堆叠封装模块及其制造方法。 堆叠封装模块包括：第一封装结构，第二封装结构，陶瓷表面铝板和金属膏。 这里，陶瓷表面的铝板具有填充有金属浆料的多个通孔，以对应于并电连接第一封装结构的第一导电焊盘和第二封装结构的第二导电焊盘; 并且陶瓷表面的铝板还具有用于接收芯片的第一腔体。 此外，本发明提供一种能够避免翘曲的堆叠封装模块，省略了焊接工艺，有利于导电焊盘的尺寸和节距的收缩，并且还可以降低封装的高度。

公开(公告)号：US20090113705A1

公开(公告)日：2009-05-07

申请号：US11935994

申请日：2007-11-06

申请人： William S. McKinley ,  Steve T. Nicholas ,  Jeffery A. Dean

发明人： William S. McKinley ,  Steve T. Nicholas ,  Jeffery A. Dean

IPC分类号： H05K3/00 ,  H05K3/36

CPC分类号： H05K1/0353 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01322 ,  H01L2924/14 ,  H05K1/0207 ,  H05K1/021 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/183 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4641 ,  H05K3/4688 ,  H05K3/4697 ,  H05K2201/0323 ,  H05K2201/068 ,  H05K2201/09309 ,  H05K2203/049 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： The present invention relates to a method of manufacturing a printed wiring board (PWB) of the type depicted in FIG. 1, and to the resulting PWB. Such a PWB comprises a first substrate and alternating layers of a second substrate and a metal layer. The layer 2 metallization of the PWB is a thick layer of a composite engineered metal material having a configurable coefficient of thermal expansion (CTE) to provide CTE matching with respect to radio frequency (RF) components mounted on the PWB, and having substantial heat dissipation properties to dissipate heat generated by the RF components. This composite metal layer also provides a ground plane for the RF components.

摘要翻译： 本发明涉及图1所示类型的印刷电路板（PWB）的制造方法。 1和所得的PWB。 这样的PWB包括第一衬底和第二衬底和金属层的交替层。 PWB的层2金属化是具有可配置的热膨胀系数（CTE）的复合工程金属材料的厚层，以提供相对于安装在PWB上的射频（RF）部件的CTE匹配，并且具有显着的散热 性能消散由RF组件产生的热量。 该复合金属层还为RF部件提供接地平面。

公开(公告)号：US20090095521A1

公开(公告)日：2009-04-16

申请号：US12272048

申请日：2008-11-17

申请人： Kishio YOKOUCHI ,  Hideaki YOSHIMURA ,  Katsuya FUKASE

发明人： Kishio YOKOUCHI ,  Hideaki YOSHIMURA ,  Katsuya FUKASE

IPC分类号： H01R12/04 ,  H01K3/10

CPC分类号： H05K1/0366 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/0278 ,  H05K2201/029 ,  H05K2201/0323 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as the thermal expansion coefficient of the circuit board. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs which include first fibers that conduct electricity and second fibers that do not conduct electricity, which have the second fibers disposed at positions where plated through holes will pass through, and which are impregnated with resin; a step of forming through holes at positions in the core portion where the second fibers are disposed; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the first fibers and thereby produce a core substrate.

摘要翻译： 电路板具有以细间距布置的电镀通孔，并满足与电路板的热膨胀系数等特性相关的要求。 一种制造电路板的方法包括：通过热压接预浸料形成芯部的步骤，该预浸料包括导电的第一纤维和不导电的第二纤维，其中第二纤维布置在镀通孔的位置 通过，并用树脂浸渍; 在设置有第二纤维的芯部中的位置形成通孔的工序; 以及在通孔的内表面上形成导电层的步骤，在不干扰第一纤维的位置处形成电镀通孔，从而制造芯基板。

公开(公告)号：US20090084596A1

公开(公告)日：2009-04-02

申请号：US12200920

申请日：2008-08-28

申请人： Yusuke INOUE ,  Eiji MUGIYA ,  Masashi MIYAZAKI ,  Tatsuro SAWATARI ,  Yuichi SUGIYAMA

发明人： Yusuke INOUE ,  Eiji MUGIYA ,  Masashi MIYAZAKI ,  Tatsuro SAWATARI ,  Yuichi SUGIYAMA

IPC分类号： H05K1/11 ,  H05K3/10

CPC分类号： H05K1/185 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/056 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/10636 ,  H05K2203/1152 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

摘要： An electronic part-incorporated multilayer substrate is provided. The multi-layer substrate includes a core formed with a plurality of holes capable of containing an electronic part, a bottom insulating resin layer formed on a bottom surface of the core, a top insulating resin layer formed on a top surface of the core, a wiring layer selectively formed on an outer surface of the bottom insulating resin layer or top insulating resin layer, and an electronic part contained in any of the holes.Both of the bottom and top insulating resin layers have a structure that is a combination of a resin which is changed to cohesiveness when heated and which undergoes smaller plastic deformation when heated to a higher temperature and an insulating resin layer which has a thickness sufficient to maintain insulation between the electronic part or a conductor of the core and the wiring layer and which inherently undergoes small plastic deformation. Thus, the electronic part can be securely and sealed in the hole without using an adhesive separately.

摘要翻译： 提供了一种电子部件合并的多层基板。 多层基板包括形成有能够容纳电子部件的多个孔的芯，形成在芯的底面的底部绝缘树脂层，形成在芯的顶面上的顶部绝缘树脂层， 选择性地形成在底部绝缘树脂层或顶部绝缘树脂层的外表面上的布线层和容纳在任何孔中的电子部件。 底部和顶部绝缘树脂层都具有这样的结构，即当被加热时变为凝聚性的树脂和加热到较高温度时变得较小的塑性变形的树脂和具有足以维持的厚度的绝缘树脂层的组合 电子部件或芯体的导体与布线层之间的绝缘，其固有地经历小的塑性变形。 因此，电子部件可以牢固地密封在孔中而不使用粘合剂。