公开(公告)号：US06963028B2

公开(公告)日：2005-11-08

申请号：US11097136

申请日：2005-04-04

Applicant: Junichi Tanaka ,  Hiroyuki Takubo ,  Shigenobu Abe

Inventor： Junichi Tanaka ,  Hiroyuki Takubo ,  Shigenobu Abe

IPC: B42D15/10 ,  G06K17/00 ,  G06K19/07 ,  G06K19/077 ,  H05K1/02 ,  H05K3/20 ,  H05K3/32 ,  H05K3/34 ,  H05K5/00

CPC classification number: G06K19/0726 ,  G06K19/0723 ,  G06K19/07749 ,  H01L2224/48091 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K3/202 ,  H05K3/328 ,  H05K3/3442 ,  H05K2201/09745 ,  H05K2201/10636 ,  H05K2201/10924 ,  H05K2203/049 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00014

Abstract: An IC module includes a lead frame having terminals that are to be connected to an antenna coil of an IC card, and an IC chip and multilayer chip capacitors for tuning mounted on the lead frame and encapsulated by a resin. The multilayer chip capacitors are mounted in grooves on the lead frame.

Abstract translation: IC模块包括具有要连接到IC卡的天线线圈的端子的引线框架，以及安装在引线框架上并用树脂封装的用于调谐的IC芯片和多层片式电容器。 多层片式电容器安装在引线框架上的凹槽中。

公开(公告)号：US20050200267A1

公开(公告)日：2005-09-15

申请号：US11127095

申请日：2005-05-12

Applicant: Yoshimi Uda ,  Kazuya Ishiwata ,  Shinsaku Kubo ,  Yasuyuki Watanabe

Inventor： Yoshimi Uda ,  Kazuya Ishiwata ,  Shinsaku Kubo ,  Yasuyuki Watanabe

IPC: H01J29/04 ,  H01J1/316 ,  H01J29/02 ,  H01J31/12 ,  H05K1/02 ,  H05K1/09 ,  H05K3/24 ,  H01J1/62

CPC classification number: H05K1/0271 ,  H01J29/02 ,  H01J31/127 ,  H01J2329/0489 ,  H01J2329/861 ,  H05K1/092 ,  H05K3/248 ,  H05K2201/035 ,  H05K2201/09745 ,  H05K2203/0514 ,  Y10T29/49147 ,  Y10T29/49174 ,  Y10T29/53204 ,  Y10T29/53209

Abstract: As a substrate having a fine line and capable of suppressing crack generation in the substrate and peeling of the fine line, the invention discloses a configuration in which plural recesses are arranged on the fine line, and particularly a configuration in which the interval of the plural recesses does not exceed 200 μm. There is also disclosed a configuration in which the plural recesses are arranged along a direction crossing the longitudinal direction of the fine line.

Abstract translation: 作为具有微细线且能够抑制基板中的裂纹产生和细线剥离的基板，本发明公开了一种在细线上布置多个凹槽的结构，特别是其中多个 凹槽不超过200毫米。 还公开了沿着与细线的长度方向交叉的方向配置多个凹部的结构。

公开(公告)号：US20050199680A1

公开(公告)日：2005-09-15

申请号：US11066949

申请日：2005-02-25

Applicant: Yuhsuke Matsumoto ,  Tatsumi Tsuchiya ,  Takaaki Murokawa ,  Yoshio Uematsu ,  Tatsushi Yoshida ,  Nobuyuki Hashi ,  Hiroyasu Tsuchida ,  Takuma Muraki

Inventor： Yuhsuke Matsumoto ,  Tatsumi Tsuchiya ,  Takaaki Murokawa ,  Yoshio Uematsu ,  Tatsushi Yoshida ,  Nobuyuki Hashi ,  Hiroyasu Tsuchida ,  Takuma Muraki

IPC: G11B5/60 ,  B23K1/00 ,  G11B21/21 ,  H05K1/11 ,  H05K3/34

CPC classification number: H05K3/3442 ,  G11B5/4853 ,  H05K1/111 ,  H05K2201/0397 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09745 ,  H05K2201/10727 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613

Abstract: Embodiments of the invention provide techniques to prevent, when a bonding pad and a lead wiring pad are to be connected using a solder ball, the solder ball from deviating from a centerline and a soldering problem from occurring. In one embodiment, a head suspension assembly includes a solder ball disposed between a lead wiring pad provided for a flexure and a bonding pad provided for a slider. The solder ball is then melted for making a soldered joint between the lead wiring pad and the bonding pad. A through slot is provided at a position near a centerline on a front surface of the lead wiring pad. The solder ball is dropped into the through slot by gravity from the front surface of the lead wiring pad. A contact area in contact with the solder ball is thereby secured on a side of the slider.

Abstract translation: 本发明的实施例提供了当使用焊球连接接合焊盘和引线接线焊盘时防止焊料球偏离中心线并发生焊接问题的技术。 在一个实施例中，头悬挂组件包括设置在为弯曲提供的引线布线垫和为滑块设置的接合焊盘之间的焊球。 然后将焊球熔化以在引线接线焊盘和焊盘之间形成焊接接头。 在引线配线衬垫的前表面上的中心线附近的位置处设有通槽。 焊球通过重力从引线接线板的前表面落入通槽。 因此，与滑块接触的接触区域被固定在滑块的一侧。

公开(公告)号：US06929978B2

公开(公告)日：2005-08-16

申请号：US10219173

申请日：2002-08-13

Applicant: Sidney Larry Anderson

Inventor： Sidney Larry Anderson

IPC: H01L23/12 ,  H01L21/48 ,  H01L21/52 ,  H01L21/58 ,  H01L21/60 ,  H01L23/02 ,  H01L23/16 ,  H01L23/31 ,  H01L23/498 ,  H05K1/11 ,  H05K3/40 ,  H01L21/44 ,  H01R43/16

CPC classification number: H01L24/32 ,  H01L21/4853 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13023 ,  H01L2224/16237 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/8547 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/112 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2201/10734 ,  H05K2203/041 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204 ,  H01L2924/00012 ,  H01L2924/207 ,  H01L2924/0133 ,  H01L2924/01049 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/13111 ,  H01L2224/05552 ,  H01L2224/45015 ,  H01L2224/45099

Abstract: An integrated circuit package is provided with a ball landing area having a conductive structure for interlocking a conductive ball to the ball pad. The conductive structure improves the attachment strength between an integrated circuit package and an printed circuit board. In an exemplary embodiment, the locking structure is a conductive material added to the surface of the ball pad to provide a nonplanar interface, such as a dome or a step, which interlocks the conductive ball to the ball pad. The improved package construction increases the area of contact, moves the shear plane to a higher and larger portion on the conductive ball, and/or prevents a crack from propagating along a flat plane across the ball joint. This package construction maintains the small size of the ball land areas and the package, increases the life of the integrated circuit package, while offsetting the problem of package warpage.

Abstract translation: 集成电路封装设置有具有用于将导电球与球垫互锁的导电结构的球着陆区域。 导电结构提高了集成电路封装和印刷电路板之间的附着强度。 在示例性实施例中，锁定结构是添加到球垫表面的导电材料，以提供将导电球与球垫互锁的非平面界面，例如圆顶或台阶。 改进的包装结构增加了接触面积，将剪切平面移动到导电球上的更大和更大的部分，和/或防止裂缝沿着穿过球窝接头的平面传播。 该封装结构保持了球形区域和封装的小尺寸，增加了集成电路封装的使用寿命，同时抵消了封装翘曲的问题。

公开(公告)号：US20050173795A1

公开(公告)日：2005-08-11

申请号：US10772960

申请日：2004-02-05

Applicant: Kenneth Hodson

Inventor： Kenneth Hodson

IPC: B65D81/32 ,  H01L21/60 ,  H01L23/48 ,  H01L23/485 ,  H01L23/498 ,  H05K3/34 ,  H05K3/40

CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16238 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2201/10992 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00

Abstract: Assembly methods and semiconductor device assemblies are disclosed in which corresponding IC sockets and PCB projections are used for alignment and bond formation between IC and PCB components of a completed assembly, for example, a BGA. Embodiments of the invention further provide the capability of disassembly and reassembly.

Abstract translation: 公开了组装方法和半导体器件组件，其中相应的IC插座和PCB突起用于完成组件的IC和PCB部件之间的对准和焊接形成，例如BGA。 本发明的实施例还提供拆卸和重新组装的能力。

公开(公告)号：US20050155789A1

公开(公告)日：2005-07-21

申请号：US11078063

申请日：2005-03-11

Applicant: Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

Inventor： Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

IPC: B32B15/08 ,  B32B27/38 ,  H05K1/05 ,  H05K3/00 ,  H05K3/44 ,  H05K1/03 ,  H05K1/11

CPC classification number: H05K1/056 ,  B32B15/08 ,  B32B27/38 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/0909 ,  H05K2201/09709 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49135 ,  Y10T29/49165 ,  Y10T83/0333 ,  Y10T83/0341 ,  Y10T83/0581 ,  Y10T428/12 ,  Y10T428/12361 ,  Y10T428/15 ,  Y10T428/24298 ,  Y10T428/24314 ,  Y10T428/24917

Abstract: The invention provides a method for manufacturing printed wiring substrates which can manufacture printed wiring substrates each having resin dielectric layers of uniform thickness and excellent surface flatness while maintaining favorable cutting performance in a dicing step. A multi-printed wiring-substrate panel is manufactured which includes a metal plate having a first main surface and a second main surface, and resin dielectric layers disposed on the first and second main surfaces. The metal plate has first depression portions and second depression portions. The first depression portions are opened at the first main surface and arranged discontinuously along predetermined cutting lines. The second depression portions are opened at the second main surface and arranged discontinuously along the predetermined cutting lines. The multi-printed wiring-substrate panel is cut along the predetermined cutting lines into a plurality of printed wiring substrates.

公开(公告)号：US20050121800A1

公开(公告)日：2005-06-09

申请号：US11031859

申请日：2005-01-07

Applicant: Frank Egitto ,  Keith Miller ,  Manh-Quan Nguyen

Inventor： Frank Egitto ,  Keith Miller ,  Manh-Quan Nguyen

IPC: G01R1/067 ,  G01R1/073 ,  H05K3/20 ,  H05K3/40 ,  H05K3/42 ,  H01L21/8234 ,  H01L21/4763 ,  H01L21/8244 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: G01R1/06733 ,  G01R1/0735 ,  H01R12/52 ,  H01R12/7082 ,  H01R12/714 ,  H01R2201/20 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/423 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2201/09845 ,  H05K2201/10378 ,  H05K2203/0369 ,  H05K2203/0733 ,  Y10T29/4922

Abstract: A structure and method to establish an electrical connection between a tester and an electrical component. A flexible dielectric layer has a first side and a second side. A through via extends through the first side and the second side of the dielectric layer. A blind via is placed in a position that is offset from the through via and extends laterally in a first direction from a section of the first through via to a section of the flexible dielectric layer. The blind via extends in a second direction from the first side of the flexible dielectric layer to a section of the flexible dielectric layer that is between the first side and the second side of the dielectric layer. An electrically conductive member extends through the through via and extends into the blind via, thereby filling the through via and the blind via. The electrically conductive member has a first surface and a second surface. Any distance between the first surface and the second surface is greater than a distance between the first side of the dielectric layer and the second side of the dielectric layer.

Abstract translation: 一种在测试仪和电气部件之间建立电气连接的结构和方法。 柔性介电层具有第一面和第二面。 通孔延伸穿过电介质层的第一侧和第二侧。 盲通孔放置在从通孔偏移的位置，并且在从第一通孔的一部分到柔性介电层的一部分的第一方向上横向延伸。 盲孔从柔性介电层的第一侧沿第二方向延伸到介电层的第一侧和第二侧之间的柔性介电层的一部分。 导电构件延伸穿过通孔并延伸到盲孔中，从而填充通孔和盲孔。 导电构件具有第一表面和第二表面。 第一表面和第二表面之间的任何距离都大于电介质层的第一面和电介质层的第二面之间的距离。

公开(公告)号：US20050100720A1

公开(公告)日：2005-05-12

申请号：US11020035

申请日：2004-12-23

Applicant: Seiji Shirai ,  Kenichi Shimada ,  Motoo Asai

Inventor： Seiji Shirai ,  Kenichi Shimada ,  Motoo Asai

IPC: H05K3/10 ,  H05K3/38 ,  H05K3/42 ,  H05K3/46 ,  B32B15/00 ,  B32B3/00

CPC classification number: H05K3/4661 ,  H05K3/108 ,  H05K3/381 ,  H05K3/382 ,  H05K3/421 ,  H05K3/423 ,  H05K2201/0129 ,  H05K2201/015 ,  H05K2201/0278 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09745 ,  Y10T428/24273 ,  Y10T428/24322 ,  Y10T428/24917 ,  Y10T428/31681

Abstract: The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins.

Abstract translation: 本发明提供了一种多层印刷线路板，其具有有利地用于在其上形成精细电路图案的填充通孔结构，并且在热冲击下或由于热循环具有优异的抗开裂性。 多层印刷布线板由交替地彼此堆叠的导体电路层和层间绝缘树脂层构成，层间绝缘树脂层各自形成有各自填充有镀层的孔，以形成通孔。 露出用于通孔的孔的镀层的表面形成为基本上平坦，并且位于与布置在层间绝缘树脂层中的导体电路的表面基本相同的水平。 导体电路层的厚度小于通孔直径的一半，小于25μm。 形成在层间绝缘树脂层中的孔的内壁变粗糙，并且在粗糙化表面上沉积化学镀层。 在包括无电镀层的孔中填充电镀层以形成通孔。 层间绝缘树脂层由显示高断裂韧性的氟树脂和耐热性热塑性树脂，氟树脂和热固性树脂的复合物或热固性和热塑性树脂的复合材料的复合材料形成。

公开(公告)号：US06872436B2

公开(公告)日：2005-03-29

申请号：US10340031

申请日：2003-01-10

Applicant: Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

Inventor： Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

IPC: B32B15/08 ,  B32B27/38 ,  H05K1/05 ,  H05K3/00 ,  H05K3/44 ,  B23B3/10

CPC classification number: H05K1/056 ,  B32B15/08 ,  B32B27/38 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/0909 ,  H05K2201/09709 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49135 ,  Y10T29/49165 ,  Y10T83/0333 ,  Y10T83/0341 ,  Y10T83/0581 ,  Y10T428/12 ,  Y10T428/12361 ,  Y10T428/15 ,  Y10T428/24298 ,  Y10T428/24314 ,  Y10T428/24917

Abstract: The invention provides a method for manufacturing printed wiring substrates which can manufacture printed wiring substrates each having resin dielectric layers of uniform thickness and excellent surface flatness while maintaining favorable cutting performance in a dicing step. A multi-printed wiring-substrate panel is manufactured which includes a metal plate having a first main surface and a second main surface, and resin dielectric layers disposed on the first and second main surfaces. The metal plate has first depression portions and second depression portions. The first depression portions are opened at the first main surface and arranged discontinuously along predetermined cutting lines. The second depression portions are opened at the second main surface and arranged discontinuously along the predetermined cutting lines. The multi-printed wiring-substrate panel is cut along the predetermined cutting lines into a plurality of printed wiring substrates.

公开(公告)号：US20050047009A1

公开(公告)日：2005-03-03

申请号：US10964187

申请日：2004-10-13

Applicant: Tatsumi Tsuchiya ,  Yuhsuke Matsumoto ,  Takaaki Murokawa ,  Naoki Fujii ,  Takuya Satoh ,  Yasuhiro Mita ,  Hiroyasu Tsuchida ,  Yoshio Uematsu

Inventor： Tatsumi Tsuchiya ,  Yuhsuke Matsumoto ,  Takaaki Murokawa ,  Naoki Fujii ,  Takuya Satoh ,  Yasuhiro Mita ,  Hiroyasu Tsuchida ,  Yoshio Uematsu

IPC: G11B5/60 ,  G11B5/48 ,  G11B21/21 ,  H05K1/18 ,  H05K3/34 ,  G11B5/187

CPC classification number: G11B5/4853 ,  G11B5/484 ,  G11B5/486 ,  H01L2224/742 ,  H05K1/189 ,  H05K3/3442 ,  H05K3/3494 ,  H05K2201/0397 ,  H05K2201/09663 ,  H05K2201/09745 ,  H05K2203/041 ,  H05K2203/107 ,  H05K2203/159 ,  Y02P70/613 ,  Y10T29/49025 ,  Y10T29/4903 ,  Y10T29/49032 ,  Y10T29/49046 ,  Y10T29/49144 ,  Y10T29/49179

Abstract: An integrated lead suspension includes a solder ball that is placed between a lead wiring pad provided on a flexure of the suspension, and a bonding pad provided on a slider of a head gimbal section. The lead wiring pad and bonding pad are soldered by melting the solder ball. As a result, there is provided a recessed section into which a solder ball is placed by way of surface raised sections, using gravitational force, in the vicinity of the center line of the surface of the lead wiring pad. In this way the position of the solder ball is not displaced from the center line when a bonding pad and lead wiring pad are connected by means of a solder ball.