公开(公告)号：US10332854B2

公开(公告)日：2019-06-25

申请号：US15332533

申请日：2016-10-24

Applicant: Invensas Corporation

Inventor： Rajesh Katkar ,  Gabriel Z. Guevara ,  Xuan Li ,  Cyprian Emeka Uzoh ,  Guilian Gao ,  Liang Wang

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00

Abstract: A microelectronic package can include a substrate having a first surface and a second surface opposite therefrom, the substrate having a first conductive element at the first surface, and a plurality of wire bonds, each of the wire bonds having a base electrically connected to a corresponding one of the first conductive elements and having a tip remote from the base, each wire bond having edge surfaces extending from the tip toward the base. The microelectronic package can also include an encapsulation having a major surface facing away from the first surface of the substrate, the encapsulation having a recess extending from the major surface in a direction toward the first surface of the substrate, the tip of a first one of the wire bonds being disposed within the recess, and an electrically conductive layer overlying an inner surface of the encapsulation exposed within the recess, the electrically conductive layer overlying and electrically connected with the tip of the first one of the wire bonds.

公开(公告)号：US10290613B2

公开(公告)日：2019-05-14

申请号：US16008531

申请日：2018-06-14

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC: B81B7/00 ,  H01L21/48 ,  H01L23/00 ,  H01L23/42 ,  H01L23/48 ,  H01L25/00 ,  H01L25/16 ,  H01L49/02 ,  H01L23/367 ,  H01L23/498 ,  H01L23/522 ,  H01L23/538 ,  H01L25/065

Abstract: Apparatuses relating generally to a substrate are disclosed. In such an apparatus, first wire bond wires (“first wires”) extend from a surface of the substrate. Second wire bond wires (“second wires”) extend from the surface of the substrate. The first wires and the second wires are external to the substrate. The first wires are disposed at least partially within the second wires. The first wires are of a first height. The second wires are of a second height greater than the first height for coupling of at least one electronic component to the first wires at least partially disposed within the second wires.

公开(公告)号：US20190013287A1

公开(公告)日：2019-01-10

申请号：US16127696

申请日：2018-09-11

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC: H01L23/00 ,  H05K3/34 ,  H01L25/00 ,  H01L25/065 ,  H01L21/683

CPC classification number: H01L24/17 ,  H01L21/6835 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/034 ,  H01L2224/03612 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1012 ,  H01L2224/10155 ,  H01L2224/11003 ,  H01L2224/11013 ,  H01L2224/111 ,  H01L2224/1111 ,  H01L2224/1112 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/11438 ,  H01L2224/1144 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/1161 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11912 ,  H01L2224/13014 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2224/13181 ,  H01L2224/13184 ,  H01L2224/13187 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/13655 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L2224/1401 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81101 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2924/00 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/381 ,  H05K3/3436 ,  H05K3/3478 ,  H05K2203/0415 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/14

Abstract: Representative implementations of devices and techniques provide interconnect structures and components for coupling various carriers, printed circuit board (PCB) components, integrated circuit (IC) dice, and the like, using tall and/or fine pitch physical connections. Multiple layers of conductive structures or materials are arranged to form the interconnect structures and components. Nonwettable barriers may be used with one or more of the layers to form a shape, including a pitch of one or more of the layers.

公开(公告)号：US10103121B2

公开(公告)日：2018-10-16

申请号：US15831231

申请日：2017-12-04

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC: H01L23/00 ,  H01L25/00 ,  H01L21/683 ,  H01L25/065 ,  H05K3/34

Abstract: Representative implementations of devices and techniques provide interconnect structures and components for coupling various carriers, printed circuit board (PCB) components, integrated circuit (IC) dice, and the like, using tall and/or fine pitch physical connections. Multiple layers of conductive structures or materials are arranged to form the interconnect structures and components. Nonwettable barriers may be used with one or more of the layers to form a shape, including a pitch of one or more of the layers.

公开(公告)号：US10090231B2

公开(公告)日：2018-10-02

申请号：US15715515

申请日：2017-09-26

Applicant: INVENSAS CORPORATION

Inventor： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC: H01L23/00 ,  H01L23/498 ,  B32B15/01 ,  B23K35/22 ,  H01L25/00 ,  H01L25/10 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  B23K35/02 ,  B23K1/00 ,  H01L25/065 ,  B23K101/40

Abstract: A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

公开(公告)号：US10026717B2

公开(公告)日：2018-07-17

申请号：US15430943

申请日：2017-02-13

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC: H01L25/065 ,  H01L23/00 ,  H01L49/02 ,  B81B7/00

CPC classification number: H01L25/0657 ,  B81B7/0074 ,  B81C1/0023 ,  H01L21/4853 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/522 ,  H01L23/5383 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2224/0239 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/13616 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14132 ,  H01L2224/14134 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2224/24147 ,  H01L2224/24227 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48149 ,  H01L2224/4903 ,  H01L2224/73201 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/3841 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01028 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/81 ,  H01L2224/45099

Abstract: Apparatuses relating generally to a substrate are disclosed. In such an apparatus, first wire bond wires (“first wires”) extend from a surface of the substrate. Second wire bond wires (“second wires”) extend from the surface of the substrate. The first wires and the second wires are external to the substrate. The first wires are disposed at least partially within the second wires. The first wires are of a first height. The second wires are of a second height greater than the first height for coupling of at least one electronic component to the first wires at least partially disposed within the second wires.

公开(公告)号：US10014243B2

公开(公告)日：2018-07-03

申请号：US15403679

申请日：2017-01-11

Applicant: Invensas Corporation

Inventor： Hong Shen ,  Liang Wang ,  Gabriel Z. Guevara ,  Rajesh Katkar ,  Cyprian Emeka Uzoh ,  Laura Wills Mirkarimi

IPC: H01L23/498 ,  H01L21/48 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/85399

Abstract: An interposer (110) has contact pads at the top and/or bottom surfaces for connection to circuit modules (e.g. ICs 112). The interposer includes a substrate made of multiple layers (110.i). Each layer can be a substrate (110S), possibly a ceramic substrate, with circuitry. The substrates extend vertically. Multiple interposers are fabricated in a single structure (310) made of vertical layers (310.i) corresponding to the interposers' layers. The structure is diced along horizontal planes (314) to provide the interposers. An interposer's vertical conductive lines (similar to through-substrate vias) can be formed on the substrates' surfaces before dicing and before all the substrates are attached to each other. Thus, there is no need to make through-substrate holes for the vertical conductive lines. Non-vertical features can also be formed on the substrates' surfaces before the substrates are attached to each other. Other embodiments are also provided.

公开(公告)号：US10008534B2

公开(公告)日：2018-06-26

申请号：US15461001

申请日：2017-03-16

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L27/146 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L21/56

CPC classification number: H01L27/14634 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/09 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/82 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L27/14618 ,  H01L27/14636 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/09181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48101 ,  H01L2224/48227 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/143 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In a microelectronic package, a first wire bond wire is coupled to an upper surface of a substrate. A first bond mass is coupled to another end of the first wire bond wire. A second wire bond wire is coupled to the upper surface. A second bond mass is coupled to another end of the second wire bond wire. The first and second wire bond wires laterally jut out horizontally away from the upper surface of the substrate for at least a distance of approximately 2 to 3 times a diameter of both the first wire bond wire and the second wire bond wire. The first wire bond wire and the second wire bond wire are horizontal for the distance with respect to being co-planar with the upper surface within +/−10 degrees.

公开(公告)号：US09887166B2

公开(公告)日：2018-02-06

申请号：US15165837

申请日：2016-05-26

Applicant: Invensas Corporation

Inventor： Rajesh Katkar ,  Laura Wills Mirkarimi ,  Arkalgud R. Sitaram ,  Charles G. Woychik

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L23/367 ,  H01L21/66 ,  H01L21/78 ,  H01L23/10 ,  H01L23/14 ,  H01L23/498 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/04 ,  H01L21/784 ,  H01L25/18

CPC classification number: H01L23/562 ,  H01L21/561 ,  H01L21/78 ,  H01L21/784 ,  H01L22/32 ,  H01L23/04 ,  H01L23/10 ,  H01L23/147 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1615 ,  H01L2924/16152 ,  H01L2924/16153 ,  H01L2924/16176 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/1632 ,  H01L2924/164 ,  H01L2924/167 ,  H01L2924/16788 ,  H01L2924/1679 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An assembly with modules (110, 1310) containing integrated circuits and attached to a wiring substrate (120) is reinforced by one or more reinforcement frames (410) attached to the wiring substrate. The modules are located in openings (e.g. cavities and/or through-holes 414) in the reinforcement frame. Other features are also provided.

公开(公告)号：US09865675B2

公开(公告)日：2018-01-09

申请号：US15207837

申请日：2016-07-12

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Rajesh Katkar ,  Hong Shen ,  Cyprian Emeka Uzoh

IPC: H01L49/02

CPC classification number: H01L28/65 ,  H01L28/90 ,  H01L28/92 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15153 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00012

Abstract: In one embodiment, a method for making a 3D Metal-Insulator-Metal (MIM) capacitor includes providing a substrate having a surface, forming an array of upstanding rods or ridges on the surface, depositing a first layer of an electroconductor on the surface and the array of rods or ridges, coating the first electroconductive layer with a layer of a dielectric, and depositing a second layer of an electroconductor on the dielectric layer. In some embodiments, the array of rods or ridges can be made of a photoresist material, and in others, can comprise bonded wires.