公开(公告)号：US4243506A

公开(公告)日：1981-01-06

申请号：US69058

申请日：1979-08-23

申请人： Kiyoji Ikeda ,  Tetsuya Hayashida

发明人： Kiyoji Ikeda ,  Tetsuya Hayashida

IPC分类号： C23F4/00 ,  H01J37/32 ,  B01K1/00

CPC分类号： H01J37/32082 ,  H01J37/32541 ,  H01J2237/334

摘要： A "planar" type plasma-etching apparatus wherein one electrode is a metallic mesh electrode, while the other electrode is a metallic plate electrode, and wherein a work piece is placed outside the mesh electrode. This apparatus has the advantage that a work piece having a large area can be etched uniformly over its whole surface.

摘要翻译： “平面”型等离子体蚀刻装置，其中一个电极是金属网状电极，而另一个电极是金属板电极，并且其中工件放置在网状电极的外部。 该装置的优点是可以在其整个表面上均匀地蚀刻具有大面积的工件。

公开(公告)号：US4926235A

公开(公告)日：1990-05-15

申请号：US106861

申请日：1987-10-13

申请人： Yoichi Tamaki ,  Tokuo Kure ,  Tohru Nakamura ,  Tetsuya Hayashida ,  Kiyoji Ikeda ,  Katsuyoshi Washio ,  Takahiro Onai ,  Akihisa Uchida ,  Kunihiko Watanabe

发明人： Yoichi Tamaki ,  Tokuo Kure ,  Tohru Nakamura ,  Tetsuya Hayashida ,  Kiyoji Ikeda ,  Katsuyoshi Washio ,  Takahiro Onai ,  Akihisa Uchida ,  Kunihiko Watanabe

IPC分类号： H01L21/285 ,  H01L21/763 ,  H01L29/423

CPC分类号： H01L21/763 ,  H01L21/28525 ,  H01L29/42304

摘要： A semiconductor device is disclosed, which includes bipolar transistor each having an emitter, base and collector formed inside each protruding portion of a semiconductor substrate, and trenches for device isolation. The bipolar transistor and the trench are spaced apart from each other by a predetermined spacing. According to this arrangement, the width of a base contact becomes uniform and any change of transistor characteristics can be prevented effectively.

摘要翻译： 公开了一种半导体器件，其包括双极晶体管，每个双极晶体管具有形成在半导体衬底的每个突出部分内的发射极，基极和集电极以及用于器件隔离的沟槽。 双极晶体管和沟槽彼此隔开预定间隔。 根据这种布置，基极接触的宽度变得均匀，并且可以有效地防止晶体管特性的任何变化。

公开(公告)号：US06767767B2

公开(公告)日：2004-07-27

申请号：US10195084

申请日：2002-07-16

申请人： Tetsuya Hayashida ,  Norihiko Kasai

发明人： Tetsuya Hayashida ,  Norihiko Kasai

IPC分类号： H01L2148

CPC分类号： H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48471 ,  H01L2224/49171 ,  H01L2224/4945 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85191 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10T29/49146 ,  Y10T29/49171 ,  Y10T29/49172 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device manufacturing method is disclosed which can reduce the cost of manufacturing an MAP type semiconductor device. According to this method, a substrate with semiconductor chips mounted at predetermined intervals in a matrix shape on a main surface thereof is clamped between a lower mold and an upper mold of a molding die, an insulating resin is injected through gates into a cavity formed on the main surface side of the substrate, air present within the cavity is allowed to escape from air vents, to form a block molding package which covers the semiconductor chips, thereafter bump electrodes are formed on a back surface of the substrate, and then the block molding package and the substrate are cut longitudinally and transversely to fabricate plural semiconductor devices. The air vents are formed by grooves provided in the substrate.

摘要翻译： 公开了可以降低制造MAP型半导体器件的成本的半导体器件制造方法。 根据该方法，将具有半导体芯片的基板以其矩形形式安装在其主表面上被夹持在模具的下模具和上模具之间，绝缘树脂通过浇口注入到形成在 基板的主表面侧，允许存在于空腔内的空气从通气口排出，形成覆盖半导体芯片的块状模塑封装，此后在基板的背面形成凸起电极，然后将块 模制包装和基材纵向和横向地切割以制造多个半导体器件。 通气口由设置在基板中的槽形成。

公开(公告)号：US4812894A

公开(公告)日：1989-03-14

申请号：US191761

申请日：1988-05-03

申请人： Tohru Nakamura ,  Kazuo Nakazato ,  Noriyuki Homma ,  Kazuhiko Sagara ,  Takeo Shiba ,  Tokuo Kure ,  Tetsuya Hayashida

发明人： Tohru Nakamura ,  Kazuo Nakazato ,  Noriyuki Homma ,  Kazuhiko Sagara ,  Takeo Shiba ,  Tokuo Kure ,  Tetsuya Hayashida

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/337 ,  H01L21/822 ,  H01L23/485 ,  H01L27/04 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/41 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732 ,  H01L29/808 ,  H01L29/06

CPC分类号： H01L29/66272 ,  H01L23/485 ,  H01L27/0658 ,  H01L29/0804 ,  H01L29/0808 ,  H01L29/1004 ,  H01L29/41 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/42316 ,  H01L29/8083 ,  H01L2924/0002

摘要： A semiconductor device includes a first insulation film formed on a monocrystalline substrate and having an opening, a monocrystalline semiconductor layer formed so as to protrude into the first insulation film, and a conductive layer formed in contact with the side section of the monocrystalline semiconductor layer and extending over a second insulation film formed on the monocrystalline semiconductor layer.

摘要翻译： 半导体器件包括形成在单晶衬底上并具有开口的第一绝缘膜，形成为突出到第一绝缘膜中的单晶半导体层和与单晶半导体层的侧部接触形成的导电层，以及 在形成在单晶半导体层上的第二绝缘膜上延伸。

公开(公告)号：US06787442B2

公开(公告)日：2004-09-07

申请号：US10358191

申请日：2003-02-05

申请人： Tetsuya Hayashida

发明人： Tetsuya Hayashida

IPC分类号： H01L2144

CPC分类号： H01L24/12 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3463 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： By a solder bump, a CSP is bonded to a first electrode of the module substrate of a multi-chip module. For this solder bump, a solder added with an alkaline earth metal such as Ba, Be, Ca or Mg is used. Accordingly, upon solder reflow, phosphorous (P) reacts with the alkaline earth metal, thereby forming a P compound. Owing to dispersion of this P compound inside of the solder bump, no P concentrated layer is formed on the Ni film, making it possible to prevent peeling of the solder bump from the first electrode upon solder reflow. Thus, the present invention makes it possible to improve the solder bonding property.

摘要翻译： 通过焊料凸块，CSP被结合到多芯片模块的模块基板的第一电极。 对于该焊锡凸块，使用添加有碱土金属如Ba，Be，Ca或Mg的焊料。 因此，在回流焊时，磷（P）与碱土金属反应，形成P化合物。 由于该P化合物在焊料凸块内分散，所以在Ni膜上不形成P浓缩层，从而可以防止在焊料回流时焊料凸起与第一电极的剥离。 因此，本发明可以提高焊接性能。

公开(公告)号：US06780677B2

公开(公告)日：2004-08-24

申请号：US10224339

申请日：2002-08-21

申请人： Satoshi Imasu ,  Ikuo Yoshida ,  Tetsuya Hayashida ,  Akira Yamagiwa ,  Shinobu Takeura

发明人： Satoshi Imasu ,  Ikuo Yoshida ,  Tetsuya Hayashida ,  Akira Yamagiwa ,  Shinobu Takeura

IPC分类号： H01L2144

CPC分类号： H05K1/111 ,  H01L21/563 ,  H01L23/13 ,  H01L23/24 ,  H01L23/49811 ,  H01L23/5383 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2225/1023 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H05K1/0271 ,  H05K1/114 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/091 ,  H05K2201/09472 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/10674 ,  H05K2203/1581 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/00

摘要： An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.

公开(公告)号：US06380621B1

公开(公告)日：2002-04-30

申请号：US09543769

申请日：2000-04-05

申请人： Hideko Ando ,  Hiroshi Kikuchi ,  Toshihiko Sato ,  Tetsuya Hayashida

发明人： Hideko Ando ,  Hiroshi Kikuchi ,  Toshihiko Sato ,  Tetsuya Hayashida

IPC分类号： H01L2310

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/3735 ,  H01L23/433 ,  H01L24/81 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/351 ,  H05K3/303 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/094 ,  H05K2201/09781 ,  H05K2201/2036 ,  H05K2203/047 ,  Y02P70/613 ,  H01L2924/00

摘要： An electrically reliable heat radiating package provided with ball grid array (BGA) structure and a method of manufacturing the package are disclosed. In the concrete, a semiconductor chip is mounted on one surface of a ceramic wiring board via a first soldered bump electrode and resin is filled in a gap area between the one surface of the wiring board and the principal surface of the semiconductor chip. A heat diffusing plate formed in larger plane size than that of the semiconductor chip by aluminum nitride is arranged on the rear surface opposite to the principal surface of the semiconductor chip and soldered. Further, a radiating fin made of aluminum is provided on the heat diffusing plate and stuck via silicone rubber in which thermally conductive filler is included. Further, the above first soldered bump electrode and a second soldered bump electrode with a lower melting point than that of solder used for the above soldering are formed on the rear surface of the above ceramic wiring board and the above BGA package provided with heat radiating structure is formed. This BGA package is mounted on a glass epoxy wiring board at low temperature.

摘要翻译： 公开了一种具有球栅阵列（BGA）结构的电可靠性散热封装和制造该封装的方法。具体而言，通过第一焊接突起电极和树脂将半导体芯片安装在陶瓷布线板的一个表面上 填充在布线板的一个表面和半导体芯片的主表面之间的间隙区域中。 在与半导体芯片的主表面相对的后表面上布置有由氮化铝形成的具有比半导体芯片更大的平面尺寸的热扩散板并焊接。此外，在散热片上设置由铝制成的散热片 并通过其中包含导热填料的硅橡胶粘贴。此外，上述第一焊接凸块电极和熔点低于用于上述焊接的焊料熔点低的第二焊接凸块电极形成在 形成陶瓷布线板以上的上述BGA封装，并具有散热结构。该BGA封装在低温下安装在玻璃环氧树脂布线板上。

公开(公告)号：US5865365A

公开(公告)日：1999-02-02

申请号：US761430

申请日：1996-12-06

申请人： Toru Nishikawa ,  Ryohei Satoh ,  Masahide Hara ,  Tetsuya Hayashida ,  Mitugu Shirai ,  Osamu Yamada ,  Hiroko Takehara ,  Yasuhiro Iwata ,  Mitsunori Tamura ,  Masahito Ijuin

发明人： Toru Nishikawa ,  Ryohei Satoh ,  Masahide Hara ,  Tetsuya Hayashida ,  Mitugu Shirai ,  Osamu Yamada ,  Hiroko Takehara ,  Yasuhiro Iwata ,  Mitsunori Tamura ,  Masahito Ijuin

IPC分类号： B23K1/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/60 ,  H01L21/68 ,  H01L23/498 ,  H05K3/34

CPC分类号： H01L24/12 ,  B23K1/0016 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H05K3/3489 ,  B23K2201/40 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/83805 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/3025 ,  H05K2203/0278 ,  H05K2203/041 ,  H05K2203/0435 ,  H05K2203/086 ,  H05K2203/087 ,  H05K2203/095 ,  H05K2203/1157 ,  H05K3/3426

摘要： A method of soldering used in fabricating an electronic circuit device employs an organic material supplied to at least one of the connecting members to be bonded. The connecting members are positioned in an oxidizing atmosphere, and heated in a nonoxidizing atmosphere to remove oxide and/or contamination layers present on the surface of presoldered portions or metallized bonding portions. By this method, fluxless soldering is performed, positional shifts are reduced, and high reliability of the soldering connections with reduction in residues after reflow are obtained.

摘要翻译： 用于制造电子电路器件的焊接方法使用供应至待接合的至少一个连接部件的有机材料。 连接构件位于氧化气氛中，并在非氧化气氛中加热以除去存在于预制部分或金属化粘合部分的表面上的氧化物和/或污染层。 通过该方法，进行无焊剂焊接，位移偏移降低，并且获得了在回流之后具有减少残留物的焊接连接的高可靠性。

公开(公告)号：US5276586A

公开(公告)日：1994-01-04

申请号：US872178

申请日：1992-04-22

申请人： Toshio Hatsuda ,  Takahiro Daikoku ,  Tetsuya Hayashida ,  Noriyuki Ashiwake ,  Fumiyuki Kobayashi ,  Keizou Kawamura ,  Sohji Sakata

发明人： Toshio Hatsuda ,  Takahiro Daikoku ,  Tetsuya Hayashida ,  Noriyuki Ashiwake ,  Fumiyuki Kobayashi ,  Keizou Kawamura ,  Sohji Sakata

IPC分类号： H01L23/36 ,  H01L23/433 ,  H01L25/065 ,  H05K7/20

CPC分类号： H01L24/33 ,  H01L23/433 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/83051 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/16152

摘要： A semiconductor module comprises a substrate, a plurality of semiconductor chips mounted on the substrate, a plurality of heat conduction members mounted on the back surfaces of the plurality of semiconductor chips, respectively, and a cooling jacket, on which the plurality of heat conduction members are bonded with heat conductive bonding agent, sealed with the substrate, wherein, in a surface of each of the plurality of heat conduction members adjacent to the cooling jacket and in a surface of the cooling jacket adjacent to the heat conduction members, around a portion corresponding to the back surface of each of the semiconductor chip is formed a portion which has non-affinity for the heat conductive bonding agent. Further, it is preferred that a reservoir having an affinity for the heat conductive bonding agent and serving to receive an excessive bonding agent is formed around each of the non-affinity portions of the plurality of heat conduction members and the cooling jacket.

摘要翻译： 半导体模块包括基板，安装在基板上的多个半导体芯片，分别安装在多个半导体芯片的背面上的多个导热部件和冷却套，多个导热部件 与导热接合剂接合，用基板密封，其中，在与冷却套相邻的多个热传导构件的每一个的表面中以及在与热传导构件相邻的冷却套的表面中， 对应于每个半导体芯片的背表面形成对于导热粘合剂具有非亲和性的部分。 此外，优选在多个导热构件和冷却套中的每个非亲合部分周围形成对导热粘合剂具有亲和力并用于接收过量粘合剂的储存器。

公开(公告)号：US4575399A

公开(公告)日：1986-03-11

申请号：US689803

申请日：1985-01-08

申请人： Toshihiko Tanaka ,  Norio Hasegawa ,  Tetsuya Hayashida

发明人： Toshihiko Tanaka ,  Norio Hasegawa ,  Tetsuya Hayashida

IPC分类号： H01L21/027 ,  G03F7/09 ,  G03F9/00 ,  H01L21/30 ,  G03C5/00 ,  B05D3/06 ,  B32B31/00

CPC分类号： G03F9/7076 ,  G03F7/091 ,  G03F9/00 ,  G03F9/7084 ,  Y10S430/146

摘要： An anti-reflective coating film is formed on a resist film formed on a substrate having a target pattern formed on its surface, thereby to reduce multiple reflection of light in said resist film. The distortion of the pattern detection signal due to multiple reflection in said resist film is thereby prevented to improve the mask positioning accuracy.

摘要翻译： 在形成在其表面上形成有目标图案的基板上的抗蚀剂膜上形成抗反射涂膜，从而减少所述抗蚀剂膜中的光的多次反射。 由此防止了由于所述抗蚀剂膜中的多次反射引起的图案检测信号的失真，从而提高了掩模定位精度。