公开(公告)号：US06486003B1

公开(公告)日：2002-11-26

申请号：US09520320

申请日：2000-03-07

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L2144

CPC classification number: H01L24/83 ,  H01L23/12 ,  H01L23/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/83138 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/85191 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of fabricating a microelectronic package comprising an expandable structure includes the steps of providing first and second microelectronic elements having electrically conductive parts, providing the expandable structure between the microelectronic elements, connecting the electrically conductive parts together so that the microelectronic elements are electrically interconnected, and expanding the expandable structure after the connecting step so that the microelectronic elements move away from one another. The expandable structure is more rigid before the expanding step and less rigid after the expanding step. During the expanding step, the expandable structure remains in contact with the microelectronic elements and the microelectronic elements remain electrically interconnected. A microelectronic package including an expandable structure is also disclosed.

Abstract translation: 制造包括可扩展结构的微电子封装的方法包括以下步骤：提供具有导电部分的第一和第二微电子元件，在微电子元件之间提供可扩展结构，将导电部分连接在一起，使得微电子元件电互连， 并且在连接步骤之后使可扩展结构膨胀，使得微电子元件彼此远离。 可膨胀结构在膨胀步骤之前更刚性，在膨胀步骤后刚性较差。 在膨胀步骤期间，可膨胀结构保持与微电子元件接触，并且微电子元件保持电互连。 还公开了一种包括可扩展结构的微电子封装。

公开(公告)号：US06458681B1

公开(公告)日：2002-10-01

申请号：US09638079

申请日：2000-08-14

Applicant: Thomas H. DiStefano ,  Joseph Fjelstad

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: H01L2144

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/32 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/08225 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/80203 ,  H01L2224/80207 ,  H01L2224/81192 ,  H01L2224/81904 ,  H01L2224/83209 ,  H01L2224/9212 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/80001 ,  H01L2224/81

Abstract: A method of providing a substantially void free layer for one or more flip chip assemblies, or one or more microelectronic components, utilizing a curable encapsulant. Also disclosed is a method of injecting an encapsulant into an assembly and a method of treating a microelectronic component to form a void free layer.

Abstract translation: 一种利用可固化密封剂为一个或多个倒装芯片组件或一个或多个微电子部件提供基本无空隙的方法。 还公开了将密封剂注入到组件中的方法以及处理微电子部件以形成无空隙层的方法。

公开(公告)号：US06317974B1

公开(公告)日：2001-11-20

申请号：US09168259

申请日：1998-10-08

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01R900

CPC classification number: H01R13/03 ,  H01R4/58 ,  H05K3/064 ,  H05K2201/0347 ,  H05K2203/0353 ,  H05K2203/0571 ,  H05K2203/0597 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149

Abstract: A method of making a contact having a wear resistant edge by forming a photoresist layer on a copper clad polyimide composite structure, patterning the photoresist layer to expose a portion of the copper; etching the copper to form a contact and/or contact tabs having etched edges, and plating a wear resistant material on the etched edges. After the photoresist layer is stripped, the top portion of the contact and/or contact tabs are etched to height that is below the height of the wear resistant edge.

Abstract translation: 一种通过在铜包覆的聚酰亚胺复合结构上形成光致抗蚀剂层来形成具有耐磨边缘的接触的方法，图案化光致抗蚀剂层以露出铜的一部分; 蚀刻铜以形成具有蚀刻边缘的接触片和/或接触片，以及在耐腐蚀的边缘上镀覆耐磨材料。 在剥离光致抗蚀剂层之后，接触和/或接触片的顶部被蚀刻到低于耐磨边缘的高度的高度。

公开(公告)号：US06284563B1

公开(公告)日：2001-09-04

申请号：US09071412

申请日：1998-05-01

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L2144

CPC classification number: H01L23/3114 ,  H01L23/3121 ,  H01L23/4951 ,  H01L23/498 ,  H01L23/525 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/72 ,  H01L24/82 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/85424 ,  H01L2924/00011 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2924/01004

Abstract: A method of making a compliant microelectronic assembly includes providing a microelectronic element having a first surface, the first surface having a central region and a peripheral region surrounding the central region, the microelectronic element including a plurality of contacts disposed in the central region and providing a compliant layer over the peripheral region of the first surface, the compliant layer having a bottom surface facing toward the first surface of the microelectronic element, a top surface facing upwardly away from the microelectronic element and one or more edge surfaces extending between the top and bottom surfaces. Next, flexible bond ribbons are selectively formed over the compliant layer so that the bond ribbons extend over the top surface and one or more of the edge surfaces and the bond ribbons electrically connect the contacts to conductive terminals overlying the top surface of the compliant layer.

Abstract translation: 一种制造柔性微电子组件的方法包括提供具有第一表面的微电子元件，所述第一表面具有中心区域和围绕中心区域的周边区域，所述微电子元件包括设置在所述中心区域中的多个触点， 柔性层具有面向微电子元件的第一表面的底表面，面向上远离微电子元件的顶表面和在顶部和底部之间延伸的一个或多个边缘表面 表面。 接下来，在柔性层上选择性地形成柔性粘结带，使得结合带在顶表面上延伸，并且一个或多个边缘表面和接合带将触点电连接到覆盖顺应层的顶表面的导电端子。

公开(公告)号：US06274820B1

公开(公告)日：2001-08-14

申请号：US09653930

申请日：2000-09-01

Applicant: Thomas H. DiStefano ,  John W. Smith ,  Konstantine N. Karavakis ,  Zlata Kovac ,  Joseph Fjelstad

Inventor： Thomas H. DiStefano ,  John W. Smith ,  Konstantine N. Karavakis ,  Zlata Kovac ,  Joseph Fjelstad

IPC: H01R909

CPC classification number: H01R13/2414 ,  H01R12/714 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/445 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0382 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts expand radially and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by conductive bonding material carried on the contacts themselves.

Abstract translation: 用于微电子电路板之间的互连的插入件在其表面具有接触。 每个接触件具有垂直于表面的中心轴线和适于根据由接合电路板上的焊盘施加的力而从中心轴线径向向外扩张的外围部分。 因此，当电路板被内插件压缩时，触头径向膨胀并擦过焊盘。 擦拭动作有助于将接触件接合到焊盘，如通过接触件本身上承载的导电接合材料。

公开(公告)号：US06229100B1

公开(公告)日：2001-05-08

申请号：US09234650

申请日：1999-01-21

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01R1204

CPC classification number: H05K3/4092 ,  H01L23/32 ,  H01L23/49811 ,  H01L24/72 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/351 ,  Y10T29/49117 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  H01L2924/00

Abstract: A connector for microelectronic elements includes electrically conductive, elongated leads having contact portions underlying a compliant layer. The contact portion of each lead overlies a pedestal portion of the compliant layer. The pedestal portion is at least partially isolated from the remaining portion of the compliant layer by gaps in the compliant layer. The pedestals may thus deflect horizontally, compensating for relative movement between the connector and the microelectronic element. Portions of the leads spanning the gaps may be curved to facilitate deflection. The pedestals may be attached to a substrate having terminals. A terminal end of each lead is then electrically connected to the terminal in the substrate, either through a plated through-hole, or by bending downward and bonding. The pedestals may support a plurality of leads along their length. Alternatively, the pedestals may support only a single respective lead, in which case the pedestal is isolated from neighboring pedestals and may deflect in a plurality of horizontal directions.

Abstract translation: 用于微电子元件的连接器包括导电的细长导线，其具有位于柔顺层下面的接触部分。 每个引线的接触部分覆盖柔性层的基座部分。 通过顺应层中的间隙，基座部分至少部分地与柔性层的剩余部分隔离。 因此，基座可能水平偏转，补偿连接器和微电子元件之间的相对运动。 跨越间隙的引线的一些部分可以是弯曲的以便于偏转。 基座可以附接到具有端子的基板。 然后，每个引线的末端通过电镀通孔或通过向下弯曲和结合而电连接到衬底中的端子。 基座可以沿其长度支撑多个引线。 或者，基座可以仅支撑单个相应的引线，在这种情况下，基座与相邻的基座隔离并且可以在多个水平方向上偏转。

公开(公告)号：US06211690B1

公开(公告)日：2001-04-03

申请号：US09170904

申请日：1998-10-13

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: G01R1073

CPC classification number: G01R1/07328 ,  G01R31/2805 ,  H05K1/118 ,  H05K3/326

Abstract: A testing fixture for microelectronic elements is in the nature of an interposer which is operative for receiving a plurality of test probes. The interposer enables the simultaneous testing of contacts on the microelectronic element which are arranged in both high contact pitch density areas and normal contact pitch density areas. The contacts on the microelectronic element within the high contact pitch density areas are accessed by conductive leads on the interposer having rigid portions arranged in a corresponding high contact pitch density.

Abstract translation: 用于微电子元件的测试夹具是插入器的性质，其可操作用于接收多个测试探针。 插入器能够同时测试布置在高接触间距密度区域和正常接触间距密度区域中的微电子元件上的触点。 在高接触间距密度区域内的微电子元件上的触点由具有以相应的高接触间距密度排列的刚性部分的插入件上的导电引线接近。

公开(公告)号：US06205660B1

公开(公告)日：2001-03-27

申请号：US08845014

申请日：1997-04-22

Applicant: Joseph Fjelstad ,  John W. Smith ,  Thomas H. Distefano ,  James Zaccardi ,  A. Christian Walton

Inventor： Joseph Fjelstad ,  John W. Smith ,  Thomas H. Distefano ,  James Zaccardi ,  A. Christian Walton

IPC: H01R4300

CPC classification number: H05K7/1084 ,  G01R1/0466 ,  G01R1/06711 ,  G01R1/06727 ,  G01R1/06733 ,  G01R1/06744 ,  G01R1/07357 ,  G01R3/00 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/81 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/8114 ,  H01L2224/81385 ,  H01L2224/81899 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01R12/7076 ,  H01R13/2485 ,  H05K1/118 ,  H05K3/326 ,  H05K3/3431 ,  H05K3/3436 ,  H05K3/4092 ,  H05K7/1069 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/1059 ,  H05K2201/10734 ,  Y02P70/613 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49204 ,  Y10T29/4921 ,  Y10T29/49222 ,  Y10T29/49224 ,  H01L2924/00

Abstract: Microelectronic contacts, such as flexible, tab-like, cantilever contacts, are provided with asperities disposed in a regular pattern. Each asperity has a sharp feature at its tip remote from the surface of the contact. As mating microelectronic elements are engaged with the contacts, a wiping action causes the sharp features of the asperities to scrape the mating element, so as to provide effective electrical interconnection and, optionally, effective metallurgical bonding between the contact and the mating element upon activation of a bonding material.

Abstract translation: 诸如柔性的，片状的悬臂触点之类的微电子触点具有以规则图案设置的凹凸。 每个粗糙部分的尖端具有远离接触表面的尖端特征。 当配合的微电子元件与触点接合时，擦拭动作导致粗糙的尖锐特征刮擦配合元件，以便在触发和配合元件激活时提供有效的电互连和任选的有效的冶金结合 接合材料。

公开(公告)号：US06204091B1

公开(公告)日：2001-03-20

申请号：US09505609

申请日：2000-02-17

Applicant: John W. Smith ,  Joseph Fjelstad

Inventor： John W. Smith ,  Joseph Fjelstad

IPC: H01L2334

CPC classification number: H01L23/3107 ,  H01L21/56 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L24/81 ,  H01L24/84 ,  H01L24/92 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/4024 ,  H01L2224/92122 ,  H01L2224/84 ,  H01L2924/00014

Abstract: A method of encapsulating a microelectronic assembly includes providing one or more microelectronic assemblies having one or more elements defining exterior surfaces and an array of terminals exposed at the exterior surfaces, the one or more elements defining one or more apertures through the exterior surfaces. A layer of a curable barrier material is then provided on a supporting element. The barrier layer has openings therein in a pattern corresponding to the array of terminals on the one or more microelectronic assemblies. The supporting element and the one or more microelectronic elements are then assembled together so that the layer of barrier material contacts the exterior surfaces and covers the apertures and so that the openings in the layer of barrier material are aligned with the terminals. The barrier material is then cured while in contact with the exterior surfaces to thereby form a barrier layer covering the apertures. Next, a curable liquid encapsulant is applied to the microelectronic assemblies, whereby the barrier layer prevents the curable liquid encapsulant from flowing through the apertures, and the encapsulant is cured. The barrier layer and the supporting element cooperatively surround the terminals exposed at the exterior surfaces to protect the terminals from contaminants.

Abstract translation: 封装微电子组件的方法包括提供一个或多个微电子组件，其具有限定外表面的一个或多个元件和暴露在外表面处的端子阵列，所述一个或多个元件限定通过外表面的一个或多个孔。 然后在支撑元件上设置一层可固化阻挡材料。 阻挡层在其中具有对应于一个或多个微电子组件上的端子阵列的图案中的开口。 然后将支撑元件和一个或多个微电子元件组装在一起，使得阻挡层的层与外表面接触并覆盖孔，使得阻挡材料层中的开口与端子对准。 然后在与外表面接触的同时固化阻挡材料，从而形成覆盖孔的阻挡层。 接下来，将可固化液体密封剂施加到微电子组件，由此阻挡层防止可固化液体密封剂流过孔，并且密封剂固化。 阻挡层和支撑元件协同地围绕暴露在外表面处的端子以保护端子免受污染物的影响。

公开(公告)号：US6130116A

公开(公告)日：2000-10-10

申请号：US984933

申请日：1997-12-04

Applicant: John W. Smith ,  Joseph Fjelstad

Inventor： John W. Smith ,  Joseph Fjelstad

IPC: H01L21/56 ,  H01L23/31

CPC classification number: H01L23/3107 ,  H01L21/56 ,  H01L24/40 ,  H01L24/73 ,  H01L24/81 ,  H01L24/84 ,  H01L24/92 ,  H01L2224/4024 ,  H01L2224/92122

Abstract: A method of encapsulating a microelectronic assembly includes providing one or more microelectronic assemblies having one or more elements defining exterior surfaces and an array of terminals exposed at the exterior surfaces, the one or more elements defining one or more apertures through the exterior surfaces. A layer of a curable barrier material is then provided on a supporting element. The barrier layer has openings therein in a pattern corresponding to the array of terminals on the one or more microelectronic assemblies. The supporting element and the one or more microelectronic elements are then assembled together so that the layer of barrier material contacts the exterior surfaces and covers the apertures and so that the openings in the layer of barrier material are aligned with the terminals. The barrier material is then cured while in contact with the exterior surfaces to thereby form a barrier layer covering the apertures. Next, a curable liquid encapsulant is applied to the microelectronic assemblies, whereby the barrier layer prevents the curable liquid encapsulant from flowing through the apertures, and the encapsulant is cured. The barrier layer and the supporting element cooperatively surround the terminals exposed at the exterior surfaces to protect the terminals from contaminants.

Abstract translation: 封装微电子组件的方法包括提供一个或多个微电子组件，其具有限定外表面的一个或多个元件和暴露在外表面处的端子阵列，所述一个或多个元件限定通过外表面的一个或多个孔。 然后在支撑元件上设置一层可固化阻挡材料。 阻挡层在其中具有对应于一个或多个微电子组件上的端子阵列的图案中的开口。 然后将支撑元件和一个或多个微电子元件组装在一起，使得阻挡层的层与外表面接触并覆盖孔，使得阻挡材料层中的开口与端子对准。 然后在与外表面接触的同时固化阻挡材料，从而形成覆盖孔的阻挡层。 接下来，将可固化液体密封剂施加到微电子组件，由此阻挡层防止可固化液体密封剂流过孔，并且密封剂固化。 阻挡层和支撑元件协同地围绕暴露在外表面处的端子以保护端子免受污染物的影响。