公开(公告)号：US07745322B2

公开(公告)日：2010-06-29

申请号：US12032159

申请日：2008-02-15

申请人： Hun-Teak Lee ,  Jong-Kook Kim ,  Chul-Sik Kim ,  Ki-Youn Jang ,  Rajendra D. Pendse

发明人： Hun-Teak Lee ,  Jong-Kook Kim ,  Chul-Sik Kim ,  Ki-Youn Jang ,  Rajendra D. Pendse

IPC分类号： H01L21/44

CPC分类号： H01L24/85 ,  H01L23/13 ,  H01L23/4952 ,  H01L23/49833 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48455 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48479 ,  H01L2224/4848 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48699 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/85205 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2924/2065 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554

摘要： A wire bond interconnection between a die pad and a bond finger includes a support pedestal at a bond site of the lead finger, a ball bond on the die pad, and a stitch bond on the support pedestal, in which a width of the lead finger at the bond site is less than a diameter of the support pedestal. Also, a semiconductor package including a die mounted onto and electrically connected by a plurality of wire bonds to a substrate, in which each of the wire bonds includes a wire ball bonded to a pad on the die and stitch bonded to a support pedestal on a bond site on a lead finger, and in which the width of the lead finger at the bond site is less than the diameter of the support pedestal.

摘要翻译： 芯片焊盘和键合指状物之间的引线键合互连包括在引线指的键合位置处的支撑基座，芯片焊盘上的球接合以及支撑基座上的线圈接合，其中引线指 在焊接点处小于支撑基座的直径。 此外，包括安装在多个引线键合并且电连接到基板的裸片的半导体封装，其中每个引线键合包括接合到模具上的焊盘的线球，并且在与基板上的支撑基座上接合 引线指的键位置，并且其中引线指在键合位置处的宽度小于支撑基座的直径。

公开(公告)号：US07742313B2

公开(公告)日：2010-06-22

申请号：US11416740

申请日：2006-05-03

申请人： Mung Suan Heng ,  Kok Chua Tan ,  Vince Chan Seng Leong ,  Mark S. Johnson

发明人： Mung Suan Heng ,  Kok Chua Tan ,  Vince Chan Seng Leong ,  Mark S. Johnson

IPC分类号： H05K1/11 ,  H05K1/14

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16148 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48149 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4846 ,  H01L2224/48464 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48496 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10T29/49144 ,  Y10T29/49149 ,  H01L2224/85186 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/4554 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/85399

摘要： Stacked microfeature devices and associated methods of manufacture are disclosed. A package in accordance with one embodiment includes first and second microfeature devices having corresponding first and second bond pad surfaces that face toward each other. First bond pads can be positioned at least proximate to the first bond pad surface and second bond pads can be positioned at least proximate to the second bond pad surface. A package connection site can provide electrical communication between the first microfeature device and components external to the package. A wirebond can be coupled between at least one of the first bond pads and the package connection site, and an electrically conductive link can be coupled between the first microfeature device and at least one of the second bond pads of the second microfeature device. Accordingly, the first microfeature device can form a portion of an electrical link to the second microfeature device.

摘要翻译： 公开了堆叠的微特征装置和相关的制造方法。 根据一个实施例的封装包括具有彼此面对的相应的第一和第二接合焊盘表面的第一和第二微特征器件。 第一接合焊盘可以至少靠近第一接合焊盘表面定位，并且第二接合焊盘可以至少靠近第二接合焊盘表面定位。 包装连接部位可以在第一微型装置和包装外部的部件之间提供电连通。 引线键可以耦合在第一接合焊盘和封装连接位置中的至少一个上，并且导电链路可以耦合在第一微功能设备和第二微功能设备的至少一个第二接合焊盘之间。 因此，第一微功能设备可以形成到第二微功能设备的电连接的一部分。

公开(公告)号：US20100140783A1

公开(公告)日：2010-06-10

申请号：US12329800

申请日：2008-12-08

申请人： Byung Tai Do ,  Reza A. Pagaila ,  Linda Pei Ee Chua

发明人： Byung Tai Do ,  Reza A. Pagaila ,  Linda Pei Ee Chua

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L21/00 ,  H01L21/44

CPC分类号： H01L23/4952 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3107 ,  H01L23/3185 ,  H01L23/49541 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/02333 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/056 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/4848 ,  H01L2224/48992 ,  H01L2224/49111 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/83805 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2224/85186 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/45099 ,  H01L2224/4554

摘要： A semiconductor wafer contains a plurality of semiconductor die each having a peripheral area around the die. A recessed region with angled or vertical sidewall is formed in the peripheral area. A conductive layer is formed in the recessed region. A first stud bump is formed over a contact pad of the semiconductor die. A second stud bump is formed over the first conductive layer within the recessed region. A bond wire is formed between the first and second stud bumps. A third stud bump is formed over the bond wire and first stud bump. A dicing channel partially formed through the peripheral area. The semiconductor wafer undergoes backgrinding to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die. The semiconductor die can be disposed in a semiconductor package with other components and electrically interconnected through the bond wire and stud bumps.

摘要翻译： 半导体晶片包含多个半导体管芯，每个半导体管芯具有围绕管芯的周边区域。 具有倾斜或垂直侧壁的凹陷区域形成在周边区域中。 在凹陷区域中形成导电层。 在半导体管芯的接触焊盘上形成第一螺柱凸块。 在凹陷区域内的第一导电层上方形成第二凸起凸块。 在第一和第二突起之间形成接合线。 在接合线和第一凸起凸起上形成第三个凸起凸块。 通过外围区域部分地形成的切割通道。 半导体晶片经历对切割通道的后研磨，以切割半导体晶片并分离半导体管芯。 半导体管芯可以配置在具有其它部件的半导体封装中，并且通过接合线和柱形凸起电互连。

公开(公告)号：US20090321952A1

公开(公告)日：2009-12-31

申请号：US12165391

申请日：2008-06-30

申请人： XingZhi Liang ,  HaiBo Fang ,  Li Wang

发明人： XingZhi Liang ,  HaiBo Fang ,  Li Wang

IPC分类号： H01L23/49

CPC分类号： H01L24/85 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/4845 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/48699 ,  H01L2224/48744 ,  H01L2224/48844 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/49429 ,  H01L2224/85045 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85444 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2224/85186 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/78 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A low profile semiconductor package is disclosed including at least first and second stacked semiconductor die mounted to a substrate. The first semiconductor die may be electrically coupled to the substrate with a plurality of stitches in a forward ball bonding process. The second semiconductor die may in turn be electrically coupled to the first semiconductor die using a second set of stitches bonded between the die bond pads of the first and second semiconductor die. The second set of stitches may each include a lead end having a stitch ball that is bonded to the bond pads of the second semiconductor die. The tail end of each stitch in the second set of stitches may be wedge bonded directly to lead end of a stitch in the first set of stitches.

摘要翻译： 公开了一种低剖面半导体封装，其包括至少安装到衬底的第一和第二层叠半导体管芯。 第一半导体管芯可以在前球接合工艺中以多个针脚电耦合到衬底。 第二半导体管芯可以依次使用第二组线圈电耦合到第一半导体管芯，该第二组线圈接合在第一和第二半导体管芯的管芯接合焊盘之间。 第二组线圈可以各自包括具有接合到第二半导体管芯的接合焊盘的针脚的引线端。 第二组线圈中的每个线圈的尾端可以直接楔形地结合到第一组线圈中的线圈的前端。

公开(公告)号：US20090321927A1

公开(公告)日：2009-12-31

申请号：US12557986

申请日：2009-09-11

申请人： Takao Nishimura ,  Yoshiaki Narisawa

发明人： Takao Nishimura ,  Yoshiaki Narisawa

IPC分类号： H01L23/49 ,  H01L21/60

CPC分类号： H01L23/3128 ,  H01L23/4952 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48479 ,  H01L2224/48482 ,  H01L2224/48487 ,  H01L2224/48499 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4899 ,  H01L2224/48992 ,  H01L2224/4911 ,  H01L2224/49112 ,  H01L2224/4917 ,  H01L2224/49426 ,  H01L2224/49429 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85191 ,  H01L2224/85205 ,  H01L2224/85206 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/30105 ,  H01L2224/85181 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/0635 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48455 ,  H01L2224/4554

摘要： To provide a small, high-performance semiconductor device in which contact between adjacent wires is prevented for increased flexibility in designing a wiring layout, and an efficient method for manufacturing the semiconductor device. The semiconductor device includes a substrate 10 having an electrode 21A arranged on its surface; and a first semiconductor element 11A which includes an electrode 22 arranged on its surface and which is supported by the substrate 10, wherein a first wire 41 is connected through a first bump 31 to at least one of the electrodes over the substrate 10 and semiconductor element 11A (i.e., at least one of the electrodes 21 and 22), and a second wire 42 is connected through a second bump 32 to a bonding portion of the wire 41.

摘要翻译： 为了提供防止相邻导线之间的接触以提高布线布局设计的灵活性的小型高性能半导体器件，以及制造半导体器件的有效方法。 半导体器件包括：衬底10，其具有布置在其表面上的电极21A; 以及第一半导体元件11A，其包括布置在其表面上并由衬底10支撑的电极22，其中第一线41通过第一凸块31连接到衬底10上的至少一个电极和半导体元件 11A（即，电极21和22中的至少一个），并且第二线42通过第二凸块32连接到线41的接合部分。

公开(公告)号：US20090174054A1

公开(公告)日：2009-07-09

申请号：US12352436

申请日：2009-01-12

申请人： Christian Block ,  Sebastian Brunner ,  Christian Hoffmann

发明人： Christian Block ,  Sebastian Brunner ,  Christian Hoffmann

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L24/85 ,  H01L23/3121 ,  H01L23/3171 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/83 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05644 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/49175 ,  H01L2224/4945 ,  H01L2224/78301 ,  H01L2224/83 ,  H01L2224/85051 ,  H01L2224/85186 ,  H01L2224/85191 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15798 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/4554 ,  H01L2924/206

摘要： A module for electrical components is proposed in which connection surfaces that can be bonded are provided on a multi-layer substrate with integrated wiring; a component chip is bonded on the top that has bond pads on its surface pointing upward and that contacts the substrate by means of bonding wires. Here, the wire guide of the bonding wires is so that they are each bonded with a ball on a connection surface and with the wedge directly on one of the bond pads.

摘要翻译： 提出了一种用于电气部件的模块，其中可以结合的连接表面设置在具有集成布线的多层基板上; 部件芯片结合在顶部，其表面上具有接合焊盘，并且通过接合线与基板接触。 这里，接合线的线导向器使得它们各自在连接表面上与球接合，并且楔子直接连接在一个接合焊盘上。

公开(公告)号：US20090032947A1

公开(公告)日：2009-02-05

申请号：US11832571

申请日：2007-08-01

申请人： Seok Ho Na ,  Jae Yun Kim ,  Yoon Joo Kim ,  Ji Young Chung

发明人： Seok Ho Na ,  Jae Yun Kim ,  Yoon Joo Kim ,  Ji Young Chung

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L24/85 ,  H01L23/3128 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/4848 ,  H01L2224/48482 ,  H01L2224/48483 ,  H01L2224/48487 ,  H01L2224/48499 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/83 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/859 ,  H01L2224/85986 ,  H01L2224/92247 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01202 ,  H01L2924/01203 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/01004 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

摘要： A semiconductor device has a semiconductor die having at least one bond pad formed on a first surface thereof. A substrate has at least one bond finger formed on a first surface thereof. A second surface of the semiconductor die is attached to the first surface of the substrate. A conductive wire connects the bond pad of the semiconductor die and the bond finger of the substrate wherein at least one end of the conductive wire has a stack bump. An encapsulant is provided to encapsulate the semiconductor die and the conductive wire.

摘要翻译： 半导体器件具有在其第一表面上形成有至少一个接合焊盘的半导体管芯。 衬底在其第一表面上形成有至少一个键合指状物。 半导体管芯的第二表面附接到基板的第一表面。 导电线将半导体管芯的接合焊盘和衬底的接合指状物连接，其中导线的至少一端具有堆叠凸起。 提供密封剂以封装半导体管芯和导线。

公开(公告)号：US20090008761A1

公开(公告)日：2009-01-08

申请号：US11773886

申请日：2007-07-05

申请人： Jairus Legaspi Pisigan ,  Henry Descalzo Bathan ,  Arnel Trasporto ,  Jeffrey D. Punzalan

发明人： Jairus Legaspi Pisigan ,  Henry Descalzo Bathan ,  Arnel Trasporto ,  Jeffrey D. Punzalan

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/3107 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48482 ,  H01L2224/49111 ,  H01L2224/49112 ,  H01L2224/49171 ,  H01L2224/49174 ,  H01L2224/4942 ,  H01L2224/49433 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/8518 ,  H01L2224/85186 ,  H01L2224/85399 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2224/4554

摘要： An integrated circuit package system includes: forming a flex bump over an integrated circuit device structure, the flex bump having both a base portion and an offset portion over the base portion; forming a first ball bond of a first internal interconnect over the offset portion; and encapsulating the integrated circuit device structure, the flex bump, and the first internal interconnect.

摘要翻译： 集成电路封装系统包括：在集成电路器件结构上形成柔性突起，所述柔性突起在基部上方具有基部和偏移部分; 在所述偏移部分上形成第一内部互连的第一球接合; 并封装集成电路器件结构，柔性突起和第一内部互连。

公开(公告)号：US20090001572A1

公开(公告)日：2009-01-01

申请号：US12204394

申请日：2008-09-04

申请人： Hidetoshi KURAYA ,  Hideyuki ARAKAWA ,  Fumiaki AGA

发明人： Hidetoshi KURAYA ,  Hideyuki ARAKAWA ,  Fumiaki AGA

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/4952 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48624 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/85121 ,  H01L2224/85205 ,  H01L2224/85986 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2224/85186 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2924/01006 ,  H01L2224/4554

摘要： A semiconductor device of the present invention includes a chip which has a pad; a bump electrode formed on the pad; and a wire whose stitch bonding is made on the bump electrode. The wire satisfies a condition: (modulus-of-elasticity/breaking strength per unit area)≧400.

摘要翻译： 本发明的半导体器件包括具有焊盘的芯片; 形成在所述垫上的凸块电极; 以及在凸块电极上进行线圈接合的导线。 导线满足条件：（弹性模量/单位面积断裂强度）> = 400。

公开(公告)号：US20080272487A1

公开(公告)日：2008-11-06

申请号：US12115510

申请日：2008-05-05

申请人： Il Kwon Shim ,  Hun Teak Lee ,  Sheila Marie L. Alvarez ,  Gyung Sik Yun ,  Heap Hoe Kuan

发明人： Il Kwon Shim ,  Hun Teak Lee ,  Sheila Marie L. Alvarez ,  Gyung Sik Yun ,  Heap Hoe Kuan

IPC分类号： H01L23/49 ,  H01L21/44

CPC分类号： H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48475 ,  H01L2224/48479 ,  H01L2224/4848 ,  H01L2224/48482 ,  H01L2224/48499 ,  H01L2224/48799 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/85986 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/45099 ,  H01L2924/00015

摘要： A wire bond system including providing an integrated circuit die with a bond pad thereon, forming a soft bump on the bond pad, and wire bonding a hard-metal wire on the soft bump.

摘要翻译： 一种引线接合系统，包括在其上提供具有接合焊盘的集成电路管芯，在接合焊盘上形成软凸点，以及将软质凸起上的硬金属线引线接合。