Abstract:
An apparatus comprising a multi-layer substrate (10) including a plurality of layers of insulative material (12), at least one well (15) formed in at least one of the layers, the well (15) extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component (13) formed within the well (15) on the inner surface of the multi-layer substrate; and a device having at least one electrically conductive lead or wire (11) extending into the well (15) and being in direct physical contact with the electrically conductive component (13) formed on the inner surface of the multi-layer substrate. Also, a method of manufacturing an apparatus comprising the steps of forming a multi-layer substrate (10) including a plurality of layers of insulative material (12), at least one well (15) formed in at least one of the layers, the well (15) extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component (13) formed within the well (15) on the inner surface of the multi-layer substrate; and extending at least one electrically conductive lead or wire (11) from a device into the well (15) such that the lead or wire is in direct physical contact with the electrically conductive component (13) formed on the inner surface of the multi-layer substrate.
Abstract:
An apparatus comprising a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and a device having at least one electrically conductive lead or wire extending into the well and being in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate. Also, a method of manufacturing an apparatus comprising the steps of forming a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and extending at least one electrically conductive lead or wire from a device into the well such that the lead or wire is in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate.
Abstract:
An interconnection contact structure assembly including an electronic component (102) having a surface and a conductive contact terminal (103) carried by the electronic component (102) and accessible at the surface. The contact structure (101) includes an internal flexible elongate member (106) having first (107) and second ends (108) and with the first end (107) forming a first intimate bond to the surface of the conductive contact terminal (103) without the use of a separate bonding material. An electrically conductive shell (116) is provided and is formed of at least one layer of a conductive material enveloping the elongate member (106) and forming a second intimate bond with at least a portion of the conductive contact terminal immediately adjacent the first intimate bond.
Abstract:
A method and product are disclosed in which multiple solder bumps (76) on a first planar surface (66) are guided into engagement with terminals (76) on a second planar surface (72) by means of holes (80) formed (by a photolithographic process) in a dielectric layer (78), which has been added to the second surface (72) to provide the holes (80) (or sockets) through which the solder bumps (76) (or plugs) extend. The perforated (hole-providing) layer may be formed of one of several materials. The preferred perforated layer material is a photo-definable polyamide, which is hardened by heating after the holes have been formed. Small solder bumps (84) may be formed inside the holes (80) on the second surface (72), in order to facilitate bonding between the solder bumps (76) on the first surface (66) and the terminals (70) on the second surface (72).
Abstract:
A solder interconnection for forming vias between first and second substrates (12, 14) comprises a plurality of solder containing wells (16) extending into a flat surface (18) of the first substrate (12), the solder (20) in each well (16) being soldered to one of a corresponding plurality of conductor posts (22) extending outwardly from a flat surface (23) of the second substrate (14). The plurality of the wells (16) are created in a pattern, an aliquot of solder (20) is deposited in each well (16), with the aliquot being of substantially no greater volume than that of the well (16) it occupies, the posts (22) are provided in aligned array with the pattern, the solder (20) is melted, the posts (22) are inserted and the solder (20) solidifies. Very closely placed vias can be formed.
Abstract:
An intrinsic safe in-line adaptor with an integrated capacitive barrier for connecting a wireless module with an antenna. The in-line adaptor (e.g., N-type to N- type) can be designed to include an intrinsic safe circuit and the integrated capacitive barrier. The intrinsic safe circuit further includes a multi-layer PCB and the PCB can be potted and sealed with a mechanical metal casing. The intrinsic safe capacitive barrier can be integrated with a coaxial connector and mounted as part of a flameproof enclosure to meet an explosion safety standard and an intrinsic safety requirement. The mechanical metal casing can be isolated by the enclosure (e.g., rubber) to meet isolation requirements. The wireless module can be directly connected with the antenna utilizing the in-line adaptor via the coaxial connector and without any specific cable assembly.
Abstract:
본 발명의 인터포저가 임베디드 되는 회로 보드는 제1관통 전극이 탑사이드와 백사이드를 전기적으로 연결하는 인터포저, 및 상기 인터포저가 임베디드 되되 상기 인터포저의 탑사이드와 백사이드는 노출되는 몰딩 부재를 포함한다. 본 발명에 의하면, 요구되는 관통 홀(through hole)의 파인 피치에 따라 절연체의 몰딩 부재와 반도체의 인터포저를 적절하게 선택하여 결합할 수 있고, 인터포저가 반도체 칩과 실질적으로 동일 레벨에서 몰딩되기 때문에, 인터포저를 임베디드 하기 위한 별도의 공정이 추가되지 않는다.
Abstract:
메모리 카드 시스템은 유연 집적 회로 소자 패키지, 상부 유연 케이스, 하부 유연 케이스, 배선 구조, 이방성 전도 필름 등을 포함할 수 있다. 집적 회로 소자 패키지는 휘어질 수 있는 물질을 포함할 수 있고, 접속 패드를 가질 수 있다. 상부 케이스는 휘어질 수 있는 물질을 포함할 수 있고, 유연 집적 회로 소자 패키지를 덮을 수 있다. 하부 케이스는 휘어질 수 있는 물질을 포함할 수 있고, 유연 집적 회로 소자 패키지가 고정될 수 있다. 배선 구조는 휘어질 수 있는 물질을 포함할 수 있고, 상부 케이스의 내측 표면에 구비되는 연결 배선, 상부 케이스의 외측 표면에 구비되는 접속 핀 및 상부 케이스를 관통하는 비아 배선을 포함할 수 있다. 이방성 전도 필름은 집적 회로 소자 패키지와 상부 케이스 사이에 배치될 수 있고, 접속 패드와 연결 배선을 전기적으로 연결할 수 있다.
Abstract:
A microelectronic package (10) can include wire bonds (32) having bases (34) bonded to respective conductive elements (28) on a substrate (12) and ends (36) opposite the bases (34). A dielectric encapsulation layer (42) extends from the substrate (12) and covers portions of the wire bonds (32) such that covered portions of the wire bonds (32) are separated from one another by the encapsulation layer (42), wherein unencapsulated portions (39) of the wire bonds (32) are defined by portions of the wire bonds (32) which are uncovered by the encapsulation layer (42). Unencapsulated portions (39) can be disposed at positions in a pattern having a minimum pitch which is greater than a first minimum pitch between bases (34) of adjacent wire bonds (32).