公开(公告)号：US20080012119A1

公开(公告)日：2008-01-17

申请号：US11778887

申请日：2007-07-17

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Matthias Stecher

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Matthias Stecher

IPC分类号： H01L23/04 ,  H01L23/48

CPC分类号： H01L23/552 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/29 ,  H01L23/3185 ,  H01L24/05 ,  H01L24/13 ,  H01L24/73 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/6835 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor component of semiconductor chip size includes a semiconductor chip. The semiconductor chip has a metallic coating that completely covers the edge sides and the rear side and partly covers the top side, on which surface-mountable external contacts are arranged. One aspect includes power semiconductor components, wherein the metallic coating connects a rear side electrode to one of the surface-mountable external contacts on the top side of a power semiconductor chip.

摘要翻译： 半导体芯片尺寸的半导体部件包括半导体芯片。 半导体芯片具有完全覆盖边缘侧和后侧的金属涂层，并且部分地覆盖顶面，其上布置有表面可安装的外部触点。 一个方面包括功率半导体部件，其中金属涂层将后侧电极连接到功率半导体芯片的顶侧上的可表面安装的外部触头之一。

公开(公告)号：US08975117B2

公开(公告)日：2015-03-10

申请号：US13369059

申请日：2012-02-08

申请人： Ralf Otremba ,  Fong Lim ,  Abdul Rahman Mohamed ,  Chooi Mei Chong ,  Ida Fischbach ,  Xaver Schloegel ,  Juergen Schredl ,  Josef Hoeglauer

发明人： Ralf Otremba ,  Fong Lim ,  Abdul Rahman Mohamed ,  Chooi Mei Chong ,  Ida Fischbach ,  Xaver Schloegel ,  Juergen Schredl ,  Josef Hoeglauer

IPC分类号： H01L21/00 ,  H01L21/44

CPC分类号： H01L23/49562 ,  H01L23/49524 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L24/95 ,  H01L2224/04026 ,  H01L2224/05553 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/0603 ,  H01L2224/2732 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/32058 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/33181 ,  H01L2224/3512 ,  H01L2224/352 ,  H01L2224/37099 ,  H01L2224/37111 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/37155 ,  H01L2224/37164 ,  H01L2224/37169 ,  H01L2224/37572 ,  H01L2224/376 ,  H01L2224/37639 ,  H01L2224/37644 ,  H01L2224/37647 ,  H01L2224/37655 ,  H01L2224/37664 ,  H01L2224/37669 ,  H01L2224/40095 ,  H01L2224/40101 ,  H01L2224/40175 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/40491 ,  H01L2224/73253 ,  H01L2224/73263 ,  H01L2224/77272 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/83801 ,  H01L2224/83825 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84455 ,  H01L2224/84464 ,  H01L2224/84469 ,  H01L2224/84801 ,  H01L2224/84825 ,  H01L2224/9221 ,  H01L2224/92246 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2924/00012 ,  H01L2224/37599

摘要： A method includes providing a semiconductor chip having a first main surface and a second main surface. A semiconductor chip is placed on a carrier with the first main surface of the semiconductor chip facing the carrier. A first layer of solder material is provided between the first main surface and the carrier. A contact clip including a first contact area is placed on the semiconductor chip with the first contact area facing the second main surface of the semiconductor chip. A second layer of solder material is provided between the first contact area and the second main surface. Thereafter, heat is applied to the first and second layers of solder material to form diffusion solder bonds between the carrier, the semiconductor chip and the contact clip.

摘要翻译： 一种方法包括提供具有第一主表面和第二主表面的半导体芯片。 将半导体芯片放置在载体上，其中半导体芯片的第一主表面面向载体。 第一层焊料材料设置在第一主表面和载体之间。 包括第一接触区域的接触夹子被放置在半导体芯片上，其中第一接触区域面对半导体芯片的第二主表面。 第二层焊料材料设置在第一接触区域和第二主表面之间。 此后，将热量施加到第一和第二层焊料材料，以在载体，半导体芯片和接触夹之间形成扩散焊料接合​​。

公开(公告)号：US08933555B2

公开(公告)日：2015-01-13

申请号：US12466524

申请日：2009-05-15

申请人： Ralf Otremba ,  Josef Hoeglauer

发明人： Ralf Otremba ,  Josef Hoeglauer

IPC分类号： H01L29/84 ,  H01L23/36 ,  H01L23/31 ,  H01L25/16

CPC分类号： H01L23/36 ,  H01L23/3121 ,  H01L25/16 ,  H01L2225/06572 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00

摘要： A semiconductor chip package is disclosed. One embodiment provides at least one semiconductor chip including contact elements on a first surface of the chip. An encapsulation layer covers the semiconductor chip. A metallization layer is applied above the first surface of the chip and the encapsulation layer. The metallization layer includes contact areas connected with the contact elements of the chip. External pins are connected with the contact areas.

摘要翻译： 公开了半导体芯片封装。 一个实施例提供了包括在芯片的第一表面上的接触元件的至少一个半导体芯片。 封装层覆盖半导体芯片。 在芯片的第一表面和封装层上方施加金属化层。 金属化层包括与芯片的接触元件连接的接触区域。 外部引脚与接触区域相连。

公开(公告)号：US08637341B2

公开(公告)日：2014-01-28

申请号：US12046680

申请日：2008-03-12

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Xaver Schloegel

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Xaver Schloegel

IPC分类号： H01L21/00

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3157 ,  H01L24/25 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/2518 ,  H01L2224/73153 ,  H01L2224/76155 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1815 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor module. In one embodiment, at least two semiconductor chips are placed on a carrier. The at least two semiconductor chips are then covered with a molding material. An exposed portion of the at least two semiconductor chips is provided. A first layer of conductive material is applied over the exposed portion of the at least two semiconductor chips to electrically connect to a contact pad on the exposed portion of the at least two semiconductor chips. The at least two semiconductor chips are singulated.

摘要翻译： 半导体模块。 在一个实施例中，至少两个半导体芯片放置在载体上。 然后用成型材料覆盖至少两个半导体芯片。 提供至少两个半导体芯片的暴露部分。 在所述至少两个半导体芯片的暴露部分上施加第一层导电材料，以电连接到所述至少两个半导体芯片的暴露部分上的接触焊盘。 将至少两个半导体芯片分割。

公开(公告)号：US08461645B2

公开(公告)日：2013-06-11

申请号：US13049098

申请日：2011-03-16

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Roveendra Paul

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Roveendra Paul

IPC分类号： H01L29/78

CPC分类号： H01L23/3735 ,  H01L24/29 ,  H01L24/32 ,  H01L29/04 ,  H01L29/7811 ,  H01L2224/29144 ,  H01L2224/32245 ,  H01L2924/00013 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/0105 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A semiconductor device includes a vertical power semiconductor chip including a semiconductor layer. A first terminal is at a first side of the semiconductor layer and a second terminal is at a second side of the semiconductor layer opposite the first side along a first direction. A drift zone is within the semiconductor layer between the first terminal and the second terminal. The drift zone has, in a central part, a compressive stress of at least 100 MPa along a second direction perpendicular to the first direction. The central part extends from 40% to 60% of an overall extension of the drift zone along the first direction and into a depth of the semiconductor layer of at least 10 μm with respect to at least one of the first side and the second side of the semiconductor layer.

摘要翻译： 半导体器件包括具有半导体层的垂直功率半导体芯片。 第一端子位于半导体层的第一侧，第二端子沿着第一方向位于与第一侧相对的半导体层的第二侧。 漂移区位于第一端子和第二端子之间的半导体层内。 漂移区在中心部分沿垂直于第一方向的第二方向具有至少100MPa的压缩应力。 中心部分从沿着第一方向的漂移区的整体延伸的40％延伸至60％，并且相对于第一侧和第二侧的至少一个延伸至至少10um的半导体层的深度 半导体层。

公开(公告)号：US20130027113A1

公开(公告)日：2013-01-31

申请号：US13191891

申请日：2011-07-27

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel

IPC分类号： H03K17/56 ,  H01L25/07 ,  H01L21/98 ,  H01L23/538

CPC分类号： H01L24/73 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/02166 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/2732 ,  H01L2224/2745 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37147 ,  H01L2224/3716 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/4866 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48671 ,  H01L2224/48699 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/4876 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48771 ,  H01L2224/48799 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/4886 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48869 ,  H01L2224/48871 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/8382 ,  H01L2224/85439 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/8546 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/01028 ,  H01L2224/27 ,  H01L2924/0105 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2924/00012 ,  H01L2924/01023 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/01005

摘要： A semiconductor chip includes a power transistor circuit with a plurality of active transistor cells. A first load electrode and a control electrode are arranged on a first face of the semiconductor chip, wherein the first load electrode includes a first metal layer. A second load electrode is arranged on a second face of the semiconductor chip. A second metal layer is arranged over the first metal layer, wherein the second metal layer is electrically insulated from the power transistor circuit and the second metal layer is arranged over an area of the power transistor circuit that comprises at least one of the plurality of active transistor cells.

摘要翻译： 半导体芯片包括具有多个有源晶体管单元的功率晶体管电路。 第一负载电极和控制电极设置在半导体芯片的第一面上，其中第一负载电极包括第一金属层。 第二负载电极设置在半导体芯片的第二面上。 第二金属层布置在第一金属层上，其中第二金属层与功率晶体管电路电绝缘，并且第二金属层布置在功率晶体管电路的包括多个活性物质中的至少一个的区域 晶体管单元。

公开(公告)号：US08164173B2

公开(公告)日：2012-04-24

申请号：US12828327

申请日：2010-07-01

申请人： Adolf Koller ,  Horst Theuss ,  Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Reinhard Ploss

发明人： Adolf Koller ,  Horst Theuss ,  Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Reinhard Ploss

IPC分类号： H01L23/48

CPC分类号： H01L23/552 ,  H01L23/3114 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099

摘要： A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.

摘要翻译： 面板具有具有上部第一金属层和多个垂直半导体部件的基板。 每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。 半导体部件的第二面分别安装在基板的金属层上。 半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。 第二金属层布置在半导体部件之间的分离区域中。

公开(公告)号：US07879652B2

公开(公告)日：2011-02-01

申请号：US11828858

申请日：2007-07-26

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Klaus Schiess

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Klaus Schiess

IPC分类号： H01L21/00

CPC分类号： H01L23/3107 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L2221/68359 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/76155 ,  H01L2224/82005 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor module is disclosed. One embodiment provides a first semiconductor chip having a first contact pad on a first main surface and a second contact pad on a second main surface, a first electrically conductive layer applied to the first main surface, a second electrically conductive layer applied to the second main surface, and an electrically insulating material covering the first electrically conductive layer, wherein a surface of the second electrically conductive layer forms an external contact pad and the second electrically conductive layer has a thickness of less than 200 μm.

摘要翻译： 公开了一种半导体模块。 一个实施例提供了第一半导体芯片，其具有在第一主表面上的第一接触焊盘和在第二主表面上的第二接触焊盘，施加到第一主表面的第一导电层，施加到第二主表面的第二导电层 表面和覆盖第一导电层的电绝缘材料，其中第二导电层的表面形成外部接触焊盘，第二导电层具有小于200μm的厚度。

公开(公告)号：US20100001291A1

公开(公告)日：2010-01-07

申请号：US12168254

申请日：2008-07-07

申请人： Ralf Otremba ,  Josef Hoeglauer

发明人： Ralf Otremba ,  Josef Hoeglauer

IPC分类号： H01L23/02 ,  H01L21/52 ,  H01L29/16

CPC分类号： H01L23/49551 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/18 ,  H01L24/19 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/18 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48871 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/305 ,  H05K3/3442 ,  H05K3/3468 ,  H05K2201/10727 ,  H05K2203/0465 ,  Y02P70/613 ,  H01L2224/82 ,  H01L2924/01026 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2224/48744 ,  H01L2224/48771 ,  H01L2224/48671 ,  H01L2924/00012

摘要： An electronic device and manufacturing thereof. One embodiment provides a carrier and multiple contact elements. The carrier defines a first plane. A power semiconductor chip is attached to the carrier. A body is formed of an electrically insulating material covering the power semiconductor chip. The body defines a second plane parallel to the first plane and side faces extends from the first plane to the second plane. At least one of the multiple contact elements has a cross section in a direction orthogonal to the first plane that is longer than 60% of the distance between the first plane and the second plane.

摘要翻译： 电子设备及其制造。 一个实施例提供载体和多个接触元件。 载体定义第一平面。 功率半导体芯片附着在载体上。 主体由覆盖功率半导体芯片的电绝缘材料形成。 主体限定平行于第一平面的第二平面，侧面从第一平面延伸到第二平面。 多个接触元件中的至少一个在与第一平面正交的方向上具有长于第一平面和第二平面之间的距离的60％的横截面。

公开(公告)号：US20090230535A1

公开(公告)日：2009-09-17

申请号：US12046680

申请日：2008-03-12

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Xaver Schloegel

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Xaver Schloegel

IPC分类号： H01L23/522 ,  H01L21/50

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3157 ,  H01L24/25 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/2518 ,  H01L2224/73153 ,  H01L2224/76155 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1815 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor module. In one embodiment, at least two semiconductor chips are placed on a carrier. The at least two semiconductor chips are then covered with a molding material. An exposed portion of the at least two semiconductor chips is provided. A first layer of conductive material is applied over the exposed portion of the at least two semiconductor chips to electrically connect to a contact pad on the exposed portion of the at least two semiconductor chips. The at least two semiconductor chips are singulated.

摘要翻译： 半导体模块。 在一个实施例中，至少两个半导体芯片放置在载体上。 然后用成型材料覆盖至少两个半导体芯片。 提供至少两个半导体芯片的暴露部分。 第一层导电材料施加在至少两个半导体芯片的暴露部分上，以电连接到至少两个半导体芯片的暴露部分上的接触焊盘。 将至少两个半导体芯片分割。