公开(公告)号：US12099408B2

公开(公告)日：2024-09-24

申请号：US17132982

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Duane E. Galbi ,  Matthew J. Adiletta

IPC: G06F11/10 ,  G06F11/07 ,  G06F12/0879

CPC classification number: G06F11/1068 ,  G06F11/076 ,  G06F11/0772 ,  G06F12/0879

Abstract: An apparatus is described. The apparatus includes a memory controller having logic circuitry to write a unit of write data into a plurality of memory chips according to a striping pattern that includes multiple protected sub words, each protected sub word including a smaller portion of the unit of write data and error correction coding (ECC) information calculated from the smaller portion of the unit of write data.

公开(公告)号：US12082370B2

公开(公告)日：2024-09-03

申请号：US17337342

申请日：2021-06-02

Applicant: Intel Corporation

Inventor： Aaron Gorius ,  Michael T. Crocker ,  Jonathan W. Thibado ,  Matthew J. Adiletta ,  John C. Gulick ,  Emery E. Frey

IPC: H05K7/20

CPC classification number: H05K7/20272 ,  H05K7/20236 ,  H05K7/20281 ,  H05K7/205

Abstract: Examples described herein relate to a system. The system can include a container that contains fluid to provide two phase immersion liquid cooling (2PILC) for a system within the container. The container can enclose a first circuit board with a first side of the first circuit board is conductively coupled to at least one device. The container can enclose a motherboard conductively coupled to a second side of the first circuit board with a first side of the motherboard is conductively coupled to the second side of the first circuit board. The motherboard can include at least four edges. Connectors can conductively connect the motherboard with a second circuit board. The second circuit board can include at least four edges and an edge of the motherboard is oriented approximately 90 degrees to an edge of the second circuit board. At least one device can include one or more of: a processor, memory device, accelerator device, or network interface.

公开(公告)号：US11349734B2

公开(公告)日：2022-05-31

申请号：US16506457

申请日：2019-07-09

Applicant: Intel Corporation

Inventor： Matthew J. Adiletta ,  Aaron Gorius ,  Myles Wilde ,  Michael T. Crocker

IPC: G06F7/00 ,  H04L43/08 ,  G06F16/901 ,  H04B10/25 ,  G02B6/38 ,  G02B6/42 ,  G02B6/44 ,  G06F1/18 ,  G06F1/20 ,  G06F3/06 ,  G06F8/65 ,  G06F9/30 ,  G06F9/4401 ,  G06F9/54 ,  G06F12/109 ,  G06F12/14 ,  G06F13/16 ,  G06F13/40 ,  G08C17/02 ,  G11C5/02 ,  G11C7/10 ,  G11C11/56 ,  G11C14/00 ,  H03M7/30 ,  H03M7/40 ,  H04L41/14 ,  H04L43/0817 ,  H04L43/0876 ,  H04L43/0894 ,  H04L49/00 ,  H04L49/25 ,  H04L49/356 ,  H04L49/45 ,  H04L67/02 ,  H04L67/306 ,  H04L69/04 ,  H04L69/329 ,  H04Q11/00 ,  H05K7/14 ,  G06F15/16 ,  G06F9/38 ,  G06F9/50 ,  H04L41/12 ,  H04L41/5019 ,  H04L43/16 ,  H04L47/24 ,  H04L47/38 ,  H04L67/1004 ,  H04L67/1034 ,  H04L67/1097 ,  H04L67/12 ,  H04L67/51 ,  H05K5/02 ,  H04W4/80 ,  G06Q10/08 ,  G06Q10/00 ,  G06Q50/04 ,  H04L43/065 ,  H04J14/00 ,  H04L41/147 ,  H04L67/1008 ,  H04L41/0813 ,  H04L67/1029 ,  H04L41/0896 ,  H04L47/70 ,  H04L47/78 ,  H04L41/082 ,  H04L67/00 ,  H04L67/1012 ,  B25J15/00 ,  B65G1/04 ,  H05K7/20 ,  H04L49/55 ,  H04L67/10 ,  H04W4/02 ,  H04L45/02 ,  G06F13/42 ,  H05K1/18 ,  G05D23/19 ,  G05D23/20 ,  H04L47/80 ,  H05K1/02 ,  H04L45/52 ,  H04Q1/04 ,  G06F12/0893 ,  H05K13/04 ,  G11C5/06 ,  G06F11/14 ,  G06F11/34 ,  G06F12/0862 ,  G06F15/80 ,  H04L47/765 ,  H04L67/1014 ,  G06F12/10 ,  G06Q10/06 ,  G07C5/00 ,  H04L12/28 ,  H04L61/00 ,  H04L41/02 ,  H04L9/06 ,  H04L9/14 ,  H04L9/32 ,  H04L41/046 ,  H04L49/15

Abstract: Examples may include racks for a data center and sleds for the racks, the sleds arranged to house physical resources for the data center. The sleds and racks can be arranged to be autonomously manipulated, such as, by a robot. The sleds and racks can include features to facilitate automated installation, removal, maintenance, and manipulation by a robot.

公开(公告)号：US11200104B2

公开(公告)日：2021-12-14

申请号：US16346341

申请日：2017-11-29

Applicant: INTEL CORPORATION

Inventor： Matthew J. Adiletta ,  Myles Wilde ,  Aaron Gorius ,  Michael T. Crocker ,  Paul H. Dormitzer ,  Mark A. Schmisseur

IPC: H01P5/08 ,  H01P5/00 ,  H04B3/52 ,  H05K7/14 ,  G06F11/07 ,  G06F11/30 ,  G06F9/50 ,  G06F11/34 ,  H04Q11/00 ,  G06F16/28

Abstract: Racks and rack pods to support a plurality of sleds are disclosed herein. Switches for use in the rack pods are also disclosed herein. A rack comprises a plurality of sleds and a plurality of electromagnetic waveguides. The plurality of sleds are vertically spaced from one another. The plurality of electromagnetic waveguides communicate data signals between the plurality of sleds.

公开(公告)号：US10356495B2

公开(公告)日：2019-07-16

申请号：US15396653

申请日：2016-12-31

Applicant: Intel Corporation

Inventor： Matthew J. Adiletta ,  Aaron Gorius ,  Myles Wilde ,  Michael T. Crocker

IPC: H05K7/20 ,  H04Q11/00 ,  H03M7/40 ,  H03M7/30 ,  G06F16/901 ,  G06F3/06 ,  G11C7/10 ,  H05K7/14 ,  G06F1/18 ,  G06F13/40 ,  H05K5/02 ,  G08C17/02 ,  H04L12/24 ,  H04L29/08 ,  H04L12/26 ,  H04L12/851 ,  G06F9/50 ,  H04L12/911 ,  G06F12/109 ,  H04L29/06 ,  G11C14/00 ,  G11C5/02 ,  G11C11/56 ,  G02B6/44 ,  G06F8/65 ,  G06F12/14 ,  G06F13/16 ,  H04B10/25 ,  G06F9/4401 ,  G02B6/38 ,  G02B6/42 ,  B25J15/00 ,  B65G1/04 ,  H04L12/931 ,  H04L12/939 ,  H04W4/02 ,  H04L12/751 ,  G06F13/42 ,  H05K1/18 ,  G05D23/19 ,  G05D23/20 ,  H04L12/927 ,  H05K1/02 ,  H04L12/781 ,  H04Q1/04 ,  G06F12/0893 ,  H05K13/04 ,  G11C5/06 ,  G06F11/14 ,  G06F11/34 ,  G06F12/0862 ,  G06F15/80 ,  H04L12/919 ,  G06F12/10 ,  G06Q10/06 ,  G07C5/00 ,  H04L12/28 ,  H04L29/12 ,  H04L9/06 ,  H04L9/14 ,  H04L9/32 ,  H04L12/933 ,  H04L12/947 ,  H04L12/811 ,  H04W4/80 ,  G06Q10/08 ,  G06Q10/00 ,  G06Q50/04

Abstract: Technologies for rack cooling includes monitoring a temperature of a sled mounted in a rack and controlling a cooling system of the rack based on the temperature of the sled. The cooling system includes a cooling fan array, which may be controlled to cool the sled. Additionally, if needed, one or more adjacent cooling fan arrays that are located adjacent to the controlled cooling fan array may be adjusted to provide additional cooling to the sled.

公开(公告)号：US10349152B2

公开(公告)日：2019-07-09

申请号：US15396187

申请日：2016-12-30

Applicant: INTEL CORPORATION

Inventor： Matthew J. Adiletta ,  Aaron Gorius ,  Myles Wilde ,  Michael T. Crocker

IPC: G06F1/16 ,  H04Q11/00 ,  H03M7/40 ,  H03M7/30 ,  G06F16/901 ,  G06F3/06 ,  G11C7/10 ,  H05K7/14 ,  G06F1/18 ,  G06F13/40 ,  H05K5/02 ,  G08C17/02 ,  H04L12/24 ,  H04L29/08 ,  H04L12/26 ,  H04L12/851 ,  G06F9/50 ,  H04L12/911 ,  G06F12/109 ,  H04L29/06 ,  G11C14/00 ,  G11C5/02 ,  G11C11/56 ,  G02B6/44 ,  G06F8/65 ,  G06F12/14 ,  G06F13/16 ,  H04B10/25 ,  G06F9/4401 ,  G02B6/38 ,  G02B6/42 ,  B25J15/00 ,  B65G1/04 ,  H05K7/20 ,  H04L12/931 ,  H04L12/939 ,  H04W4/02 ,  H04L12/751 ,  G06F13/42 ,  H05K1/18 ,  G05D23/19 ,  G05D23/20 ,  H04L12/927 ,  H05K1/02 ,  H04L12/781 ,  H04Q1/04 ,  G06F12/0893 ,  H05K13/04 ,  G11C5/06 ,  G06F11/14 ,  G06F11/34 ,  G06F12/0862 ,  G06F15/80 ,  H04L12/919 ,  G06F12/10 ,  G06Q10/06 ,  G07C5/00 ,  H04L12/28 ,  H04L29/12 ,  H04L9/06 ,  H04L9/14 ,  H04L9/32 ,  H04L12/933 ,  H04L12/947 ,  H04L12/811 ,  H04W4/80 ,  G06Q10/08 ,  G06Q10/00 ,  G06Q50/04

Abstract: Examples may include racks for a data center and sleds for the racks, the sleds arranged to house physical resources for the data center. The sleds and racks can be arranged to be autonomously manipulated, such as, by a robot. The sleds and racks can include features to facilitate automated installation, removal, maintenance, and manipulation by a robot.

公开(公告)号：US20190021182A1

公开(公告)日：2019-01-17

申请号：US16120419

申请日：2018-09-03

Applicant: Intel Corporation

Inventor： Matthew J. Adiletta ,  Aaron Gorius ,  Myles Wilde ,  Michael T. Crocker

IPC: H05K7/14 ,  H05K13/04 ,  H05K7/20 ,  H05K5/02 ,  H05K1/18 ,  H05K1/02 ,  H04W4/02 ,  H04Q11/00 ,  H04Q1/04 ,  H04L29/08 ,  H04L29/06 ,  H04L12/939 ,  H04L12/931 ,  H04L12/947 ,  H04L12/933 ,  H04L12/911 ,  H04L12/927 ,  H04L12/919 ,  H04L12/851 ,  H04L12/781 ,  H04L12/751 ,  H04L12/26 ,  H04L12/24 ,  H04L29/12 ,  H04L12/28 ,  H04L9/32 ,  H04L9/14 ,  H04L9/06 ,  H04B10/25 ,  H03M7/30 ,  H03M7/40 ,  G11C14/00 ,  G11C11/56 ,  G11C7/10 ,  G11C5/06 ,  G11C5/02 ,  G08C17/02 ,  G07C5/00 ,  G06Q10/06 ,  G06F17/30 ,  G06F15/80 ,  G06F13/42 ,  G06F13/40 ,  G06F13/16 ,  G06F12/14 ,  G06F12/109 ,  G06F12/10 ,  G06F12/0893 ,  G06F12/0862 ,  G06F11/34 ,  G06F11/14 ,  G06F9/50 ,  G06F9/4401 ,  G06F8/65 ,  G06F3/06 ,  G06F1/18 ,  G05D23/20 ,  G05D23/19 ,  G02B6/44 ,  G02B6/42 ,  G02B6/38 ,  B65G1/04 ,  B25J15/00 ,  H04W4/80 ,  G06Q50/04 ,  G06Q10/00 ,  G06Q10/08

Abstract: Technologies for optical communication in a rack cluster in a data center are disclosed. In the illustrative embodiment, a network switch is connected to each of 1,024 sleds by an optical cable that enables communication at a rate of 200 gigabits per second. The optical cable has low loss, allowing for long cable lengths, which in turn allows for connecting to a large number of sleds. The optical cable also has a very high intrinsic bandwidth limit, allowing for the bandwidth to be upgraded without upgrading the optical infrastructure.

公开(公告)号：US20180027700A1

公开(公告)日：2018-01-25

申请号：US15396647

申请日：2016-12-31

Applicant: Intel Corporation

Inventor： Matthew J. Adiletta ,  Aaron Gorius ,  Michael T. Crocker ,  Myles Wilde

IPC: H05K7/20 ,  G02B6/38 ,  G02B6/44 ,  H05K7/14

CPC classification number: H04Q11/0005 ,  B25J15/0014 ,  B65G1/0492 ,  G02B6/3882 ,  G02B6/3893 ,  G02B6/3897 ,  G02B6/4292 ,  G02B6/4452 ,  G05D23/1921 ,  G05D23/2039 ,  G06F1/183 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0616 ,  G06F3/0619 ,  G06F3/0625 ,  G06F3/0631 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0647 ,  G06F3/0653 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0664 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0673 ,  G06F3/0679 ,  G06F3/0683 ,  G06F3/0688 ,  G06F3/0689 ,  G06F8/65 ,  G06F9/4401 ,  G06F9/5016 ,  G06F9/5044 ,  G06F9/505 ,  G06F9/5072 ,  G06F9/5077 ,  G06F11/141 ,  G06F11/3414 ,  G06F12/0862 ,  G06F12/0893 ,  G06F12/10 ,  G06F12/109 ,  G06F12/1408 ,  G06F13/161 ,  G06F13/1668 ,  G06F13/1694 ,  G06F13/4022 ,  G06F13/4068 ,  G06F13/409 ,  G06F13/42 ,  G06F13/4282 ,  G06F15/8061 ,  G06F17/30949 ,  G06F2209/5019 ,  G06F2209/5022 ,  G06F2212/1008 ,  G06F2212/1024 ,  G06F2212/1041 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/202 ,  G06F2212/401 ,  G06F2212/402 ,  G06F2212/7207 ,  G06Q10/06 ,  G06Q10/06314 ,  G06Q10/087 ,  G06Q10/20 ,  G06Q50/04 ,  G07C5/008 ,  G08C17/02 ,  G08C2200/00 ,  G11C5/02 ,  G11C5/06 ,  G11C7/1072 ,  G11C11/56 ,  G11C14/0009 ,  H03M7/30 ,  H03M7/3084 ,  H03M7/3086 ,  H03M7/40 ,  H03M7/4031 ,  H03M7/4056 ,  H03M7/4081 ,  H03M7/6005 ,  H03M7/6023 ,  H04B10/25 ,  H04B10/2504 ,  H04L9/0643 ,  H04L9/14 ,  H04L9/3247 ,  H04L9/3263 ,  H04L12/2809 ,  H04L29/12009 ,  H04L41/024 ,  H04L41/046 ,  H04L41/0813 ,  H04L41/082 ,  H04L41/0896 ,  H04L41/12 ,  H04L41/145 ,  H04L41/147 ,  H04L41/5019 ,  H04L43/065 ,  H04L43/08 ,  H04L43/0817 ,  H04L43/0876 ,  H04L43/0894 ,  H04L43/16 ,  H04L45/02 ,  H04L45/52 ,  H04L47/24 ,  H04L47/765 ,  H04L47/782 ,  H04L47/805 ,  H04L47/82 ,  H04L47/823 ,  H04L49/15 ,  H04L49/25 ,  H04L49/357 ,  H04L49/45 ,  H04L49/555 ,  H04L67/02 ,  H04L67/10 ,  H04L67/1004 ,  H04L67/1008 ,  H04L67/1012 ,  H04L67/1014 ,  H04L67/1029 ,  H04L67/1034 ,  H04L67/1097 ,  H04L67/12 ,  H04L67/16 ,  H04L67/306 ,  H04L67/34 ,  H04L69/04 ,  H04L69/329 ,  H04Q1/04 ,  H04Q11/00 ,  H04Q11/0003 ,  H04Q11/0062 ,  H04Q11/0071 ,  H04Q2011/0037 ,  H04Q2011/0041 ,  H04Q2011/0052 ,  H04Q2011/0073 ,  H04Q2011/0079 ,  H04Q2011/0086 ,  H04Q2213/13523 ,  H04Q2213/13527 ,  H04W4/023 ,  H04W4/80 ,  H05K1/0203 ,  H05K1/181 ,  H05K5/0204 ,  H05K7/1418 ,  H05K7/1421 ,  H05K7/1422 ,  H05K7/1447 ,  H05K7/1461 ,  H05K7/1485 ,  H05K7/1487 ,  H05K7/1489 ,  H05K7/1491 ,  H05K7/1492 ,  H05K7/1498 ,  H05K7/2039 ,  H05K7/20709 ,  H05K7/20727 ,  H05K7/20736 ,  H05K7/20745 ,  H05K7/20836 ,  H05K13/0486 ,  H05K2201/066 ,  H05K2201/10121 ,  H05K2201/10159 ,  H05K2201/10189 ,  Y10S901/01

Abstract: A rack for supporting a sleds includes a pair of elongated support posts and pairs of elongated support arms that extend from the elongated support posts. Each pair of the elongated support arms defines a sled slot to receive a corresponding sled. To do so, each elongated support arm includes a circuit board guide to receive a chassis-less circuit board substrate of the corresponding sled. The rack may include a cross-member arm associated with each sled slot and an optical connector mounted to each cross-member arm. Additional elongated support posts may be used to provide additional sled slots.

公开(公告)号：US09244877B2

公开(公告)日：2016-01-26

申请号：US13804207

申请日：2013-03-14

Applicant: Intel Corporation

Inventor： Chengda Yang ,  Bradley A. Burres ,  Amit Kumar ,  Matthew J. Adiletta

IPC: G06F13/14 ,  G06F13/42

CPC classification number: G06F13/4295 ,  G06F13/14

Abstract: A SATA-compatible storage controller that can be configured to allow computers assigned to multiple different computer domains connected by at least one switch fabric to share resources of a common set of storage devices. The storage controller includes a plurality of virtual storage controllers, each providing an interface to a respective computer domain connected to the switch fabric, a virtualization mechanism configured to implement link layer virtualization for the common set of storage devices, and a split serial advanced technology attachment (SATA) protocol stack, the processing of which is partitioned between the respective virtual storage controllers and the virtualization mechanism.

Abstract translation: 一个SATA兼容的存储控制器，可以被配置为允许分配给由至少一个交换结构连接的多个不同计算机域的计算机共享共享一组存储设备的资源。 存储控制器包括多个虚拟存储控制器，每个虚拟存储控制器提供与连接到交换机结构的相应计算机域的接口;虚拟化机制，被配置为为共同的存储设备集合实现链路层虚拟化;以及分离的串行高级技术附件 （SATA）协议栈，其处理在相应的虚拟存储控制器和虚拟化机制之间分区。

公开(公告)号：US20160019178A1

公开(公告)日：2016-01-21

申请号：US14809423

申请日：2015-07-27

Applicant: Intel Corporation

Inventor： Gilbert Wolrich ,  Debra Bernstein ,  Daniel Cutter ,  Christopher Dolan ,  Matthew J. Adiletta

IPC: G06F13/40 ,  G06F13/28 ,  G06F3/06

CPC classification number: G06F13/20 ,  G06F3/0622 ,  G06F3/0661 ,  G06F3/0679 ,  G06F12/0223 ,  G06F12/0284 ,  G06F12/06 ,  G06F12/0806 ,  G06F12/10 ,  G06F12/109 ,  G06F13/28 ,  G06F13/4027 ,  G06F15/17318 ,  G06F15/76 ,  G06F2212/1041 ,  G06F2212/206 ,  G06F2212/251 ,  G11C7/1033 ,  G11C7/1072

Abstract: The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has circuitry to map addresses in a single address space to resources within the multiple programmable units where the single address space includes addresses for different ones of the resources in different ones of the multiple programmable units and where there is a one-to-one correspondence between respective addresses in the single address space and resources within the multiple programmable units.